Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                

Paper 2025/561

ThreatLens: LLM-guided Threat Modeling and Test Plan Generation for Hardware Security Verification

Dipayan Saha, University of Florida
Hasan Al Shaikh, University of Florida
Shams Tarek, University of Florida
Farimah Farahmandi, University of Florida
Abstract

Current hardware security verification processes predominantly rely on manual threat modeling and test plan generation, which are labor-intensive, error-prone, and struggle to scale with increasing design complexity and evolving attack methodologies. To address these challenges, we propose ThreatLens, an LLM-driven multi-agent framework that automates security threat modeling and test plan generation for hardware security verification. ThreatLens integrates retrieval-augmented generation (RAG) to extract relevant security knowledge, LLM-powered reasoning for threat assessment, and interactive user feedback to ensure the generation of practical test plans. By automating these processes, the framework reduces the manual verification effort, enhances coverage, and ensures a structured, adaptable approach to security verification. We evaluated our framework on the NEORV32 SoC, demonstrating its capability to automate security verification through structured test plans and validating its effectiveness in real-world scenarios.

Metadata
Available format(s)
PDF
Category
Applications
Publication info
Published elsewhere. IEEE VLSI Test Symposium (VTS) 2025
Keywords
LLMSecurity Threat ModelingSecurity Test Plan GenerationSecurity Policy GenerationHardware Security and Trust
Contact author(s)
dsaha @ ufl edu
hasanalshaikh @ ufl edu
shams tarek @ ufl edu
farimah @ ece ufl edu
History
2025-03-28: approved
2025-03-26: received
See all versions
Short URL
https://ia.cr/2025/561
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2025/561,
      author = {Dipayan Saha and Hasan Al Shaikh and Shams Tarek and Farimah Farahmandi},
      title = {{ThreatLens}: {LLM}-guided Threat Modeling and Test Plan Generation for Hardware Security Verification},
      howpublished = {Cryptology {ePrint} Archive, Paper 2025/561},
      year = {2025},
      url = {https://eprint.iacr.org/2025/561}
}
Note: In order to protect the privacy of readers, eprint.iacr.org does not use cookies or embedded third party content.