The impact of bias configuration on DC operating point in large-signal operation is analyzed for ... more The impact of bias configuration on DC operating point in large-signal operation is analyzed for Horizontal Current Bipolar Transistor (HCBT) by time-domain load-pull measurements at 2.4 GHz. The two limiting cases, constant base-emitter voltage (c-VBE) and constant base current (c-IB), are investigated with respect to where the hard-limitation occurs, in the cut-off or saturation region. For the two cases, it is found that the linear operating range, in which the gain is flat, heavily depends on the hard-limitation type present. Additionally, operation above open-base breakdown voltage shows sharp decrease of DC collector current of 23 mA near compression point for c-IB bias. Finally, the c-V BE bias shows around 5% higher collector efficiency in the back-off range while targeting the same output power in I-dB compression point.
Radiation-hard photodiode structures implemented in medical applications are designed in 180-nm C... more Radiation-hard photodiode structures implemented in medical applications are designed in 180-nm CMOS technology. Designed photodiodes were tested against total ionizing doses (TIDs) of 100, 200, and 400 Gy(Si), respectively, and they show high stability in terms of dark current characteristics. After TID of 400 Gy(Si), the dark current increased by up to 15%, compared to the unirradiated characteristics values. TCAD electrical simulations were performed and calibrated with the dark current measurements in order to explain the impact of generated defects due to ionizing radiation. Parameters that are used to model TID radiation have been varied in physical boundaries in order to achieve the desired fitting with the measurements. It is shown that due to the filling of acceptor interface traps with electrons, the space charge region extends, but the extension is limited and partially compensated by the fixed positive charges in the silicon nitride layer. The presented photodiodes result in the improved radiation hardness over the design in 350-nm CMOS technology.
The 33rd International Convention MIPRO, May 24, 2010
ABSTRACT Emitter coupled logic (ECL) ring oscillator with typical integrated bipolar transistor i... more ABSTRACT Emitter coupled logic (ECL) ring oscillator with typical integrated bipolar transistor is examined. Waveform stability and propagation delay time are studied with respect to the parasitic RLC components in bias voltage resistance and the limited dimensions of circuit metallization. It is shown that the parasitic components in reference and current-source network of ECL inverter, for differential pair current (I C ) of 300 µA, don't have a significant effect. Results indicate that propagation delay time and waveform stability mostly depend on parasitic components in the supply network. Moreover, propagation delay time depends on parasitic resistances and the stability depends on parasitic inductances.
The Horizontal Current Bipolar Transistors (HCBT) with different collector designs are characteri... more The Horizontal Current Bipolar Transistors (HCBT) with different collector designs are characterized by load-pull measurements at 0.9, 1.8, and 2.4 GHz to find the optimum HCBT structures for RF power amplifiers. Firstly, the DC collector current is chosen for each transistor considering the maximum power gain and the Kirk effect. The collector-emitter voltage is set at a value for which the maximum collector efficiency is achieved. The HCBT with the lowest-doped n-collector provides a wideband large-signal performance due to the near-50 Ω optimal impedances, achieving output power, gain, and efficiency of 21.8 dBm, 10.8 dB, and 45.3%, respectively, at 2.4 GHz. Due to a lower knee voltage, the HCBT with the highest doped n-collector provides the highest efficiency of 22.4% for low input powers, compared to 15.4% for the lowest-doped n-collector device. Therefore, various HCBT structures can be utilized to achieve wide bandwidth and high efficiency in the low-power region.
ABSTRACT A new horizontal current bipolar transistor (HCBT) is developed and integrated with a co... more ABSTRACT A new horizontal current bipolar transistor (HCBT) is developed and integrated with a commercial 0.18 mum CMOS technology resulting in a very low-cost BiCMOS technology suitable for wireless applications. The number of fabrication steps is significantly reduced in comparison to conventional vertical-current bipolar transistors. The optimum HCBT performance can be achieved by 3 additional masks to CMOS process while an even simpler version with 2 additional masks is also demonstrated. The integration of HCBT with bulk CMOS is achieved by introducing innovative process steps such as protecting the active transistor region during polysilicon etching by low-resistance native oxide, placement of high-doped emitter and collector regions in oxide trenches etc. The compact HCBT structure has small junction capacitances and fT and fmax of 34 GHz and 45 GHz, respectively, with BVCEO=3.4 V.
GaN-based heterostructures have been used in high-power radio frequency applications for a number... more GaN-based heterostructures have been used in high-power radio frequency applications for a number of years due to the wide bandgap of GaN and high values of spontaneous and piezoelectric polarization, resulting in high breakdown voltages and high 2D carrier concentrations. However, the accurate modeling of low-field electron mobility within such structures remains a topic of interest. This paper presents a comprehensive numerical model for calculating the carrier mobility within a 2D electron gas in AlxGa1−xN/GaN high electron mobility transistors. The model is based on solving the Schrödinger and Poisson equations self-consistently, taking into account the polarization charges at material interfaces and performing semi-classical numerical calculations of low-field electron mobility within the momentum relaxation time approximation, taking into account all relevant scattering mechanisms. Both intra- and inter-subband transitions are considered, and the differences in intra- and inter-subband scattering rates are analyzed for some of the key scattering mechanisms. The importance of including inter-subband transitions in the calculations is demonstrated by comparing the calculated results with experimentally measured mobilities.
ABSTRACT Double-balanced active mixer based on a Gilbert cell is designed and fabricated as the f... more ABSTRACT Double-balanced active mixer based on a Gilbert cell is designed and fabricated as the first RF circuit in Horizontal Current Bipolar Transistor (HCBT) technology. The maximum IIP3 of 17.7 dBm at mixer current of 9.2 mA and conversion gain of -5 dB are achieved. Three different HCBT structures are used in a mixer design to examine the effect of process parameters on mixer linearity. The main effect on the linearity has the n-collector doping profile since it governs the onset of Kirk effect. The improvement of 6 dB in IIP3 can be achieved by using the optimum HCBT structure, if switching quad transistors operate at or near the high current region. The circuit model parameters of three HCBT structures are extracted, accurately reproducing the measured device and circuit data.
ABSTRACT Methods for the extrinsic collector fabrication of the Horizontal Current Bipolar transi... more ABSTRACT Methods for the extrinsic collector fabrication of the Horizontal Current Bipolar transistor (HCBT) in 180 nm BiCMOS technology are presented. Electrical characteristics of the structure with implanted extrinsic collector and the structure which uses heavily doped n+ polysilicon for the extrinsic collector region are compared. Inferior RF performance of the HCBT with n+ poly extrinsic collector is attributed to increased collector series resistance. Both structures are analyzed by 2D process and device simulations. It is shown that increased collector resistance is associated eather with an interfacial layer between silicon n-hill and extrinsic collector polysilicon or collector contact resistance rather then with the collector polysilicon thickness.
ABSTRACT Even in the metallic regime, heavily doped polycrystalline silicon has high thermopower,... more ABSTRACT Even in the metallic regime, heavily doped polycrystalline silicon has high thermopower, but since recently, due its high resistivity combined with high thermal conductivity, silicon was not considered as a possible thermoelectric material. However, various reasons have encouraged investigations on polycrystalline silicon in order to enhance its TE properties. We discuss these reasons and give a short overview of the most promising results and works done in the field. We also present our incipient work on the LPCVD obtained polysilicon thin films annealed in various ways. The main important result we obtained so far is the high thermopower of a Si:B sample: +200 μV/K at room temperature; much higher than predicted for the common metals and the same as of Bi2Te3, the only thermoelectric material commercially used nowadays.
A new concept of silicon bipolar transistor technology is proposed. The resulting horizontal curr... more A new concept of silicon bipolar transistor technology is proposed. The resulting horizontal current bipolar transistor (HCBT) was simulated assuming the 1 μm technology. The surface of the device is at least one order of magnitude smaller than conventional SST devices with the same emitter area. The same doping profile as in known vertical current devices is achieved by simpler technology using single polysilicon layer, without conventional epitaxial and n+ buried layers and with reduced number of lithography masks and technological steps. The electrical analysis of HCBT results in maximum small signal current gain of 158, and maximum cutoff frequency of 16 GHz at UCE=3 V
Heavily phosphorus doped amorphous and polycrystalline silicon samples were prepared by the LPVCD... more Heavily phosphorus doped amorphous and polycrystalline silicon samples were prepared by the LPVCD (low pressure chemical vapour deposition) method at different deposition temperatures. Thereafter, samples were subjected to RTA (rapid thermal annealing) at 950 °C in different time intervals (10, 20, 30 and 45 s). In this way the structure of amorphous samples changed to polycrystalline and in all annealed samples the phosphorus electrical activation was achieved and defect density was reduced. Sheet resistance, although clearly decreasing with the RTA duration, does not significantly change with the annealing time. This behaviour can be ascribed to the high quantity of dopant concentration when the resistivity of polycrystalline silicon approaches the one of monocrystalline silicon and finally its limiting value. By analyzing the Fano type resonance on the transversal optical TO(Γ ) phonon mode, Raman spectroscopy served as a tool for distinguishing between the accumulation of the activated phosphorus atoms at the grain boundaries and inside the grains. The spectrum of the amorphous sample which was subjected to the longest annealing time reveals a shift and asymmetry of the same peak characteristic to the Fano interaction.
PureB silicon photodiodes have nm-shallow p+n junctions with which photons/electrons with penetra... more PureB silicon photodiodes have nm-shallow p+n junctions with which photons/electrons with penetration-depths of a few nanometer can be detected. PureB Single-Photon Avalanche Diodes (SPADs) were fabricated and analysed by 2D numerical modeling as an extension to TCAD software. The very shallow p+ -anode has high perimeter curvature that enhances the electric field. In SPADs, noise is quantified by the dark count rate (DCR) that is a measure for the number of false counts triggered by unwanted processes in the non-illuminated device. Just like for desired events, the probability a dark count increases with increasing electric field and the perimeter conditions are critical. In this work, the DCR was studied by two 2D methods of analysis: the “quasi-2D” (Q-2D) method where vertical 1D cross-sections were assumed for calculating the electron/hole avalanche-probabilities, and the “ionization-integral 2D” (II-2D) method where crosssections were placed where the maximum ionization-integrals were calculated. The Q-2D method gave satisfactory results in structures where the peripheral regions had a small contribution to the DCR, such as in devices with conventional deepjunction guard rings (GRs). Otherwise, the II-2D method proved to be much more precise. The results show that the DCR simulation methods are useful for optimizing the compromise between fill-factor and p-/n-doping profile design in SPAD devices. For the experimentally investigated PureB SPADs, excellent agreement of the measured and simulated DCR was achieved. This shows that although an implicit GR is attractively compact, the very shallow pn-junction gives a risk of having such a low breakdown voltage at the perimeter that the DCR of the device may be negatively impacted.
ABSTRACT In the last few years, silicon has drawn increased attention due to the possible applica... more ABSTRACT In the last few years, silicon has drawn increased attention due to the possible application as thermoelectric material. In this paper we are presenting the results of the investigation on several heavily phosphorus doped polycrystalline silicon thin films. The samples were prepared in LPCVD reactor and then subjected to rapid thermal annealing in different time intervals (20, 30 and 45 seconds). They are characterized using different techniques. Four point probe resistivity measurements, scanning electron microscopy and Raman spectroscopy are used to give a valuable insight into the structural characteristics such as the grain size, degree of crystallinity and the free carrier concentration. On the basis of the room temperature resistivity, concentration of free carriers was determined to be around 1·1020 cm-3 for all the samples. A special stress was set to the low temperature measurements which include resistivity measurements down to 4.2 K together with Seebeck coefficient data down to 80 K. These measurements enabled us to reveal some essential features of the electronic structure of the investigated systems. For all the samples, electrical resistivity shows the T3/2 dependence in the wide temperature range (for some samples even from 50 to 300 K). The resistivities of the samples show that the samples are in metallic regime from the lowest measured temperatures. The thermopower behavior suggests that we can treat the transport properties within the free electron model. A comprehensive study was made to combine suitable theories appropriate in the analysis of results.
ABSTRACT We report the results of a multi-scale transport modeling of ultra-narrow GNRs. Atomisti... more ABSTRACT We report the results of a multi-scale transport modeling of ultra-narrow GNRs. Atomistic NEGF approach is combined with semiclassical mobility modeling in order to quantify the sensitivity of mobility to edge defects. We find that the mobility in defected GNRs deteriorates more strongly as GNR width is scaled down compared to ideal devices, and that even the minimum mobility variation spans almost one order of magnitude.
The impact of bias configuration on DC operating point in large-signal operation is analyzed for ... more The impact of bias configuration on DC operating point in large-signal operation is analyzed for Horizontal Current Bipolar Transistor (HCBT) by time-domain load-pull measurements at 2.4 GHz. The two limiting cases, constant base-emitter voltage (c-VBE) and constant base current (c-IB), are investigated with respect to where the hard-limitation occurs, in the cut-off or saturation region. For the two cases, it is found that the linear operating range, in which the gain is flat, heavily depends on the hard-limitation type present. Additionally, operation above open-base breakdown voltage shows sharp decrease of DC collector current of 23 mA near compression point for c-IB bias. Finally, the c-V BE bias shows around 5% higher collector efficiency in the back-off range while targeting the same output power in I-dB compression point.
Radiation-hard photodiode structures implemented in medical applications are designed in 180-nm C... more Radiation-hard photodiode structures implemented in medical applications are designed in 180-nm CMOS technology. Designed photodiodes were tested against total ionizing doses (TIDs) of 100, 200, and 400 Gy(Si), respectively, and they show high stability in terms of dark current characteristics. After TID of 400 Gy(Si), the dark current increased by up to 15%, compared to the unirradiated characteristics values. TCAD electrical simulations were performed and calibrated with the dark current measurements in order to explain the impact of generated defects due to ionizing radiation. Parameters that are used to model TID radiation have been varied in physical boundaries in order to achieve the desired fitting with the measurements. It is shown that due to the filling of acceptor interface traps with electrons, the space charge region extends, but the extension is limited and partially compensated by the fixed positive charges in the silicon nitride layer. The presented photodiodes result in the improved radiation hardness over the design in 350-nm CMOS technology.
The 33rd International Convention MIPRO, May 24, 2010
ABSTRACT Emitter coupled logic (ECL) ring oscillator with typical integrated bipolar transistor i... more ABSTRACT Emitter coupled logic (ECL) ring oscillator with typical integrated bipolar transistor is examined. Waveform stability and propagation delay time are studied with respect to the parasitic RLC components in bias voltage resistance and the limited dimensions of circuit metallization. It is shown that the parasitic components in reference and current-source network of ECL inverter, for differential pair current (I C ) of 300 µA, don't have a significant effect. Results indicate that propagation delay time and waveform stability mostly depend on parasitic components in the supply network. Moreover, propagation delay time depends on parasitic resistances and the stability depends on parasitic inductances.
The Horizontal Current Bipolar Transistors (HCBT) with different collector designs are characteri... more The Horizontal Current Bipolar Transistors (HCBT) with different collector designs are characterized by load-pull measurements at 0.9, 1.8, and 2.4 GHz to find the optimum HCBT structures for RF power amplifiers. Firstly, the DC collector current is chosen for each transistor considering the maximum power gain and the Kirk effect. The collector-emitter voltage is set at a value for which the maximum collector efficiency is achieved. The HCBT with the lowest-doped n-collector provides a wideband large-signal performance due to the near-50 Ω optimal impedances, achieving output power, gain, and efficiency of 21.8 dBm, 10.8 dB, and 45.3%, respectively, at 2.4 GHz. Due to a lower knee voltage, the HCBT with the highest doped n-collector provides the highest efficiency of 22.4% for low input powers, compared to 15.4% for the lowest-doped n-collector device. Therefore, various HCBT structures can be utilized to achieve wide bandwidth and high efficiency in the low-power region.
ABSTRACT A new horizontal current bipolar transistor (HCBT) is developed and integrated with a co... more ABSTRACT A new horizontal current bipolar transistor (HCBT) is developed and integrated with a commercial 0.18 mum CMOS technology resulting in a very low-cost BiCMOS technology suitable for wireless applications. The number of fabrication steps is significantly reduced in comparison to conventional vertical-current bipolar transistors. The optimum HCBT performance can be achieved by 3 additional masks to CMOS process while an even simpler version with 2 additional masks is also demonstrated. The integration of HCBT with bulk CMOS is achieved by introducing innovative process steps such as protecting the active transistor region during polysilicon etching by low-resistance native oxide, placement of high-doped emitter and collector regions in oxide trenches etc. The compact HCBT structure has small junction capacitances and fT and fmax of 34 GHz and 45 GHz, respectively, with BVCEO=3.4 V.
GaN-based heterostructures have been used in high-power radio frequency applications for a number... more GaN-based heterostructures have been used in high-power radio frequency applications for a number of years due to the wide bandgap of GaN and high values of spontaneous and piezoelectric polarization, resulting in high breakdown voltages and high 2D carrier concentrations. However, the accurate modeling of low-field electron mobility within such structures remains a topic of interest. This paper presents a comprehensive numerical model for calculating the carrier mobility within a 2D electron gas in AlxGa1−xN/GaN high electron mobility transistors. The model is based on solving the Schrödinger and Poisson equations self-consistently, taking into account the polarization charges at material interfaces and performing semi-classical numerical calculations of low-field electron mobility within the momentum relaxation time approximation, taking into account all relevant scattering mechanisms. Both intra- and inter-subband transitions are considered, and the differences in intra- and inter-subband scattering rates are analyzed for some of the key scattering mechanisms. The importance of including inter-subband transitions in the calculations is demonstrated by comparing the calculated results with experimentally measured mobilities.
ABSTRACT Double-balanced active mixer based on a Gilbert cell is designed and fabricated as the f... more ABSTRACT Double-balanced active mixer based on a Gilbert cell is designed and fabricated as the first RF circuit in Horizontal Current Bipolar Transistor (HCBT) technology. The maximum IIP3 of 17.7 dBm at mixer current of 9.2 mA and conversion gain of -5 dB are achieved. Three different HCBT structures are used in a mixer design to examine the effect of process parameters on mixer linearity. The main effect on the linearity has the n-collector doping profile since it governs the onset of Kirk effect. The improvement of 6 dB in IIP3 can be achieved by using the optimum HCBT structure, if switching quad transistors operate at or near the high current region. The circuit model parameters of three HCBT structures are extracted, accurately reproducing the measured device and circuit data.
ABSTRACT Methods for the extrinsic collector fabrication of the Horizontal Current Bipolar transi... more ABSTRACT Methods for the extrinsic collector fabrication of the Horizontal Current Bipolar transistor (HCBT) in 180 nm BiCMOS technology are presented. Electrical characteristics of the structure with implanted extrinsic collector and the structure which uses heavily doped n+ polysilicon for the extrinsic collector region are compared. Inferior RF performance of the HCBT with n+ poly extrinsic collector is attributed to increased collector series resistance. Both structures are analyzed by 2D process and device simulations. It is shown that increased collector resistance is associated eather with an interfacial layer between silicon n-hill and extrinsic collector polysilicon or collector contact resistance rather then with the collector polysilicon thickness.
ABSTRACT Even in the metallic regime, heavily doped polycrystalline silicon has high thermopower,... more ABSTRACT Even in the metallic regime, heavily doped polycrystalline silicon has high thermopower, but since recently, due its high resistivity combined with high thermal conductivity, silicon was not considered as a possible thermoelectric material. However, various reasons have encouraged investigations on polycrystalline silicon in order to enhance its TE properties. We discuss these reasons and give a short overview of the most promising results and works done in the field. We also present our incipient work on the LPCVD obtained polysilicon thin films annealed in various ways. The main important result we obtained so far is the high thermopower of a Si:B sample: +200 μV/K at room temperature; much higher than predicted for the common metals and the same as of Bi2Te3, the only thermoelectric material commercially used nowadays.
A new concept of silicon bipolar transistor technology is proposed. The resulting horizontal curr... more A new concept of silicon bipolar transistor technology is proposed. The resulting horizontal current bipolar transistor (HCBT) was simulated assuming the 1 μm technology. The surface of the device is at least one order of magnitude smaller than conventional SST devices with the same emitter area. The same doping profile as in known vertical current devices is achieved by simpler technology using single polysilicon layer, without conventional epitaxial and n+ buried layers and with reduced number of lithography masks and technological steps. The electrical analysis of HCBT results in maximum small signal current gain of 158, and maximum cutoff frequency of 16 GHz at UCE=3 V
Heavily phosphorus doped amorphous and polycrystalline silicon samples were prepared by the LPVCD... more Heavily phosphorus doped amorphous and polycrystalline silicon samples were prepared by the LPVCD (low pressure chemical vapour deposition) method at different deposition temperatures. Thereafter, samples were subjected to RTA (rapid thermal annealing) at 950 °C in different time intervals (10, 20, 30 and 45 s). In this way the structure of amorphous samples changed to polycrystalline and in all annealed samples the phosphorus electrical activation was achieved and defect density was reduced. Sheet resistance, although clearly decreasing with the RTA duration, does not significantly change with the annealing time. This behaviour can be ascribed to the high quantity of dopant concentration when the resistivity of polycrystalline silicon approaches the one of monocrystalline silicon and finally its limiting value. By analyzing the Fano type resonance on the transversal optical TO(Γ ) phonon mode, Raman spectroscopy served as a tool for distinguishing between the accumulation of the activated phosphorus atoms at the grain boundaries and inside the grains. The spectrum of the amorphous sample which was subjected to the longest annealing time reveals a shift and asymmetry of the same peak characteristic to the Fano interaction.
PureB silicon photodiodes have nm-shallow p+n junctions with which photons/electrons with penetra... more PureB silicon photodiodes have nm-shallow p+n junctions with which photons/electrons with penetration-depths of a few nanometer can be detected. PureB Single-Photon Avalanche Diodes (SPADs) were fabricated and analysed by 2D numerical modeling as an extension to TCAD software. The very shallow p+ -anode has high perimeter curvature that enhances the electric field. In SPADs, noise is quantified by the dark count rate (DCR) that is a measure for the number of false counts triggered by unwanted processes in the non-illuminated device. Just like for desired events, the probability a dark count increases with increasing electric field and the perimeter conditions are critical. In this work, the DCR was studied by two 2D methods of analysis: the “quasi-2D” (Q-2D) method where vertical 1D cross-sections were assumed for calculating the electron/hole avalanche-probabilities, and the “ionization-integral 2D” (II-2D) method where crosssections were placed where the maximum ionization-integrals were calculated. The Q-2D method gave satisfactory results in structures where the peripheral regions had a small contribution to the DCR, such as in devices with conventional deepjunction guard rings (GRs). Otherwise, the II-2D method proved to be much more precise. The results show that the DCR simulation methods are useful for optimizing the compromise between fill-factor and p-/n-doping profile design in SPAD devices. For the experimentally investigated PureB SPADs, excellent agreement of the measured and simulated DCR was achieved. This shows that although an implicit GR is attractively compact, the very shallow pn-junction gives a risk of having such a low breakdown voltage at the perimeter that the DCR of the device may be negatively impacted.
ABSTRACT In the last few years, silicon has drawn increased attention due to the possible applica... more ABSTRACT In the last few years, silicon has drawn increased attention due to the possible application as thermoelectric material. In this paper we are presenting the results of the investigation on several heavily phosphorus doped polycrystalline silicon thin films. The samples were prepared in LPCVD reactor and then subjected to rapid thermal annealing in different time intervals (20, 30 and 45 seconds). They are characterized using different techniques. Four point probe resistivity measurements, scanning electron microscopy and Raman spectroscopy are used to give a valuable insight into the structural characteristics such as the grain size, degree of crystallinity and the free carrier concentration. On the basis of the room temperature resistivity, concentration of free carriers was determined to be around 1·1020 cm-3 for all the samples. A special stress was set to the low temperature measurements which include resistivity measurements down to 4.2 K together with Seebeck coefficient data down to 80 K. These measurements enabled us to reveal some essential features of the electronic structure of the investigated systems. For all the samples, electrical resistivity shows the T3/2 dependence in the wide temperature range (for some samples even from 50 to 300 K). The resistivities of the samples show that the samples are in metallic regime from the lowest measured temperatures. The thermopower behavior suggests that we can treat the transport properties within the free electron model. A comprehensive study was made to combine suitable theories appropriate in the analysis of results.
ABSTRACT We report the results of a multi-scale transport modeling of ultra-narrow GNRs. Atomisti... more ABSTRACT We report the results of a multi-scale transport modeling of ultra-narrow GNRs. Atomistic NEGF approach is combined with semiclassical mobility modeling in order to quantify the sensitivity of mobility to edge defects. We find that the mobility in defected GNRs deteriorates more strongly as GNR width is scaled down compared to ideal devices, and that even the minimum mobility variation spans almost one order of magnitude.
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Papers by Tomislav Suligoj