About Me

I am currently a Ph.D. student at the University of Chinese Academy of Sciences (UCAS) and the Institute of Software, Chinese Academy of Sciences (ISCAS), under the supervision of Professor Qiusong Yang. I received my bachelor’s degree in Marine Technology from Ocean University of China (OUC) in 2021. My research interests focus on hardware formal verification.

Publications

• DAC’25 Property-driven Parallel Symbolic Model Checking of LTL

  Yuheng Su, Yingcheng Li, Qiusong Yang, Yiwei Ci, Ziyu Huang

  62nd ACM/IEEE Design Automation Conference (DAC), 2025.

• DAC’24 Predicting Lemmas in Generalization of IC3

  Yuheng Su, Qiusong Yang, Yiwei Ci

  61st ACM/IEEE Design Automation Conference (DAC), 2024.

Awards & Honors

• Gold Medals, Bit-Level and Word-Level Bit-Vector Tracks, 2024 Hardware Model Checking Competition (HWMCC’24)

• Gold Medal, 2019 ACM International Collegiate Programming Contest (ICPC), Asia Regional Contest, Yinchuan Site

• Silver Medal, 2018 ACM International Collegiate Programming Contest (ICPC), Asia Regional Contest, Qingdao Site

• First Prize, C++ A Group, 2019 Blue Bridge Cup Software and Information Technology Professional Competition National Finals

• Champion, 2019 Ocean University of China Programming Contest

Experience

• Huawei 2012 Laboratories, Central Software Institute, OS Kernel Lab (May 2020 – Sep 2020)

• ByteDance Fundamental Infrastructure Department (Mar 2021 – Sep 2021)

Tools

• rIC3

  A hardware formal verification model checker that won first place in the Hardware Model Checking Competition 2024 (HWMCC24).