Remove support for HPPA (a/k/a PA-RISC) architecture.

This old CPU architecture hasn't been produced in decades, and
whatever instances might still survive are surely too underpowered
for anyone to consider running Postgres on in production.  We'd
nonetheless continued to carry code support for it (largely at my
insistence), because its unique implementation of spinlocks seemed
like a good edge case for our spinlock infrastructure.  However,
our last buildfarm animal of this type was retired last year, and
it seems quite unlikely that another will emerge.  Without the ability
to run tests, the argument that this is useful test code fails to
hold water.  Furthermore, carrying code support for an untestable
architecture has costs not to be ignored.  So, remove HPPA-specific
code, in the same vein as commits 718aa43a4 and 92d70b77e.

Discussion: https://postgr.es/m/3351991.1697728588@sss.pgh.pa.us

diff --git a/contrib/pgcrypto/crypt-blowfish.c b/contrib/pgcrypto/crypt-blowfish.c
index 1264eccb3f248deece4896939e952f37bc799f07..5a1b1e1009161c9624a523da89a893aec3355fd3 100644 (file)
--- a/contrib/pgcrypto/crypt-blowfish.c
+++ b/contrib/pgcrypto/crypt-blowfish.c
@@ -41,7 +41,7 @@
 #ifdef __i386__
 #define BF_ASM             0   /* 1 */
 #define BF_SCALE           1
-#elif defined(__x86_64__) || defined(__hppa__)
+#elif defined(__x86_64__)
 #define BF_ASM             0
 #define BF_SCALE           1
 #else

diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml
index c39bcb3ee7c1b350697fbe8537300339371a472f..4784834ab9fd42f6a8cb4abd0645d56fb170c619 100644 (file)
--- a/doc/src/sgml/installation.sgml
+++ b/doc/src/sgml/installation.sgml
@@ -3390,8 +3390,8 @@ export MANPATH
 
   <para>
    In general, <productname>PostgreSQL</productname> can be expected to work on
-   these CPU architectures: x86, PowerPC, S/390, SPARC, ARM, MIPS, RISC-V,
-   and PA-RISC, including
+   these CPU architectures: x86, PowerPC, S/390, SPARC, ARM, MIPS,
+   and RISC-V, including
    big-endian, little-endian, 32-bit, and 64-bit variants where applicable.
    It is often
    possible to build on an unsupported CPU type by configuring with
@@ -3422,7 +3422,8 @@ export MANPATH
   <para>
    Historical versions of <productname>PostgreSQL</productname> or POSTGRES
    also ran on CPU architectures including Alpha, Itanium, M32R, M68K,
-   M88K, NS32K, SuperH, and VAX, and operating systems including 4.3BSD, AIX, BEOS,
+   M88K, NS32K, PA-RISC, SuperH, and VAX,
+   and operating systems including 4.3BSD, AIX, BEOS,
    BSD/OS, DG/UX, Dynix, HP-UX, IRIX, NeXTSTEP, QNX, SCO, SINIX, Sprite, SunOS,
    Tru64 UNIX, and ULTRIX.
   </para>

diff --git a/src/backend/storage/lmgr/s_lock.c b/src/backend/storage/lmgr/s_lock.c
index 9b389d9951248df11e83fe645db993a823571986..cba48b3e778d74b1fe771990cd478d409e98e052 100644 (file)
--- a/src/backend/storage/lmgr/s_lock.c
+++ b/src/backend/storage/lmgr/s_lock.c
@@ -116,12 +116,7 @@ s_lock(volatile slock_t *lock, const char *file, int line, const char *func)
 void
 s_unlock(volatile slock_t *lock)
 {
-#ifdef TAS_ACTIVE_WORD
-   /* HP's PA-RISC */
-   *TAS_ACTIVE_WORD(lock) = -1;
-#else
    *lock = 0;
-#endif
 }
 #endif
 

diff --git a/src/include/port/atomics.h b/src/include/port/atomics.h
index 78987f3154a3f587fd5f4deff9cb384b5d2fe0a8..c911c6b9564daa8f7b4e66f0c045d3acbc6d16db 100644 (file)
--- a/src/include/port/atomics.h
+++ b/src/include/port/atomics.h
@@ -69,8 +69,6 @@
 #include "port/atomics/arch-x86.h"
 #elif defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__) || defined(__powerpc64__)
 #include "port/atomics/arch-ppc.h"
-#elif defined(__hppa) || defined(__hppa__)
-#include "port/atomics/arch-hppa.h"
 #endif
 
 /*

diff --git a/src/include/port/atomics/arch-hppa.h b/src/include/port/atomics/arch-hppa.h
deleted file mode 100644 (file)
index 50812a7..0000000
--- a/src/include/port/atomics/arch-hppa.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*-------------------------------------------------------------------------
- *
- * arch-hppa.h
- *   Atomic operations considerations specific to HPPA
- *
- * Portions Copyright (c) 1996-2024, PostgreSQL Global Development Group
- * Portions Copyright (c) 1994, Regents of the University of California
- *
- * NOTES:
- *
- * src/include/port/atomics/arch-hppa.h
- *
- *-------------------------------------------------------------------------
- */
-
-/* HPPA doesn't do either read or write reordering */
-#define pg_memory_barrier_impl()       pg_compiler_barrier_impl()

diff --git a/src/include/port/atomics/fallback.h b/src/include/port/atomics/fallback.h
index 71c1df5d28ce7e9d337f0cf981a0478d44285f41..34cfee110fb12acd5aecae5608426a41f351c5de 100644 (file)
--- a/src/include/port/atomics/fallback.h
+++ b/src/include/port/atomics/fallback.h
@@ -75,11 +75,7 @@ typedef struct pg_atomic_flag
     * be content with just one byte instead of 4, but that's not too much
     * waste.
     */
-#if defined(__hppa) || defined(__hppa__)   /* HP PA-RISC, GCC and HP compilers */
-   int         sema[4];
-#else
    int         sema;
-#endif
    volatile bool value;
 } pg_atomic_flag;
 
@@ -93,11 +89,7 @@ typedef struct pg_atomic_flag
 typedef struct pg_atomic_uint32
 {
    /* Check pg_atomic_flag's definition above for an explanation */
-#if defined(__hppa) || defined(__hppa__)   /* HP PA-RISC */
-   int         sema[4];
-#else
    int         sema;
-#endif
    volatile uint32 value;
 } pg_atomic_uint32;
 
@@ -111,11 +103,7 @@ typedef struct pg_atomic_uint32
 typedef struct pg_atomic_uint64
 {
    /* Check pg_atomic_flag's definition above for an explanation */
-#if defined(__hppa) || defined(__hppa__)   /* HP PA-RISC */
-   int         sema[4];
-#else
    int         sema;
-#endif
    volatile uint64 value;
 } pg_atomic_uint64;
 

diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index 29ac6cdcd928baa3b04e47fc3b9c990d43d83175..02c68513a534e63c42c3fa743f6df2e3c7116603 100644 (file)
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -526,71 +526,6 @@ do \
 #endif /* __mips__ && !__sgi */
 
 
-#if defined(__hppa) || defined(__hppa__)   /* HP PA-RISC */
-/*
- * HP's PA-RISC
- *
- * Because LDCWX requires a 16-byte-aligned address, we declare slock_t as a
- * 16-byte struct.  The active word in the struct is whichever has the aligned
- * address; the other three words just sit at -1.
- */
-#define HAS_TEST_AND_SET
-
-typedef struct
-{
-   int         sema[4];
-} slock_t;
-
-#define TAS_ACTIVE_WORD(lock)  ((volatile int *) (((uintptr_t) (lock) + 15) & ~15))
-
-static __inline__ int
-tas(volatile slock_t *lock)
-{
-   volatile int *lockword = TAS_ACTIVE_WORD(lock);
-   int         lockval;
-
-   /*
-    * The LDCWX instruction atomically clears the target word and
-    * returns the previous value.  Hence, if the instruction returns
-    * 0, someone else has already acquired the lock before we tested
-    * it (i.e., we have failed).
-    *
-    * Notice that this means that we actually clear the word to set
-    * the lock and set the word to clear the lock.  This is the
-    * opposite behavior from the SPARC LDSTUB instruction.  For some
-    * reason everything that H-P does is rather baroque...
-    *
-    * For details about the LDCWX instruction, see the "Precision
-    * Architecture and Instruction Reference Manual" (09740-90014 of June
-    * 1987), p. 5-38.
-    */
-   __asm__ __volatile__(
-       "   ldcwx   0(0,%2),%0  \n"
-:      "=r"(lockval), "+m"(*lockword)
-:      "r"(lockword)
-:      "memory");
-   return (lockval == 0);
-}
-
-#define S_UNLOCK(lock) \
-   do { \
-       __asm__ __volatile__("" : : : "memory"); \
-       *TAS_ACTIVE_WORD(lock) = -1; \
-   } while (0)
-
-#define S_INIT_LOCK(lock) \
-   do { \
-       volatile slock_t *lock_ = (lock); \
-       lock_->sema[0] = -1; \
-       lock_->sema[1] = -1; \
-       lock_->sema[2] = -1; \
-       lock_->sema[3] = -1; \
-   } while (0)
-
-#define S_LOCK_FREE(lock)  (*TAS_ACTIVE_WORD(lock) != 0)
-
-#endif  /* __hppa || __hppa__ */
-
 
 /*
  * If we have no platform-specific knowledge, but we found that the compiler

diff --git a/src/tools/pginclude/headerscheck b/src/tools/pginclude/headerscheck
index 4a157d0a5f259f97a1e6c6f933568e87ed722f51..436e2b92a334daca0a548eb35f5ccac48685f25a 100755 (executable)
--- a/src/tools/pginclude/headerscheck
+++ b/src/tools/pginclude/headerscheck
@@ -107,12 +107,10 @@ do
    # Likewise, these files are platform-specific, and the one
    # relevant to our platform will be included by atomics.h.
    test "$f" = src/include/port/atomics/arch-arm.h && continue
-   test "$f" = src/include/port/atomics/arch-hppa.h && continue
    test "$f" = src/include/port/atomics/arch-ppc.h && continue
    test "$f" = src/include/port/atomics/arch-x86.h && continue
    test "$f" = src/include/port/atomics/fallback.h && continue
    test "$f" = src/include/port/atomics/generic.h && continue
-   test "$f" = src/include/port/atomics/generic-acc.h && continue
    test "$f" = src/include/port/atomics/generic-gcc.h && continue
    test "$f" = src/include/port/atomics/generic-msvc.h && continue
    test "$f" = src/include/port/atomics/generic-sunpro.h && continue