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7 | 7 | *
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8 | 8 | *
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9 | 9 | * IDENTIFICATION
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10 |
| - * $Header: /cvsroot/pgsql/src/include/storage/s_lock.h,v 1.66 1999/11/18 21:47:41 momjian Exp $ |
| 10 | + * $Header: /cvsroot/pgsql/src/include/storage/s_lock.h,v 1.67 1999/11/23 19:47:13 momjian Exp $ |
11 | 11 | *
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12 | 12 | *-------------------------------------------------------------------------
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13 | 13 | */
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@@ -78,35 +78,6 @@ extern void s_lock_sleep(unsigned spin);
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78 | 78 | * All the gcc inlines
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79 | 79 | */
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80 | 80 |
|
81 |
| -#if defined(__alpha__) |
82 |
| -#define TAS(lock) tas(lock) |
83 |
| -#define S_UNLOCK(lock) { __asm__("mb"); *(lock) = 0; } |
84 |
| - |
85 |
| -static __inline__ int |
86 |
| -tas(volatile slock_t *lock) |
87 |
| -{ |
88 |
| - register slock_t _res; |
89 |
| - |
90 |
| -__asm__(" ldq $0, %0 \n\ |
91 |
| - bne $0, 3f \n\ |
92 |
| - ldq_l $0, %0 \n\ |
93 |
| - bne $0, 3f \n\ |
94 |
| - or $31, 1, $0 \n\ |
95 |
| - stq_c $0, %0 \n\ |
96 |
| - beq $0, 2f \n\ |
97 |
| - bis $31, $31, %1 \n\ |
98 |
| - mb \n\ |
99 |
| - jmp $31, 4f \n\ |
100 |
| - 2: or $31, 1, $0 \n\ |
101 |
| - 3: bis $0, $0, %1 \n\ |
102 |
| - 4: nop ": "=m"(*lock), "=r"(_res): :"0"); |
103 |
| - |
104 |
| - return (int) _res; |
105 |
| -} |
106 |
| - |
107 |
| -#endif /* __alpha__ */ |
108 |
| - |
109 |
| - |
110 | 81 |
|
111 | 82 | #if defined(__i386__)
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112 | 83 | #define TAS(lock) tas(lock)
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@@ -226,20 +197,6 @@ tas(volatile slock_t *lock)
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226 | 197 | * All non gcc
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227 | 198 | */
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228 | 199 |
|
229 |
| -#if defined(__alpha__) |
230 |
| -/* |
231 |
| - * OSF/1 (Alpha AXP) |
232 |
| - * |
233 |
| - * Note that slock_t on the Alpha AXP is msemaphore instead of char |
234 |
| - * (see storage/ipc.h). |
235 |
| - */ |
236 |
| -#define TAS(lock) (msem_lock((lock), MSEM_IF_NOWAIT) < 0) |
237 |
| -#define S_UNLOCK(lock) msem_unlock((lock), 0) |
238 |
| -#define S_INIT_LOCK(lock) msem_init((lock), MSEM_UNLOCKED) |
239 |
| -#define S_LOCK_FREE(lock) (!(lock)->msem_state) |
240 |
| -#endif /* __alpha__ */ |
241 |
| - |
242 |
| - |
243 | 200 |
|
244 | 201 | #if defined(NEED_I386_TAS_ASM)
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245 | 202 | /* non gcc i386 based things */
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@@ -272,6 +229,52 @@ tas(slock_t *s_lock)
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272 | 229 | * These are the platforms that have common code for gcc and non-gcc
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273 | 230 | */
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274 | 231 |
|
| 232 | + |
| 233 | +#if defined(__alpha) |
| 234 | + |
| 235 | +#if defined(__osf__) |
| 236 | +/* |
| 237 | + * OSF/1 (Alpha AXP) |
| 238 | + * |
| 239 | + * Note that slock_t on the Alpha AXP is msemaphore instead of char |
| 240 | + * (see storage/ipc.h). |
| 241 | + */ |
| 242 | +#define TAS(lock) (msem_lock((lock), MSEM_IF_NOWAIT) < 0) |
| 243 | +#define S_UNLOCK(lock) msem_unlock((lock), 0) |
| 244 | +#define S_INIT_LOCK(lock) msem_init((lock), MSEM_UNLOCKED) |
| 245 | +#define S_LOCK_FREE(lock) (!(lock)->msem_state) |
| 246 | + |
| 247 | +#else /* i.e. not __osf__ */ |
| 248 | + |
| 249 | +#define TAS(lock) tas(lock) |
| 250 | +#define S_UNLOCK(lock) { __asm__("mb"); *(lock) = 0; } |
| 251 | + |
| 252 | +static __inline__ int |
| 253 | +tas(volatile slock_t *lock) |
| 254 | +{ |
| 255 | + register slock_t _res; |
| 256 | + |
| 257 | +__asm__(" ldq $0, %0 \n\ |
| 258 | + bne $0, 3f \n\ |
| 259 | + ldq_l $0, %0 \n\ |
| 260 | + bne $0, 3f \n\ |
| 261 | + or $31, 1, $0 \n\ |
| 262 | + stq_c $0, %0 \n\ |
| 263 | + beq $0, 2f \n\ |
| 264 | + bis $31, $31, %1 \n\ |
| 265 | + mb \n\ |
| 266 | + jmp $31, 4f \n\ |
| 267 | + 2: or $31, 1, $0 \n\ |
| 268 | + 3: bis $0, $0, %1 \n\ |
| 269 | + 4: nop ": "=m"(*lock), "=r"(_res): :"0"); |
| 270 | + |
| 271 | + return (int) _res; |
| 272 | +} |
| 273 | +#endif /* __osf__ */ |
| 274 | + |
| 275 | +#endif /* __alpha */ |
| 276 | + |
| 277 | + |
275 | 278 | #if defined(__hpux)
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276 | 279 | /*
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277 | 280 | * HP-UX (PA-RISC)
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|
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