Pre-harvest fruit drop resulted in the change in physiology of dropped fruits and the source leav... more Pre-harvest fruit drop resulted in the change in physiology of dropped fruits and the source leaves which supported the growth and development of such fruits. Photosynthetic pigments were low in leaves and rind; sugars in leaves, rind and pulp, and total soluble solids in the juice. Citric acid and ascorbic acid contents were high in the juice. A significant decrease in oil content and change in fatty acid composition was recorded in the seeds of the dropped fruits.
Routing protocols are utmostneeded for communication between source nodes and sink node, least di... more Routing protocols are utmostneeded for communication between source nodes and sink node, least disruptive & more efficient. The performance of the network and reliability is generally determined by selecting appropriate routing protocol. Since energy consumption has become crucial problem in WSNs, therefore Energy Efficient (EE) routing protocols have been introduced such as balanced energy-efficient network-integrated super heterogeneous (BEENISH), improved-BEENISH and enhanced-BEENISH. Optimization techniques are mandatory for achieving desired goals, minimizing energy depletion and maximizing network’s life. The aim of this article is to extend the network’s life and stability of sensing nodes through the use of heterogeneity factors such as alive nodes, dead nodes, throughput and average residual energy by using the cross-search based balanced energy efficiency network integrated super heterogeneous(CR-BEENISH) optimization technique.
Among the available detection techniques for the identification of abnormality present in the bra... more Among the available detection techniques for the identification of abnormality present in the brain, MRI is a best technique. This paper presents a method to distinguish the abnormal brain images from the normal ones in the database available. The procedure involves preprocessing, feature extraction and classification. Ensemble based classification is done using neural network and Jaya Algorithm helps in optimizing the threshold value used for classification.
— This paper encapsulates the properties and implementation areas of Artificial Magnetic Conducto... more — This paper encapsulates the properties and implementation areas of Artificial Magnetic Conductor(AMC). It is characterized by having high surface impedance. The geometry of this structure is such that it does not support the propagation of surface waves and acts as a good ground plane in comparison to conventional metal conductors. Also, it reflects the waves in-phase rather than out of phase. Thus it is applicable to a variety of electromagnetic problems stressing upon the usage of low profile antennas. The surface can be realized using printed circuit board technology, in which the vertical connections are formed by metal plated vias (vertical interconnect access) which connect the metal plates on the top surface of the structure to a solid conducting ground plane on the bottom surface.
In this paper, Triangular GAA NW FET has been designed for silicon and GaAs as channel materials ... more In this paper, Triangular GAA NW FET has been designed for silicon and GaAs as channel materials of 20nm gate length. The performance of GAA NW FETs are calculated and compared in terms of transfer characteristics, output characteristics, I ON current, switching speed, leakage current, Drain Induced Barrier Lowering (DIBL), Sub-threshold Swing (SS) and threshold voltage (V TH). After comparison it was observed that GaAs NW FET is showing better performance i.e. low DIBL and low SS and lower leakage current where Silicon NW FET offers high on current. Further effects of temperature on the performance of the devices have been investigated with assist of 3D TCAD simulations. Investigation shows that GaAs NW FET shows better performance as compared to silicon NW FET in terms of leakage current, I ON /I OFF ratio and SCEs like SS and DIBL whereas Si NW FET show high on current (I ON).
Scaling of standard CMOS is becoming difficult due to rising subthreshold leakage and gate leakag... more Scaling of standard CMOS is becoming difficult due to rising subthreshold leakage and gate leakage. FinFETs i.e. Multi-gate FETs have come out as the most assuring contenders to extend the scaling of CMOS insub-25nm region this is because of more electrostatic control due to use of multiple gatesover the channel which lowers the coupling between drain and source in the subthreshold regime. Driving capability is increased for low voltage designs by using SOI FinFETs. In this paper, designing and performance analysis in terms of V-I characteristics of 20nm 7-fin SOI FinFET is discussed..
Inverter is truly the nucleus of electronics industry. It is the main building block of everyday ... more Inverter is truly the nucleus of electronics industry. It is the main building block of everyday appliances i.e. microwaves, power tools, battery chargers, air conditioners and computers etc. In this paper, CMOS technology has been chosen to study the transient and dc characteristics of an inverter. Feature size is the main parameter to study the voltage transfer characteristics of inverter, for which length and width of transistors is varied. Further, CMOS inverters can be paralleled for increased power to drive higher current loads. Simulations are run on cadence design tool and the schematic diagrams are drawn in virtuoso schematic editor using 180nm technology file.
2017 International Conference on Computing, Communication and Automation (ICCCA), 2017
Due to scaling of traditional MOS devices into nanometer range, the constraints like power and pe... more Due to scaling of traditional MOS devices into nanometer range, the constraints like power and performance restrict its lastingness in future circuit design. The trigate FinFET has emanated as propitious device for better electrostatic characteristics in terms of Short Channel Effects (SCEs) etc. In this work, the design and analysis of 5-fin SOI FinFET at 20nm technology has been done using 3 Dimensional Cogenda Technology Computer-Aided Design numerical simulators (3D Cogenda TCAD) for different channel material. The device simulations are based on the self-consistent solution of Poisson and drift diffusion equations. The Electrical performance of multifin SOI FinFET for different channel material like Si, GaAs, SiGe and SiC3C are demonstrated. It was observed that SiC3Cas channel material presents maximum Ion/Ioff ratio (1.90E+11) and minimum leakage current (7.00E-19 A), whereas GaAs channel material has improved Subthreshold Swing (58mV/dec) as compared to others. The Silicon channel exhibits highest value of Ion i.e. 5.03E-06A.
International journal of artificial intelligence, 2020
Geometry parameters, fin height (HFin) and fin width (WFin), critically affect the performance of... more Geometry parameters, fin height (HFin) and fin width (WFin), critically affect the performance of FinFET devices. These parametric variations have been assessed in the present work by designing silicon-on-insulator (SOI) fin-shaped field effect transistor (FinFET) device with optimum metrics. In this work, the designed devices show diminished Short channel effects and ameliorated analog parameters for the different range of HFin, Lg, and WFin orLg using 3D Visual Technology Computer-Aided Design (TCAD) simulator. Further after training the artificial neural network with a set of parameters and delineating the fitness function, genetic algorithm (GA) and Whale optimization algorithm (WOA) have been implemented. Corresponding to the minimal fitness function, a pair of optimized metrics has been provided in less time using the weighted sum approach. It is observed that the taller and wider fins serve the need of high ION, larger intrinsic gain and a better early voltage whereas narrow ...
Today, Fin shaped Field Effect Transistors (FinFETs) are the framework of the sub-nanometer techn... more Today, Fin shaped Field Effect Transistors (FinFETs) are the framework of the sub-nanometer technology node. The leading semiconductor industry deploys it in low-power (LP) and high-performance (HP) applications due to its better electrostatic control and exceptional scalability. In this paper, a novel optimized and miniaturized Xmas tree-shaped FinFET was designed that provides reduced short channel effects and better analog parameters as compared to the planar Metal Oxide Semiconductor Field Effect transistor. This proposed structure was devised with the Genetic Algorithm (GA) and Whale optimization Algorithm (WOA) along with the Artificial Neural Network (ANN). The dataset used in ANN training was created through designing and simulating the Xmas tree shaped FinFET structure by varying its Fin-width (WFin) and Fin-height (HFin). Through ANN-GA and ANN-WOA optimization, the optimal value of WFin and HFin was calculated at the minimum Subthreshold Swing (SS) and off-current (IOFF) ...
Advances in Intelligent Systems and Computing, 2020
In this paper, the impact of high-k dielectric gate oxide and work function variation on the elec... more In this paper, the impact of high-k dielectric gate oxide and work function variation on the electrical characteristics of the Vertical Slit Field Effect Transistor through 3D-TCAD Cogenda simulation tools has been studied. The gate work function is varied from 4.25 to 4.5 eV and high-k gate dielectric permittivity lies in the range of 10 to 35 for tied gates of device. The transistor electrical parameters such as on-current, off-current, the ratio of on-current to off-current, subthreshold swing, transconductance and transconductance generation factor are extracted from the device characteristics curve. Higher the gate work function is, the smaller is the leakage current produces at the cost of on-current. On the other side, the use of higher value of gate dielectric constant (k = 35) results in lower subthreshold swing (69 mV/dec), reduced off-current (2.26E-13), higher on-current (6.13E-5), enhanced on-current to off-current ratio (in order of 108), improved tranconductance and transconductance generation factor.
Journal of Nanoelectronics and Optoelectronics, 2020
Today, Fin shaped Field Effect Transistors (FinFETs) are the foundation of the sub-nanometer tech... more Today, Fin shaped Field Effect Transistors (FinFETs) are the foundation of the sub-nanometer technology node. The semiconductor industry endorses it in low-power (LP) and high-performance (HP) applications due to its better electrostatic control and exceptional scalability. In this paper, the structure of an inverted funnel-shaped FinFET device with a high-k stacked gate has been optimized using integrated Artificial Neural Network (ANN) and genetic algorithm (GA) approach. The comparative analysis of rectangular FinFET, trapezoidal FinFET and proposed novel shaped FinFET has also been explored. The electrical and analog performance parameters of the novel device present better performance results with respect to the other two transistors. In ANN training, the three datasets have been created by varying the metrics such as equivalent oxide thickness (EOT) and dielectric constant (k) of novel shaped FinFET device in Technology computeraided design simulator (TCAD). The amalgamation t...
This paper encapsulates the properties and implementation areas of Artificial Magnetic Conductor(... more This paper encapsulates the properties and implementation areas of Artificial Magnetic Conductor(AMC). It is characterized by having high surface impedance. The geometry of this structure is such that it does not support the propagation of surface waves and acts as a good ground plane in comparison to conventional metal conductors. Also, it reflects the waves in-phase rather than out of phase. Thus it is applicable to a variety of electromagnetic problems stressing upon the usage of low profile antennas.
Pre-harvest fruit drop resulted in the change in physiology of dropped fruits and the source leav... more Pre-harvest fruit drop resulted in the change in physiology of dropped fruits and the source leaves which supported the growth and development of such fruits. Photosynthetic pigments were low in leaves and rind; sugars in leaves, rind and pulp, and total soluble solids in the juice. Citric acid and ascorbic acid contents were high in the juice. A significant decrease in oil content and change in fatty acid composition was recorded in the seeds of the dropped fruits.
Routing protocols are utmostneeded for communication between source nodes and sink node, least di... more Routing protocols are utmostneeded for communication between source nodes and sink node, least disruptive & more efficient. The performance of the network and reliability is generally determined by selecting appropriate routing protocol. Since energy consumption has become crucial problem in WSNs, therefore Energy Efficient (EE) routing protocols have been introduced such as balanced energy-efficient network-integrated super heterogeneous (BEENISH), improved-BEENISH and enhanced-BEENISH. Optimization techniques are mandatory for achieving desired goals, minimizing energy depletion and maximizing network’s life. The aim of this article is to extend the network’s life and stability of sensing nodes through the use of heterogeneity factors such as alive nodes, dead nodes, throughput and average residual energy by using the cross-search based balanced energy efficiency network integrated super heterogeneous(CR-BEENISH) optimization technique.
Among the available detection techniques for the identification of abnormality present in the bra... more Among the available detection techniques for the identification of abnormality present in the brain, MRI is a best technique. This paper presents a method to distinguish the abnormal brain images from the normal ones in the database available. The procedure involves preprocessing, feature extraction and classification. Ensemble based classification is done using neural network and Jaya Algorithm helps in optimizing the threshold value used for classification.
— This paper encapsulates the properties and implementation areas of Artificial Magnetic Conducto... more — This paper encapsulates the properties and implementation areas of Artificial Magnetic Conductor(AMC). It is characterized by having high surface impedance. The geometry of this structure is such that it does not support the propagation of surface waves and acts as a good ground plane in comparison to conventional metal conductors. Also, it reflects the waves in-phase rather than out of phase. Thus it is applicable to a variety of electromagnetic problems stressing upon the usage of low profile antennas. The surface can be realized using printed circuit board technology, in which the vertical connections are formed by metal plated vias (vertical interconnect access) which connect the metal plates on the top surface of the structure to a solid conducting ground plane on the bottom surface.
In this paper, Triangular GAA NW FET has been designed for silicon and GaAs as channel materials ... more In this paper, Triangular GAA NW FET has been designed for silicon and GaAs as channel materials of 20nm gate length. The performance of GAA NW FETs are calculated and compared in terms of transfer characteristics, output characteristics, I ON current, switching speed, leakage current, Drain Induced Barrier Lowering (DIBL), Sub-threshold Swing (SS) and threshold voltage (V TH). After comparison it was observed that GaAs NW FET is showing better performance i.e. low DIBL and low SS and lower leakage current where Silicon NW FET offers high on current. Further effects of temperature on the performance of the devices have been investigated with assist of 3D TCAD simulations. Investigation shows that GaAs NW FET shows better performance as compared to silicon NW FET in terms of leakage current, I ON /I OFF ratio and SCEs like SS and DIBL whereas Si NW FET show high on current (I ON).
Scaling of standard CMOS is becoming difficult due to rising subthreshold leakage and gate leakag... more Scaling of standard CMOS is becoming difficult due to rising subthreshold leakage and gate leakage. FinFETs i.e. Multi-gate FETs have come out as the most assuring contenders to extend the scaling of CMOS insub-25nm region this is because of more electrostatic control due to use of multiple gatesover the channel which lowers the coupling between drain and source in the subthreshold regime. Driving capability is increased for low voltage designs by using SOI FinFETs. In this paper, designing and performance analysis in terms of V-I characteristics of 20nm 7-fin SOI FinFET is discussed..
Inverter is truly the nucleus of electronics industry. It is the main building block of everyday ... more Inverter is truly the nucleus of electronics industry. It is the main building block of everyday appliances i.e. microwaves, power tools, battery chargers, air conditioners and computers etc. In this paper, CMOS technology has been chosen to study the transient and dc characteristics of an inverter. Feature size is the main parameter to study the voltage transfer characteristics of inverter, for which length and width of transistors is varied. Further, CMOS inverters can be paralleled for increased power to drive higher current loads. Simulations are run on cadence design tool and the schematic diagrams are drawn in virtuoso schematic editor using 180nm technology file.
2017 International Conference on Computing, Communication and Automation (ICCCA), 2017
Due to scaling of traditional MOS devices into nanometer range, the constraints like power and pe... more Due to scaling of traditional MOS devices into nanometer range, the constraints like power and performance restrict its lastingness in future circuit design. The trigate FinFET has emanated as propitious device for better electrostatic characteristics in terms of Short Channel Effects (SCEs) etc. In this work, the design and analysis of 5-fin SOI FinFET at 20nm technology has been done using 3 Dimensional Cogenda Technology Computer-Aided Design numerical simulators (3D Cogenda TCAD) for different channel material. The device simulations are based on the self-consistent solution of Poisson and drift diffusion equations. The Electrical performance of multifin SOI FinFET for different channel material like Si, GaAs, SiGe and SiC3C are demonstrated. It was observed that SiC3Cas channel material presents maximum Ion/Ioff ratio (1.90E+11) and minimum leakage current (7.00E-19 A), whereas GaAs channel material has improved Subthreshold Swing (58mV/dec) as compared to others. The Silicon channel exhibits highest value of Ion i.e. 5.03E-06A.
International journal of artificial intelligence, 2020
Geometry parameters, fin height (HFin) and fin width (WFin), critically affect the performance of... more Geometry parameters, fin height (HFin) and fin width (WFin), critically affect the performance of FinFET devices. These parametric variations have been assessed in the present work by designing silicon-on-insulator (SOI) fin-shaped field effect transistor (FinFET) device with optimum metrics. In this work, the designed devices show diminished Short channel effects and ameliorated analog parameters for the different range of HFin, Lg, and WFin orLg using 3D Visual Technology Computer-Aided Design (TCAD) simulator. Further after training the artificial neural network with a set of parameters and delineating the fitness function, genetic algorithm (GA) and Whale optimization algorithm (WOA) have been implemented. Corresponding to the minimal fitness function, a pair of optimized metrics has been provided in less time using the weighted sum approach. It is observed that the taller and wider fins serve the need of high ION, larger intrinsic gain and a better early voltage whereas narrow ...
Today, Fin shaped Field Effect Transistors (FinFETs) are the framework of the sub-nanometer techn... more Today, Fin shaped Field Effect Transistors (FinFETs) are the framework of the sub-nanometer technology node. The leading semiconductor industry deploys it in low-power (LP) and high-performance (HP) applications due to its better electrostatic control and exceptional scalability. In this paper, a novel optimized and miniaturized Xmas tree-shaped FinFET was designed that provides reduced short channel effects and better analog parameters as compared to the planar Metal Oxide Semiconductor Field Effect transistor. This proposed structure was devised with the Genetic Algorithm (GA) and Whale optimization Algorithm (WOA) along with the Artificial Neural Network (ANN). The dataset used in ANN training was created through designing and simulating the Xmas tree shaped FinFET structure by varying its Fin-width (WFin) and Fin-height (HFin). Through ANN-GA and ANN-WOA optimization, the optimal value of WFin and HFin was calculated at the minimum Subthreshold Swing (SS) and off-current (IOFF) ...
Advances in Intelligent Systems and Computing, 2020
In this paper, the impact of high-k dielectric gate oxide and work function variation on the elec... more In this paper, the impact of high-k dielectric gate oxide and work function variation on the electrical characteristics of the Vertical Slit Field Effect Transistor through 3D-TCAD Cogenda simulation tools has been studied. The gate work function is varied from 4.25 to 4.5 eV and high-k gate dielectric permittivity lies in the range of 10 to 35 for tied gates of device. The transistor electrical parameters such as on-current, off-current, the ratio of on-current to off-current, subthreshold swing, transconductance and transconductance generation factor are extracted from the device characteristics curve. Higher the gate work function is, the smaller is the leakage current produces at the cost of on-current. On the other side, the use of higher value of gate dielectric constant (k = 35) results in lower subthreshold swing (69 mV/dec), reduced off-current (2.26E-13), higher on-current (6.13E-5), enhanced on-current to off-current ratio (in order of 108), improved tranconductance and transconductance generation factor.
Journal of Nanoelectronics and Optoelectronics, 2020
Today, Fin shaped Field Effect Transistors (FinFETs) are the foundation of the sub-nanometer tech... more Today, Fin shaped Field Effect Transistors (FinFETs) are the foundation of the sub-nanometer technology node. The semiconductor industry endorses it in low-power (LP) and high-performance (HP) applications due to its better electrostatic control and exceptional scalability. In this paper, the structure of an inverted funnel-shaped FinFET device with a high-k stacked gate has been optimized using integrated Artificial Neural Network (ANN) and genetic algorithm (GA) approach. The comparative analysis of rectangular FinFET, trapezoidal FinFET and proposed novel shaped FinFET has also been explored. The electrical and analog performance parameters of the novel device present better performance results with respect to the other two transistors. In ANN training, the three datasets have been created by varying the metrics such as equivalent oxide thickness (EOT) and dielectric constant (k) of novel shaped FinFET device in Technology computeraided design simulator (TCAD). The amalgamation t...
This paper encapsulates the properties and implementation areas of Artificial Magnetic Conductor(... more This paper encapsulates the properties and implementation areas of Artificial Magnetic Conductor(AMC). It is characterized by having high surface impedance. The geometry of this structure is such that it does not support the propagation of surface waves and acts as a good ground plane in comparison to conventional metal conductors. Also, it reflects the waves in-phase rather than out of phase. Thus it is applicable to a variety of electromagnetic problems stressing upon the usage of low profile antennas.
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Papers by Gurpurneet Kaur