The on-chip cache is a significant source of the energy consumption of today's processors. Several data compression techniques including Frequent Value ...

This paper proposes a simple technique to reduce the static energy due to subthreshold leakage current. ... [Show full abstract] The key idea of our approach is ...

In this paper, we present a new energy-efficient data cache, which is a. Byte-Repeat Pattern Cache (BRPC) with a new data encoding technique. By studying the ...

An energy-efficient data cache with byte-repeat pattern encoding ... The on-chip cache is a significant source of the energy consumption of today's processors.

A new energy-efficient data cache is proposed, the Byte-Repeat Pattern Cache, which employs this encoding scheme, and observes that many data values stored ...

A new energy-efficient data cache is proposed, the Byte-Repeat Pattern Cache, which employs this encoding scheme, and observes that many data values stored ...

A direct addressed cache is a hardware-software design for an energy-efficient microprocessor data cache. Direct addressing allows software to access cache ...

We design and introduce a compiler-controlled tagless caching framework, hotlines, which achieves significant energy savings. Our hotlines framework saves ...

Compute Caches increase performance by 1.9× and reduce energy by 2.4× for a suite of data-centric applications, includ- ing text and database query processing, ...

ABSTRACT. Cache compression is a promising technique to increase on-chip cache capacity and to decrease on-chip and off-chip bandwidth.