This third-generation 1.1-GHz 64-bit UltraSPARC microprocessor provides 1-MB on-chip level-2 cache, 4-Gb/s off chip memory bandwidth, and a new 200 MHz JBus ...

: THIRD-GENERATION 1.1-GHz 64-BIT MICROPROCESSOR. 1465. V. ASYNCHRONOUS MEMORY ... , “Implementation of a third-generation SPARC V9 64b microprocessor ...

This third-generation 1.1-GHz 64-bit UltraSPARC microprocessor provides 1-MB on-chip level-2 cache, 4-Gb/s off chip memory bandwidth, and a new 200 MHz JBus ...

A third-generation 1.1 GHz 64b microprocessor provides 1 MB on-chip L2$, 4GB/s off chip memory bandwidth and a 200MHz JBUS interface that supports 1 to 4 ...

This 3rd-generation, superscalar processor, implementing the SPARC V9 64 b architecture, improves performance over previous processors by improvements in ...

Implementation of A Third-Generation 1.1 Ghz 64-Bit Microprocessor. By: Konstadinidis, Georgios K · Normoyle, Kevin. Material type: ArticleDescription: ...

Implementation of a third-generation 1.1-GHz 64-bit microprocessor. GK Konstadinidis, K Normoyle, S Wong, S Bhutani, H Stuimer, T Johnson, ... IEEE Journal of ...

“Implementation of a Third-Generation 1.1GHz 64-bit Microprocessor”. 11/02 issue of the Journal of Solid State Circuits, pp. 1471-1469.

The 87.5-million transistor chip is implemented in a seven-layer-metal copper 0.13- m CMOS process and dissipates 53 W at 1.3 V and 1.1 GHz. Index Terms—CMOS ...