M. Tehranipoor and R.M. Rad, "Test and Recovery for Fine-Grained Nanoscale Architectures", in proc. of ACM/ SIGDA International Symposium on Field-Programmable ...
of IEEE VLSI Test Symposium (VTS 06), 2006. R. M. P. Rad and M. Tehranipoor, Fine-Grained Island Style Architecture for Molecular Electronic Devices, ...
In this paper, a built-in self-test (BIST) procedure is proposed for testing and fault tolerance of molecular electronics-based nanofabrics.
Rad, “Test and Recovery for Fine-Grained Nanoscale Architectures,” International Symposium on Field-Programmable Gate Arrays (FPGA'06) (Poster), 2006. M ...
Aug 29, 2008 · The proposed method uses a built-in self-test (BIST) scheme for test and defect tolerance. The method is based on testing reconfigurable ...
[PDF] SCT: An Approach For Testing and Configuring Nanoscale Devices
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a nanoscale architecture using previously proposed test meth- ... we assumed 100% recovery). This ... Tehranipoor, “Fine-Grained Island Style Architecture.
According to international technology roadmap for semiconductors (ITRS) [1] scaling of CMOS technology will face many practical and theoretical difficulties ...
Here we developed and analyzed a recovery technique, Fine-Grained Roll- back Recovery, that exploits redundancy in time as well as space. This technique has.
PDF | Molecular electronics-based devices are assumed to include at least 10 gate-equivalents/cm and defect densities as high as 10%; novel test.
Abstract— Fault-tolerance is one of the major challenges facing nanoelectronic systems. Previous defect-tolerance techniques have focused on offline testing ...