This paper describes a modular analog VLSI architecture for the implementation of artificial neur... more This paper describes a modular analog VLSI architecture for the implementation of artificial neural networks. Analog neural network implementations are faster and smaller than their digital counterparts, but the problem of smaller dynamic range of the analog weight memory and the linearity of the synapses based on analog multipliers increases the need for design effort at the circuit level. We suggest that a complex neural network system can be implemented in a single chip if a modular architecture design using simple analog circuits is followed. To demonstrate the VLSI implementability of the neural network system, a description of each analog circuit block is provided.
In this paper a multi-system, multi-band antenna structure for RFID applications is presented. Th... more In this paper a multi-system, multi-band antenna structure for RFID applications is presented. The antenna covers two UHF bands allocated for RFID use in Europe (866-868 MHz) and N. America (902-928 MHz) with a dual-band PIFA element as well as HF 13.56 MHz band with a near-field coil. Both systems in the antenna are shown to perform well on free
An 25-muW 1.8V 8-bit 10 kS/s successive approximation (SAR) analog to digital converter (ADC) was... more An 25-muW 1.8V 8-bit 10 kS/s successive approximation (SAR) analog to digital converter (ADC) was designed and fabricated in a 0.18 mum CMOS technology for passive UHF RFID applications. The resistive digital to analog converter (DAC) has no sample and hold block and can operate with low power consumption. The proposed comparator can operate at a low supply voltage. The measured total power consumption is 25 muW at a 10 kS/s conversion rate with a 1.8V single supply voltage.
Analog Integrated Circuits and Signal Processing, 2011
An 5.1 μW, 1.8 V, 8-bit, successive approximation (SAR) analog-to-digital converter (ADC) using 1... more An 5.1 μW, 1.8 V, 8-bit, successive approximation (SAR) analog-to-digital converter (ADC) using 10 kHz clock was designed and fabricated in a 0.18 μm CMOS technology for passive UHF radio frequency identification (RFID) applications. The ADC utilises a resistive digital to analog converter (DAC). The ADC can operate with low power consumption. The proposed comparator with cascode active load can offer large gain and can operate at a low supply voltage. The measured total power consumption is 5.1 μW at a 10 kHz input clock with a 1.8 V single supply, and 0.5 μW with 970 mV supply.
The unique properties of fractals have been exploited to develop a new class of antenna element d... more The unique properties of fractals have been exploited to develop a new class of antenna element designs that are multi band and compact in size. These properties are very important for RFID (Radio Frequency IDentification) tags where the small size, planar geometries, multi band operation and low cost are essential for many applications. This paper presents a one loop Minkowski modified antenna using a unique configuration and operating at 868 MHz and 2.45 GHz that has been realized on a Rogers Duroid substrate. Experimental results confirm the theoretical prediction. In addition, the principle applied in this design could be used to create even smaller devices by using different substrates.
A fingerprint detection technology that supports navigation, pointer and fingerprint acquisition ... more A fingerprint detection technology that supports navigation, pointer and fingerprint acquisition is described. The hybrid system consists of a silicon sensor substrate flip-chipped onto a mixed signal ASIC. The sensor is linear and the finger is swept over to scan the fingerprint. To achieve 500 dpi accuracy, separate process optimization for both the ASIC and the sensor substrate gives a alternative solution compared to all silicon sensor approaches. The ASIC is 18 mm/sup 2/ in 0.25 /spl mu/m CMOS and the sensor is 105 mm/sup 2/.
... research. Low-temperature micromachined cMUTs with fully-integrated analogue front-end electr... more ... research. Low-temperature micromachined cMUTs with fully-integrated analogue front-end electronics. RA Noble, RR Davies, DO King, MM Day, ARD Jones, JS McIntosh, et al. ... research. More related papers. Cite this document (BETA). ...
This paper describes the design and implementation of a low power/low voltage mixed signal BiCMOS... more This paper describes the design and implementation of a low power/low voltage mixed signal BiCMOS ASIC that operates at temperatures up to 200°C. The ASIC is integrated into a gauge for downhole pressure and temperature measurements. It incorporates four measurement channels (CLK1-clock one, CLK2-clock two, P-pressure, T-temperature), with four high precision X-tal Pierce oscillators and a signal processing path for each channel. The output frequency from the CLK1 channel is used as a precision reference for the pressure and temperature channels and as an external clock. The ASIC is designed for high pressure transducers and incorporated into a downhole memory and wireline quartz gauge. The ASIC was fabricated into a 1.2 μm BiCMOS double poly, double metal process. The voltage supply range is from 5 V to 3.3 V and the circuit occupies a silicon area of 15 mm2. The ASIC is packaged in a ceramic 28 pin SOIC package
A mixed signal ASIC that implements an ultrasound front end receiver in a 0.6μm BiCMOS HotASIC® t... more A mixed signal ASIC that implements an ultrasound front end receiver in a 0.6μm BiCMOS HotASIC® technology is described. The ASIC includes a low noise amplifier (LNA), a programmable gain amplifier (PGA), an output differential amplifier (ODA), a second order sigma delta modulator (SDM) and is the most compact system for high temperature ultrasound applications reported in literature. The circuit has a programmable gain and is designed for measuring the signal response (200kHz to 700kHz) from an ultrasound transducer. At 48MHz clock frequency and 200°C the power consumption is 85mW from a single 5V supply. The die area of the chip is 5.52 mm2.
Future Electric (EVs) and Hybrid Electric Vehicles (HEVs) will provide more flexibility when choo... more Future Electric (EVs) and Hybrid Electric Vehicles (HEVs) will provide more flexibility when choosing between primary energy sources, including those which are renewable. In general conventional ICEs vehicles transform between only 17 and 22% (depending on power train) of the fuel chemical energy with a typical primary energy consumption of 550-600 Wh/km (0.06 l/km). Efficient electrically powered trains can achieve conversion efficiencies greater than 75% from the batteries to the wheels, which corresponds to consumption in primary energy of about 390 Wh/km in the case where electricity is produced by conventional carbon based power plants, or only 180 Wh/km where the electricity is produced solely by renewable energy. The partial recovery of kinetic energy during braking gives rise to further improvement in the overall efficiency. The development of advanced smart electronic systems in power trains is therefore essential for delivering a considerable energy saving in terms of the most critical sources (oil and natural gas - NG). This paper presents the advances made in the overall power electronic modules for electric and hybrid vehicles, and which are addressed in the E3Car project.
Future generations of electric vehicles (EVs) will require a new level of convergence between com... more Future generations of electric vehicles (EVs) will require a new level of convergence between computer and automotive architectures, with the electric power train being a mechatronic system that includes a multitude of plug and play devices, embedded power and signal processing hardware, software and high level algorithms. This paper discusses the current advances in the computing devices, communication systems and management algorithms embedded in the EV building blocks used for implementing the distributed energy and propulsion architectures required for high efficiency, reduced complexity and safe redundancy.
The forthcoming Smart Grid is expected to implement a new concept of transmission network which i... more The forthcoming Smart Grid is expected to implement a new concept of transmission network which is able to efficiently route the energy produced from both concentrated and distributed plants up to the final user with high security and quality of supply standards. Therefore the Smart Grid is expected to be the implementation of a kind of “internet” in which the energy packets are managed similarly to data packets, across routers and gateways which autonomously can decide the best pathway for the packet to reach its destination with the best integrity levels. In this respect the “Internet of Energy” concept is defined as a network infrastructure based on standard and interoperable communication transceivers, gateways and protocols that allow a real time balance between the local and the global generation and storage capability with the energy demand, also allowing high level of consumer awareness and involvement. This paper presents some basic concept of the Internet of Energy and, in particular, its impact on Electric Mobility.
This paper describes a modular analog VLSI architecture for the implementation of artificial neur... more This paper describes a modular analog VLSI architecture for the implementation of artificial neural networks. Analog neural network implementations are faster and smaller than their digital counterparts, but the problem of smaller dynamic range of the analog weight memory and the linearity of the synapses based on analog multipliers increases the need for design effort at the circuit level. We suggest that a complex neural network system can be implemented in a single chip if a modular architecture design using simple analog circuits is followed. To demonstrate the VLSI implementability of the neural network system, a description of each analog circuit block is provided.
In this paper a multi-system, multi-band antenna structure for RFID applications is presented. Th... more In this paper a multi-system, multi-band antenna structure for RFID applications is presented. The antenna covers two UHF bands allocated for RFID use in Europe (866-868 MHz) and N. America (902-928 MHz) with a dual-band PIFA element as well as HF 13.56 MHz band with a near-field coil. Both systems in the antenna are shown to perform well on free
An 25-muW 1.8V 8-bit 10 kS/s successive approximation (SAR) analog to digital converter (ADC) was... more An 25-muW 1.8V 8-bit 10 kS/s successive approximation (SAR) analog to digital converter (ADC) was designed and fabricated in a 0.18 mum CMOS technology for passive UHF RFID applications. The resistive digital to analog converter (DAC) has no sample and hold block and can operate with low power consumption. The proposed comparator can operate at a low supply voltage. The measured total power consumption is 25 muW at a 10 kS/s conversion rate with a 1.8V single supply voltage.
Analog Integrated Circuits and Signal Processing, 2011
An 5.1 μW, 1.8 V, 8-bit, successive approximation (SAR) analog-to-digital converter (ADC) using 1... more An 5.1 μW, 1.8 V, 8-bit, successive approximation (SAR) analog-to-digital converter (ADC) using 10 kHz clock was designed and fabricated in a 0.18 μm CMOS technology for passive UHF radio frequency identification (RFID) applications. The ADC utilises a resistive digital to analog converter (DAC). The ADC can operate with low power consumption. The proposed comparator with cascode active load can offer large gain and can operate at a low supply voltage. The measured total power consumption is 5.1 μW at a 10 kHz input clock with a 1.8 V single supply, and 0.5 μW with 970 mV supply.
The unique properties of fractals have been exploited to develop a new class of antenna element d... more The unique properties of fractals have been exploited to develop a new class of antenna element designs that are multi band and compact in size. These properties are very important for RFID (Radio Frequency IDentification) tags where the small size, planar geometries, multi band operation and low cost are essential for many applications. This paper presents a one loop Minkowski modified antenna using a unique configuration and operating at 868 MHz and 2.45 GHz that has been realized on a Rogers Duroid substrate. Experimental results confirm the theoretical prediction. In addition, the principle applied in this design could be used to create even smaller devices by using different substrates.
A fingerprint detection technology that supports navigation, pointer and fingerprint acquisition ... more A fingerprint detection technology that supports navigation, pointer and fingerprint acquisition is described. The hybrid system consists of a silicon sensor substrate flip-chipped onto a mixed signal ASIC. The sensor is linear and the finger is swept over to scan the fingerprint. To achieve 500 dpi accuracy, separate process optimization for both the ASIC and the sensor substrate gives a alternative solution compared to all silicon sensor approaches. The ASIC is 18 mm/sup 2/ in 0.25 /spl mu/m CMOS and the sensor is 105 mm/sup 2/.
... research. Low-temperature micromachined cMUTs with fully-integrated analogue front-end electr... more ... research. Low-temperature micromachined cMUTs with fully-integrated analogue front-end electronics. RA Noble, RR Davies, DO King, MM Day, ARD Jones, JS McIntosh, et al. ... research. More related papers. Cite this document (BETA). ...
This paper describes the design and implementation of a low power/low voltage mixed signal BiCMOS... more This paper describes the design and implementation of a low power/low voltage mixed signal BiCMOS ASIC that operates at temperatures up to 200°C. The ASIC is integrated into a gauge for downhole pressure and temperature measurements. It incorporates four measurement channels (CLK1-clock one, CLK2-clock two, P-pressure, T-temperature), with four high precision X-tal Pierce oscillators and a signal processing path for each channel. The output frequency from the CLK1 channel is used as a precision reference for the pressure and temperature channels and as an external clock. The ASIC is designed for high pressure transducers and incorporated into a downhole memory and wireline quartz gauge. The ASIC was fabricated into a 1.2 μm BiCMOS double poly, double metal process. The voltage supply range is from 5 V to 3.3 V and the circuit occupies a silicon area of 15 mm2. The ASIC is packaged in a ceramic 28 pin SOIC package
A mixed signal ASIC that implements an ultrasound front end receiver in a 0.6μm BiCMOS HotASIC® t... more A mixed signal ASIC that implements an ultrasound front end receiver in a 0.6μm BiCMOS HotASIC® technology is described. The ASIC includes a low noise amplifier (LNA), a programmable gain amplifier (PGA), an output differential amplifier (ODA), a second order sigma delta modulator (SDM) and is the most compact system for high temperature ultrasound applications reported in literature. The circuit has a programmable gain and is designed for measuring the signal response (200kHz to 700kHz) from an ultrasound transducer. At 48MHz clock frequency and 200°C the power consumption is 85mW from a single 5V supply. The die area of the chip is 5.52 mm2.
Future Electric (EVs) and Hybrid Electric Vehicles (HEVs) will provide more flexibility when choo... more Future Electric (EVs) and Hybrid Electric Vehicles (HEVs) will provide more flexibility when choosing between primary energy sources, including those which are renewable. In general conventional ICEs vehicles transform between only 17 and 22% (depending on power train) of the fuel chemical energy with a typical primary energy consumption of 550-600 Wh/km (0.06 l/km). Efficient electrically powered trains can achieve conversion efficiencies greater than 75% from the batteries to the wheels, which corresponds to consumption in primary energy of about 390 Wh/km in the case where electricity is produced by conventional carbon based power plants, or only 180 Wh/km where the electricity is produced solely by renewable energy. The partial recovery of kinetic energy during braking gives rise to further improvement in the overall efficiency. The development of advanced smart electronic systems in power trains is therefore essential for delivering a considerable energy saving in terms of the most critical sources (oil and natural gas - NG). This paper presents the advances made in the overall power electronic modules for electric and hybrid vehicles, and which are addressed in the E3Car project.
Future generations of electric vehicles (EVs) will require a new level of convergence between com... more Future generations of electric vehicles (EVs) will require a new level of convergence between computer and automotive architectures, with the electric power train being a mechatronic system that includes a multitude of plug and play devices, embedded power and signal processing hardware, software and high level algorithms. This paper discusses the current advances in the computing devices, communication systems and management algorithms embedded in the EV building blocks used for implementing the distributed energy and propulsion architectures required for high efficiency, reduced complexity and safe redundancy.
The forthcoming Smart Grid is expected to implement a new concept of transmission network which i... more The forthcoming Smart Grid is expected to implement a new concept of transmission network which is able to efficiently route the energy produced from both concentrated and distributed plants up to the final user with high security and quality of supply standards. Therefore the Smart Grid is expected to be the implementation of a kind of “internet” in which the energy packets are managed similarly to data packets, across routers and gateways which autonomously can decide the best pathway for the packet to reach its destination with the best integrity levels. In this respect the “Internet of Energy” concept is defined as a network infrastructure based on standard and interoperable communication transceivers, gateways and protocols that allow a real time balance between the local and the global generation and storage capability with the energy demand, also allowing high level of consumer awareness and involvement. This paper presents some basic concept of the Internet of Energy and, in particular, its impact on Electric Mobility.
Uploads
Papers by Ovidiu Vermesan