2009 IEEE International Symposium on Circuits and Systems, 2009
Abstract The implementation of a complete low-power microphone uplink system is presented. The s... more Abstract The implementation of a complete low-power microphone uplink system is presented. The system comprises a low-dropout regulator (LDO), an input operational transconductance amplifier (OTA), and a 3rd order continuous-time sigma-delta (Σ∆) modulator. The LDO ...
2009 IEEE International Symposium on Circuits and Systems, 2009
Abstract In this paper, an integrated DC-DC (Buck) converter is presented. The Buck converter ac... more Abstract In this paper, an integrated DC-DC (Buck) converter is presented. The Buck converter accepts input voltage in the range 2.7-5.5V while using 2.5V devices. A low drop-out (LDO) regulator is used to limit the maximum input voltage to the DC-DC switches to protect it against ...
A digital multi-range duty cycle correction (DCC) circuit is presented to correct the differentia... more A digital multi-range duty cycle correction (DCC) circuit is presented to correct the differential duty cycle distortion in a multi-standard half-rate SerDes transceiver. A novel 9-state inverter is used for enhancing the system granularity and reducing the loading by ∼75%. In addition, the system allows two different correction locations and 7 different correction ranges. Each range is optimized to minimize the jitter for specific data rates as well as ensures enough coverage. The DCC loop is implemented in 7 nm FinFET technology. It supports a frequency range of 7 – 14 GHz with a power consumption of 1.25 – 2.35 mA.
2010 International Conference on Microelectronics, 2010
The implementation of a fully integrated multi-standard low-jitter clock generator is presented. ... more The implementation of a fully integrated multi-standard low-jitter clock generator is presented. A ΣΔ fractional-N phase-locked loop (PLL) is chosen for 0.8 to 6.3 GHz wireline Serializer-Deserializer (SerDes) transmitting clock and spread spectrum clock generator (SSCG) for Serial AT Attachment (SATA I, II, III) characterized by a spread modulation of 5000 ppm. A multi-range voltage-controlled oscillator (VCO) is presented to
2007 Internatonal Conference on Microelectronics, 2007
A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked l... more A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked loops, is proposed. In addition to gain-boosting, used to increase the output impedance of the CP, a low-voltage cascode current mirror is used to enhance current matching over process corners. A good matching between the two current sources of the CP can be achieved with current
International Conference on Microelectronics, 2007
A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked l... more A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked loops, is proposed. In addition to gain-boosting, used to increase the output impedance of the CP, a low-voltage cascode current mirror is used to enhance current matching over process corners. A good matching between the two current sources of the CP can be achieved with current
2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), 2013
ABSTRACT A transimpedance amplifier (TIA) has been designed in a 130 nm CMOS technology node to s... more ABSTRACT A transimpedance amplifier (TIA) has been designed in a 130 nm CMOS technology node to serve as a sustaining amplifier for a MEMS-based oscillator. A regulated cascode (RGC) configuration is used at the input stage to reduce the impact of the input parasitic capacitance on the TIA bandwidth as well as to minimize loading effects on the Q-factor of the resonator. In typical conditions, the TIA achieves a mid-band gain of 112.5 dBΩ and a 3 dB bandwidth of 239 MHz, while dissipating only 360 μW from a 1.2V supply. A linear RLC model of a MEMS wine-glass disk resonator resonating at 20 MHz with a Q-factor of 104 is used to validate the TIA. The post layout simulations show a phase noise below -125 dBc/Hz at a 1 kHz offset and a noise floor of -131.9 dBc/Hz.
A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked l... more A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked loops, is proposed. In addition to gain-boosting, used to increase the output impedance of the CP, a low-voltage cascode current mirror is used to enhance current matching over process corners. A good matching between the two current sources of the CP can be achieved with current mismatch equals to 0.6% in typical conditions and 1% over all process variations. The CP output compliance voltage range of 0.3-2.2 V is achieved for 2.5-V supply using the I/O devices of a 90-nm technology.
Abstract The implementation of a complete low-power microphone uplink system is presented. The s... more Abstract The implementation of a complete low-power microphone uplink system is presented. The system comprises a low-dropout regulator (LDO), an input operational transconductance amplifier (OTA), and a 3rd order continuous-time sigma-delta (Σ∆) modulator. The LDO ...
Abstract In this paper, an integrated DC-DC (Buck) converter is presented. The Buck converter ac... more Abstract In this paper, an integrated DC-DC (Buck) converter is presented. The Buck converter accepts input voltage in the range 2.7-5.5V while using 2.5V devices. A low drop-out (LDO) regulator is used to limit the maximum input voltage to the DC-DC switches to protect it against ...
2009 IEEE International Symposium on Circuits and Systems, 2009
Abstract The implementation of a complete low-power microphone uplink system is presented. The s... more Abstract The implementation of a complete low-power microphone uplink system is presented. The system comprises a low-dropout regulator (LDO), an input operational transconductance amplifier (OTA), and a 3rd order continuous-time sigma-delta (Σ∆) modulator. The LDO ...
2009 IEEE International Symposium on Circuits and Systems, 2009
Abstract In this paper, an integrated DC-DC (Buck) converter is presented. The Buck converter ac... more Abstract In this paper, an integrated DC-DC (Buck) converter is presented. The Buck converter accepts input voltage in the range 2.7-5.5V while using 2.5V devices. A low drop-out (LDO) regulator is used to limit the maximum input voltage to the DC-DC switches to protect it against ...
A digital multi-range duty cycle correction (DCC) circuit is presented to correct the differentia... more A digital multi-range duty cycle correction (DCC) circuit is presented to correct the differential duty cycle distortion in a multi-standard half-rate SerDes transceiver. A novel 9-state inverter is used for enhancing the system granularity and reducing the loading by ∼75%. In addition, the system allows two different correction locations and 7 different correction ranges. Each range is optimized to minimize the jitter for specific data rates as well as ensures enough coverage. The DCC loop is implemented in 7 nm FinFET technology. It supports a frequency range of 7 – 14 GHz with a power consumption of 1.25 – 2.35 mA.
2010 International Conference on Microelectronics, 2010
The implementation of a fully integrated multi-standard low-jitter clock generator is presented. ... more The implementation of a fully integrated multi-standard low-jitter clock generator is presented. A ΣΔ fractional-N phase-locked loop (PLL) is chosen for 0.8 to 6.3 GHz wireline Serializer-Deserializer (SerDes) transmitting clock and spread spectrum clock generator (SSCG) for Serial AT Attachment (SATA I, II, III) characterized by a spread modulation of 5000 ppm. A multi-range voltage-controlled oscillator (VCO) is presented to
2007 Internatonal Conference on Microelectronics, 2007
A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked l... more A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked loops, is proposed. In addition to gain-boosting, used to increase the output impedance of the CP, a low-voltage cascode current mirror is used to enhance current matching over process corners. A good matching between the two current sources of the CP can be achieved with current
International Conference on Microelectronics, 2007
A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked l... more A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked loops, is proposed. In addition to gain-boosting, used to increase the output impedance of the CP, a low-voltage cascode current mirror is used to enhance current matching over process corners. A good matching between the two current sources of the CP can be achieved with current
2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), 2013
ABSTRACT A transimpedance amplifier (TIA) has been designed in a 130 nm CMOS technology node to s... more ABSTRACT A transimpedance amplifier (TIA) has been designed in a 130 nm CMOS technology node to serve as a sustaining amplifier for a MEMS-based oscillator. A regulated cascode (RGC) configuration is used at the input stage to reduce the impact of the input parasitic capacitance on the TIA bandwidth as well as to minimize loading effects on the Q-factor of the resonator. In typical conditions, the TIA achieves a mid-band gain of 112.5 dBΩ and a 3 dB bandwidth of 239 MHz, while dissipating only 360 μW from a 1.2V supply. A linear RLC model of a MEMS wine-glass disk resonator resonating at 20 MHz with a Q-factor of 104 is used to validate the TIA. The post layout simulations show a phase noise below -125 dBc/Hz at a 1 kHz offset and a noise floor of -131.9 dBc/Hz.
A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked l... more A modified technique to enhance current matching in charge pumps (CP), employed in phase-locked loops, is proposed. In addition to gain-boosting, used to increase the output impedance of the CP, a low-voltage cascode current mirror is used to enhance current matching over process corners. A good matching between the two current sources of the CP can be achieved with current mismatch equals to 0.6% in typical conditions and 1% over all process variations. The CP output compliance voltage range of 0.3-2.2 V is achieved for 2.5-V supply using the I/O devices of a 90-nm technology.
Abstract The implementation of a complete low-power microphone uplink system is presented. The s... more Abstract The implementation of a complete low-power microphone uplink system is presented. The system comprises a low-dropout regulator (LDO), an input operational transconductance amplifier (OTA), and a 3rd order continuous-time sigma-delta (Σ∆) modulator. The LDO ...
Abstract In this paper, an integrated DC-DC (Buck) converter is presented. The Buck converter ac... more Abstract In this paper, an integrated DC-DC (Buck) converter is presented. The Buck converter accepts input voltage in the range 2.7-5.5V while using 2.5V devices. A low drop-out (LDO) regulator is used to limit the maximum input voltage to the DC-DC switches to protect it against ...
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