The design of a 1.8V LVDS receiver operating at a maximum speed of 700Mbits/sec is presented. The... more The design of a 1.8V LVDS receiver operating at a maximum speed of 700Mbits/sec is presented. The receiver is designed to accept LVDS signals from 3.3V, 2.5V, or 1.8V systems and converts it to a 1.8V digital data. The design was completed on a 0.24μm CMOS process and complying with the industry standard of ±10% power supply variations over a temperature range from -40°C to +85°C. At the nominal supply voltage of 1.8V and operating at maximum speed the receiver consumes less than 6.5mW.
Technological advances in high-speed, wired communications increasingly require reliable data tra... more Technological advances in high-speed, wired communications increasingly require reliable data transmission circuits. Among the transmission techniques developed for this purpose, one of the most successful has been based on low voltage differential signals (LVDS). This paper discusses different techniques employed in the design of LVDS circuits, introducing design innovations to provide line drivers with adjustable common mode voltage.
The design of a 1.8V LVDS receiver operating at a maximum speed of 700Mbits/sec is presented. The... more The design of a 1.8V LVDS receiver operating at a maximum speed of 700Mbits/sec is presented. The receiver is designed to accept LVDS signals from 3.3V, 2.5V, or 1.8V systems and converts it to a 1.8V digital data. The design was completed on a 0.24μm CMOS process and complying with the industry standard of ±10% power supply variations over a temperature range from -40°C to +85°C. At the nominal supply voltage of 1.8V and operating at maximum speed the receiver consumes less than 6.5mW.
Technological advances in high-speed, wired communications increasingly require reliable data tra... more Technological advances in high-speed, wired communications increasingly require reliable data transmission circuits. Among the transmission techniques developed for this purpose, one of the most successful has been based on low voltage differential signals (LVDS). This paper discusses different techniques employed in the design of LVDS circuits, introducing design innovations to provide line drivers with adjustable common mode voltage.
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Papers by Rogelio Palomera