2016 International Conference on Information and Communication Technology Convergence (ICTC), 2016
5G network architecture is actively discussed in 3GPP SA2 [6] where management of mobility level ... more 5G network architecture is actively discussed in 3GPP SA2 [6] where management of mobility level is one of the key study items. Mobility management of the previous generation defines seamless mobility for the always connected service without packet loss. 5G network designed to support the level of mobility based on the UE demands. This paper explains the mobility level management framework for the connected mode. Different levels of HO are defined. Architecture and control procedure to support multiple HO level is described.
2016 International Conference on Information and Communication Technology Convergence (ICTC), 2016
3GPP SA2 [6] is currently developing 5G network architecture with a code name of NextGen Network.... more 3GPP SA2 [6] is currently developing 5G network architecture with a code name of NextGen Network. Network slicing architecture is the key issue to change the network paradigm into a new unforeseen stage of a programmable softwarized network. Although there have been many related research projects, NextGen network will be the first large-scale commercial network that adopts the network softwarization. This paper will discuss the current design issues on network slicing architecture, and proposes a new top-down approach and NextGen RRC architecture to resolve the current problems.
1997 IEEE MTT-S International Microwave Symposium Digest
A PLL clock-extraction and data-regeneration circuit (CEDAR) for 10 Gb/s optical transmission sys... more A PLL clock-extraction and data-regeneration circuit (CEDAR) for 10 Gb/s optical transmission system was realized in a hybrid IC form. The jitter characteristics satisfied the recommendations of ITU-T. The CEDAR compensated against the temperature was tested for the temperature from -10/spl deg/C to 60/spl deg/C and showed no increase of error.
IEEE Transactions on Microwave Theory and Techniques
A method has been devised to experimentally characterize a packaged GaAs Schottky barrier diode b... more A method has been devised to experimentally characterize a packaged GaAs Schottky barrier diode by inserting it into a microstrip test mount. The nonlinear equivalent circuit parameters of the diode are determined by a small-signal test method. A large-signal measurement using the same test mount has also been configured to determine the power conversion efficiency from microwave to DC as well as determining the de-embedded network impedance of the diode. A nonlinear circuit simulation program using a multireflection algorithm is used to verify the experimental results for the 2.45-GHz diode. A Ka-band mixer diode is simulated for a 35-GHz rectenna. Based on the simulation results, a patch-type 35-GHz rectenna is designed and tested in a waveguide simulator. The efficiency is 29% with 120-mW input power. Because the diode could generate undesirable harmonic radiation, a frequency-selective surface is designed to reduce the second harmonic radiation for a 2.45-GHz rectenna. Theoretical results agree fairly well with experiments for all these studies. >
The 9th International Conference on Advanced Communication Technology, 2007
A cyclic water-filling EPON (Ethernet passive optical network) DBA(dynamic bandwidth allocation) ... more A cyclic water-filling EPON (Ethernet passive optical network) DBA(dynamic bandwidth allocation) algorithm and its implementation in an ASIC are described with future improvements. Every cycle, short static gates are generated to collect reports and dynamic gates are generated according to the reports collected in previous cycle. In each cycle, unit length is additively allocated to the ONUs in a cyclic fashion until all the requests are satisfied or no resource is left. Four parallel engines are used to process the requests. As improvements, priority will be considered, and the processing burden will be evenly distributed to the 4 parallel engines in any case.
2016 International Conference on Information and Communication Technology Convergence (ICTC), 2016
5G network architecture is actively discussed in 3GPP SA2 [6] where management of mobility level ... more 5G network architecture is actively discussed in 3GPP SA2 [6] where management of mobility level is one of the key study items. Mobility management of the previous generation defines seamless mobility for the always connected service without packet loss. 5G network designed to support the level of mobility based on the UE demands. This paper explains the mobility level management framework for the connected mode. Different levels of HO are defined. Architecture and control procedure to support multiple HO level is described.
2016 International Conference on Information and Communication Technology Convergence (ICTC), 2016
3GPP SA2 [6] is currently developing 5G network architecture with a code name of NextGen Network.... more 3GPP SA2 [6] is currently developing 5G network architecture with a code name of NextGen Network. Network slicing architecture is the key issue to change the network paradigm into a new unforeseen stage of a programmable softwarized network. Although there have been many related research projects, NextGen network will be the first large-scale commercial network that adopts the network softwarization. This paper will discuss the current design issues on network slicing architecture, and proposes a new top-down approach and NextGen RRC architecture to resolve the current problems.
1997 IEEE MTT-S International Microwave Symposium Digest
A PLL clock-extraction and data-regeneration circuit (CEDAR) for 10 Gb/s optical transmission sys... more A PLL clock-extraction and data-regeneration circuit (CEDAR) for 10 Gb/s optical transmission system was realized in a hybrid IC form. The jitter characteristics satisfied the recommendations of ITU-T. The CEDAR compensated against the temperature was tested for the temperature from -10/spl deg/C to 60/spl deg/C and showed no increase of error.
IEEE Transactions on Microwave Theory and Techniques
A method has been devised to experimentally characterize a packaged GaAs Schottky barrier diode b... more A method has been devised to experimentally characterize a packaged GaAs Schottky barrier diode by inserting it into a microstrip test mount. The nonlinear equivalent circuit parameters of the diode are determined by a small-signal test method. A large-signal measurement using the same test mount has also been configured to determine the power conversion efficiency from microwave to DC as well as determining the de-embedded network impedance of the diode. A nonlinear circuit simulation program using a multireflection algorithm is used to verify the experimental results for the 2.45-GHz diode. A Ka-band mixer diode is simulated for a 35-GHz rectenna. Based on the simulation results, a patch-type 35-GHz rectenna is designed and tested in a waveguide simulator. The efficiency is 29% with 120-mW input power. Because the diode could generate undesirable harmonic radiation, a frequency-selective surface is designed to reduce the second harmonic radiation for a 2.45-GHz rectenna. Theoretical results agree fairly well with experiments for all these studies. >
The 9th International Conference on Advanced Communication Technology, 2007
A cyclic water-filling EPON (Ethernet passive optical network) DBA(dynamic bandwidth allocation) ... more A cyclic water-filling EPON (Ethernet passive optical network) DBA(dynamic bandwidth allocation) algorithm and its implementation in an ASIC are described with future improvements. Every cycle, short static gates are generated to collect reports and dynamic gates are generated according to the reports collected in previous cycle. In each cycle, unit length is additively allocated to the ONUs in a cyclic fashion until all the requests are satisfied or no resource is left. Four parallel engines are used to process the requests. As improvements, priority will be considered, and the processing burden will be evenly distributed to the 4 parallel engines in any case.
Uploads
Papers by Taewhan Yoo