2017 IEEE International Reliability Physics Symposium (IRPS), 2017
This paper reports the reliability assessments of 600 V rated GaN-on-Si based depletion mode prot... more This paper reports the reliability assessments of 600 V rated GaN-on-Si based depletion mode prototype MIS power transistors under reverse bias operation. In this study, the impact of two gate module processes on the device reliability was investigated through the accelerated tests conducted at voltages > 600 V and temperatures < 150 °C. These tests established gate dielectric breakdown as the failure mode and a probable mechanism triggering this failure type has been hypothesized. And the related failure activation energies of 0.90 eV and 0.71 eV for the two processes were extracted. The results unveil that device reliability in reverse bias operation can be improved with gate module optimizations. There is no existing GaN specific industry HTRB qualification standard. We present the methodology of translating the hypothetical application profiles to equivalent qualification HTRB duration using the GaN failure degradation models.
2016 IEEE 4th Workshop on Wide Bandgap Power Devices and Applications (WiPDA), 2016
The Safe Operating Area (SOA) characteristics of 600 V rated GaN-on-Si based cascode power device... more The Safe Operating Area (SOA) characteristics of 600 V rated GaN-on-Si based cascode power devices in the Forward Bias (FB) and Short Circuit (SC) test conditions were evaluated in this study. The results from FBSOA tests at ≤ 150 °C device channel temperatures in the linear mode operation demonstrated reliable device operation with negligible parametric drifts. However, the test to destruction FBSOA measurements performed at elevated channel temperatures revealed that the GaN MIS HFET's gate dielectric degradation in the cascode structure is the failure root cause and a theory is presumed to explain the pertinent failure mechanism. Similarly, the destructive SC tests on the cascode GaN devices were conducted that displayed very short withstand times. Through this work, we show that the SC withstand times of GaN devices can be improved by design modifications which come with a Figure of Merit compromise.
2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA), 2015
In this paper the reliability requirements to qualify High Voltage (HV) GaN technologies are disc... more In this paper the reliability requirements to qualify High Voltage (HV) GaN technologies are discussed. A multi-faceted methodology that is derived from the target application profile is used to assure that the device will perform reliably for the specified lifetime in the field. Whether the qualification requirements of GaN technology need to exceed the standard JEDEC requirements or not depends on the activation energies and acceleration factors of the degradation mechanisms associated with a given technology, as well as the target application profile. The discussion in this paper addresses the topic of qualifying GaN technologies and the need for a comprehensive approach to reliability assessment that might exceed the JEDEC standards.
An extremely rugged technology has been developed for ultra low RDS (on) applications. This paper... more An extremely rugged technology has been developed for ultra low RDS (on) applications. This paper describes a methodology of guaranteeing repetitive avalanche performance as long as maximum operating junction temperature, TJ (Max), is not ...
AbstractAn extremely rugged technology has been developed for ultra low RDS (on) applications. T... more AbstractAn extremely rugged technology has been developed for ultra low RDS (on) applications. This paper compares the RA product and ruggedness of this new technology with a previous generation technology. A factor of 2 improvement in RA product and a ...
2017 IEEE International Reliability Physics Symposium (IRPS), 2017
This paper reports the reliability assessments of 600 V rated GaN-on-Si based depletion mode prot... more This paper reports the reliability assessments of 600 V rated GaN-on-Si based depletion mode prototype MIS power transistors under reverse bias operation. In this study, the impact of two gate module processes on the device reliability was investigated through the accelerated tests conducted at voltages > 600 V and temperatures < 150 °C. These tests established gate dielectric breakdown as the failure mode and a probable mechanism triggering this failure type has been hypothesized. And the related failure activation energies of 0.90 eV and 0.71 eV for the two processes were extracted. The results unveil that device reliability in reverse bias operation can be improved with gate module optimizations. There is no existing GaN specific industry HTRB qualification standard. We present the methodology of translating the hypothetical application profiles to equivalent qualification HTRB duration using the GaN failure degradation models.
2016 IEEE 4th Workshop on Wide Bandgap Power Devices and Applications (WiPDA), 2016
The Safe Operating Area (SOA) characteristics of 600 V rated GaN-on-Si based cascode power device... more The Safe Operating Area (SOA) characteristics of 600 V rated GaN-on-Si based cascode power devices in the Forward Bias (FB) and Short Circuit (SC) test conditions were evaluated in this study. The results from FBSOA tests at ≤ 150 °C device channel temperatures in the linear mode operation demonstrated reliable device operation with negligible parametric drifts. However, the test to destruction FBSOA measurements performed at elevated channel temperatures revealed that the GaN MIS HFET's gate dielectric degradation in the cascode structure is the failure root cause and a theory is presumed to explain the pertinent failure mechanism. Similarly, the destructive SC tests on the cascode GaN devices were conducted that displayed very short withstand times. Through this work, we show that the SC withstand times of GaN devices can be improved by design modifications which come with a Figure of Merit compromise.
2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA), 2015
In this paper the reliability requirements to qualify High Voltage (HV) GaN technologies are disc... more In this paper the reliability requirements to qualify High Voltage (HV) GaN technologies are discussed. A multi-faceted methodology that is derived from the target application profile is used to assure that the device will perform reliably for the specified lifetime in the field. Whether the qualification requirements of GaN technology need to exceed the standard JEDEC requirements or not depends on the activation energies and acceleration factors of the degradation mechanisms associated with a given technology, as well as the target application profile. The discussion in this paper addresses the topic of qualifying GaN technologies and the need for a comprehensive approach to reliability assessment that might exceed the JEDEC standards.
An extremely rugged technology has been developed for ultra low RDS (on) applications. This paper... more An extremely rugged technology has been developed for ultra low RDS (on) applications. This paper describes a methodology of guaranteeing repetitive avalanche performance as long as maximum operating junction temperature, TJ (Max), is not ...
AbstractAn extremely rugged technology has been developed for ultra low RDS (on) applications. T... more AbstractAn extremely rugged technology has been developed for ultra low RDS (on) applications. This paper compares the RA product and ruggedness of this new technology with a previous generation technology. A factor of 2 improvement in RA product and a ...
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Papers by Tim McDonald