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FSM-Based Logic Controller Synthesis in Programmable Devices with Embedded Memory Blocks

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Innovative Technologies in Management and Science

Abstract

For a typical digital system, the design process consists of compilation, translation, synthesis, logic optimization, and technology mapping. Although the final result of that process is a structure built of standard cells, logic cells, macroblocks, and similar components; the characteristics of the system (the silicon area, speed, power, etc.) depend considerably on the logic model of the digital system. Therefore, the synthesis and logic optimization has a significant impact on the quality of the implementation. In this chapter, we describe methods of designing and synthesis for logic controllers in novel reprogrammable structures with embedded memory blocks. This chapter is generally based on the ideas published in [5], however, a number of issues were extended and provide detailed information about the methods and algorithms used in the problem, including [6, 13, 14, 38]. The method starts with the formal specification of a logic controller behavior. To specify the complex nature of a logic controller we have chosen statechart diagrams [21]. The main advantage of this specification is the possibility of detecting all reachable deadlocks [26]. It is particularly important in the case of safety-critical systems since any failure of such system may cause injury or death to human beings. Having graphically specified the behavior, it is subsequently converted into a mathematical model [30]. Next, the mathematical model of the statechart is transformed into an equivalent finite state machine (FSM) [29]. Thus, the logic controller in FSM form can be synthesized by applying ROM-based decomposition method [6] or architectural decomposition method [13], and finally implemented in embedded memory block equipped architectures [45, 48]. Such architectures offer ability to update the functionality, partial reconfiguration, and low non-recurring engineering costs relative to an FPGA design.

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Borowik, G., Łabiak, G., Bukowiec, A. (2015). FSM-Based Logic Controller Synthesis in Programmable Devices with Embedded Memory Blocks. In: Klempous, R., Nikodem, J. (eds) Innovative Technologies in Management and Science. Topics in Intelligent Engineering and Informatics, vol 10. Springer, Cham. https://doi.org/10.1007/978-3-319-12652-4_8

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  • DOI: https://doi.org/10.1007/978-3-319-12652-4_8

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  • Online ISBN: 978-3-319-12652-4

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