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PARLE Parallel Architectures and Languages Europe

Vol.1: Parallel Architectures, Eindhoven, The Netherlands, June 15-19, 1987; Proceedings

  • Conference proceedings
  • © 1987

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Editors:
  1. J. W. Bakker
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  2. A. J. Nijman
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  3. P. C. Treleaven
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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 258)

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Table of contents (29 papers)

  1. Front Matter

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  2. Learning translation invariant recognition in a massively parallel networks

    • Geoffrey E. Hinton
    Pages 1-13

  3. Trace theory and systolic computations

    • Martin Rem
    Pages 14-33

  4. Boltzmann machines and their applications

    • Emile H. L. Aarts, Jan H. M. Korst
    Pages 34-50

  5. Cobweb-2: Structured specification of a wafer-scale supercomputer

    • Paul Anderson, Chris Hankin, Paul Kelly, Peter Osmon, Malcolm Shute
    Pages 51-67

  6. A novel deadlock free and starvation free packet switching communication processor

    • J. K. Annot, R. A. H. van Twist
    Pages 68-85

  7. A parallel architecture for signal understanding through inference on uncertain data

    • P. G. Bosco, E. Giachin, G. Giandonato, G. Martinengo, C. Rullent
    Pages 86-102

  8. An axiomatic approach to the specification of distributed computer architectures

    • W. Damm, G. Doehmen
    Pages 103-120

  9. Computing on a systolic screen: Hulls, contours and applications

    • Frank Dehne, Jörg-Rüdiger Sack, Nicola Santoro
    Pages 121-133

  10. Multiprocessor systems programming in a high-level data-flow language

    • J. L. Gaudiot, L. T. Lee
    Pages 134-151

  11. The twisted cube

    • Peter A. J. Hilbers, Marion R. J. Koopman, Jan L.A. van de Snepscheut
    Pages 152-159

  12. An implemented method for incremental systolic design

    • Chua-Huang Huang, Christian Lengauer
    Pages 160-177

  13. The use of parallel functions in system design

    • J. K. Iliffe
    Pages 178-194

  14. The translation of processes into circuits

    • Anne Kaldewaij
    Pages 195-212

  15. Mapping strategies in message based multiprocessor systems

    • O. Krämer, H. Mühlenbein
    Pages 213-225

  16. Hardware memory management for large knowledge bases

    • S. H. Lavington, M. Standring, Y. J. Jiang, C. J. Wang, M. E. Waite
    Pages 226-241

  17. Transputer-based experiments with the ZAPP architecture

    • D. L. McBurney, M. R. Sleep
    Pages 242-259

  18. Synthesis of systolic arrays for inductive problems

    • Catherine Mongenet, Guy-René Perrin
    Pages 260-277

  19. Practical parallelism using transputer arrays

    • D. J. Pritchard, C. R. Askew, D. B. Carpenter, I. Glendinning, A. J. G. Hey, D. A. Nicole
    Pages 278-294

  20. Systolic array synthesis by static analysis of program dependencies

    • Sanjay V. Rajopadhye, Richard M. Fujimoto
    Pages 295-310
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Bibliographic Information

  • Book Title: PARLE Parallel Architectures and Languages Europe

  • Book Subtitle: Vol.1: Parallel Architectures, Eindhoven, The Netherlands, June 15-19, 1987; Proceedings

  • Editors: J. W. Bakker, A. J. Nijman, P. C. Treleaven

  • Series Title: Lecture Notes in Computer Science

  • DOI: https://doi.org/10.1007/3-540-17943-7

  • Publisher: Springer Berlin, Heidelberg

  • eBook Packages: Springer Book Archive

  • Copyright Information: Springer-Verlag Berlin Heidelberg 1987

  • Softcover ISBN: 978-3-540-17943-6Published: 26 May 1987

  • eBook ISBN: 978-3-540-47144-8Published: 01 July 2005

  • Series ISSN: 0302-9743

  • Series E-ISSN: 1611-3349

  • Edition Number: 1

  • Number of Pages: XIV, 490

  • Topics: Processor Architectures, Programming Languages, Compilers, Interpreters

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