Abstract
This paper describes the methodology and design of a scalable Montgomery multiplication module. There is no limitation on the maximum number of bits manipulated by the multiplier, and the selection of the word-size is made according to the available area and/or desired performance. We describe the general view of the new architecture, analyze hardware organization for its parallel computation, and discuss design tradeoffs which are useful to identify the best hardware configuration.
Acknowledgements
This research is supported in part by Secured Information Technology, Inc. The authors would like to thank Erkay Savaş (Oregon State University) for his comments on the algorithm definition.
Readers should note that Oregon State University has filed or will file a patent application containing this work to the US Patent and Trademark Office.
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References
A. Bernal and A. Guyot. Design of a modular multiplier based on Montgomery’s algorithm. In 13th Conference on Design of Circuits and Integrated Systems, pages 680–685, Madrid, Spain, November 17–20 1998.
W. Diffie and M. E. Hellman. New directions in cryptography. IEEE Transactions on Information Theory, 22:644–654, November 1976.
S. E. Eldridge and C. D. Walter. Hardware implementation of Montgomery’s modular multiplication algorithm. IEEE Transactions on Computers, 42(6):693–699, June 1993.
T. Hamano, N. Takagi, S. Yajima, and F. P Preparata. O(n)-Depth circuit algorithm for modular exponentiation. In S. Knowles and W. H. McAllister, editors, Proceedings, 12th Symposium on Computer Arithmetic, pages 188–192, Bath, England, July 19–21 1995. Los Alamitos, CA: IEEE Computer Society Press.
Ç. K. KoÇ and T. Acar. Fast software exponentiation in GF(2k). In T. Lang, J.-M. Muller, and N. Takagi, editors, Proceedings, 13th Symposium on Computer Arithmetic, pages 225–231, Asilomar, California, July 6–9, 1997. Los Alamitos, CA: IEEE Computer Society Press.
Ç. K. KoÇ and T. Acar. Montgomery multiplication in GF(2k). Designs, Codes and Cryptography, 14(1):57–69, April 1998.
Ç. K. KoÇ, T. Acar, and B. S. Kaliski Jr. Analyzing and comparing Montgomery multiplication algorithms. IEEE Micro, 16(3):26–33, June 1996.
P. Kornerup. High-radix modular multiplication for cryptosystems. In E. Swartz lander, Jr., M. J. Irwin, and G. Jullien, editors, Proceedings, 11th Symposium on Computer Arithmetic, pages 277–283, Windsor, Ontario, June 29-July 2 1993. Los Alamitos, CA: IEEE Computer Society Press.
A. J. Menezes. Elliptic Curve Public Key Cryptosystems. Boston, MA: Kluwer Academic Publishers, 1993.
P. L. Montgomery. Modular multiplication without trial division. Mathematics of Computation, 44(170):519–521, April 1985.
H. Orup. Simplifying quotient determination in high-radix modular multiplication. In S. Knowles and W. H. McAllister, editors, Proceedings, 12th Symposium on Computer Arithmetic, pages 193–199, Bath, England, July 19–21 1995. Los Alamitos, CA: IEEE Computer Society Press.
R. L. Rivest, A. Shamir, and L. Adleman. A method for obtaining digital signatures and public-key cryptosystems. Communications of the ACM, 21(2):120–126, February 1978.
A. Royo, J. Moran, and J. C. Lopez. Design and implementation of a coprocessor for cryptography applications. In European Design and Test Conference, pages 213–217, Paris, France, March 17–20 1997.
A. F. Tenca. Variable Long-Precision Arithmetic (VLPA) for Reconfigurable Co-processor Architectures. PhD thesis, Department of Computer Science, University of California at Los Angeles, March 1998.
C. D. Walter. Space/Time trade-offs for higher radix modular multiplication using repeated addition. IEEE Transactions on Computers, 46(2):139–141, February 1997.
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Tenca, A.F., Koç, Ç.K. (1999). A Scalable Architecture for Montgomery Nultiplication. In: Koç, Ç.K., Paar, C. (eds) Cryptographic Hardware and Embedded Systems. CHES 1999. Lecture Notes in Computer Science, vol 1717. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-48059-5_10
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