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References
J. R. Burch, E. M. Clarke, and D. E. Long. Symbolic model checking with partitioned transition relations. To appear in the Proceedings of VLSI'91.
J. R. Burch, E. M. Clarke, K. L. McMillan, D. L. Dill, and J. Hwang. Symbolic model checking: 1020 states and beyond. In Proceedings of the Fifth Annual Symposium on Logic in Computer Science, June 1990.
D. Dill. Trace theory for automatic hierarchical verification of speed-independent circuits. Technical Report 88-119, Carnegie Mellon University, Computer Science Dept, 1988.
P. Godefroid. Using partial orders to improve automatic verification methods. In Workshop on Computer Aided Verification, 1990.
P. Godefroid and P. Wolper. A partial approach to model checking. In LICS, 1991.
A. J. Martin. The design of a self-timed circuit for distributed mutual exclusion. In Henry Fuchs, editor, 1985 Chapel Hill Conference on VLSI, pages 245–260. Computer Science Press, 1985.
D. K. Probst and H. F. Li. Abstract specification, composition, and proof of correctness of delay-insensitive circuits and systems. Technical report, Concordia University, Dept. of Computer Science, 1989.
D. K. Probst and H. F. Li. Using partial order semantics to avoid the state explosion problem in asynchronous systems. In Workshop on Computer Aided Verification, 1990.
D. K. Probst and H. F. Li. Partial-order model checking: A guide for the perplexed. In Third Workshop on Computer-aided Verification, pages 405–416, July 1991.
C. L. Seitz. System timing. In Carver Mead and Lynn Conway, editors, Introduction to VLSI Systems, pages 218–262. Addison-Wesley, 1980.
A. Valmari. Stubborn sets for reduced state space generation. In 10th Int. Conf. on Application and Theory of Petri Nets, 1989.
A. Valmari. A stubborn attack on the state explosion problem. In Workshop on Computer Aided Verification, 1990.
Tomohiro Yoneda, Yoshihiro Tohma, and Yutaka Kondo. Acceleration of timing verification method based on time Petri nets. Systems and Computers in Japan, 22(12):37–52, 1991.
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McMillan, K.L. (1993). Using unfoldings to avoid the state explosion problem in the verification of asynchronous circuits. In: von Bochmann, G., Probst, D.K. (eds) Computer Aided Verification. CAV 1992. Lecture Notes in Computer Science, vol 663. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-56496-9_14
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