| Acceleration of aes encryption algorithm using field programmable gate arrays D Smekal, J Frolka, J Hajny IFAC-PapersOnLine 49 (25), 384-389, 2016 | 23 | 2016 |
| Towards practical deployment of post-quantum cryptography on constrained platforms and hardware-accelerated platforms L Malina, S Ricci, P Dzurenda, D Smekal, J Hajny, T Gerlich International Conference on Information Technology and Communications …, 2019 | 16 | 2019 |
| Comparative analysis of different implementations of encryption algorithms on FPGA network cards D Smekal, J Hajny, Z Martinasek IFAC-PapersOnLine 51 (6), 312-317, 2018 | 16 | 2018 |
| 200 Gbps hardware accelerated encryption system for FPGA network cards Z Martinasek, J Hajny, D Smekal, L Malina, D Matousek, M Kekely, ... Proceedings of the 2018 Workshop on Attacks and Solutions in Hardware …, 2018 | 14 | 2018 |
| Hardware-Accelerated Twofish Core for FPGA D Smekal, J Hajny, Z Martinasek 2018 41st International Conference on Telecommunications and Signal …, 2018 | 7 | 2018 |
| Packet generators on field programmable gate array platform D Smekal, J Hajny, Z Martinasek 2017 40th International Conference on Telecommunications and Signal …, 2017 | 4 | 2017 |
| An FPGA-based Priority Packet Queues D Smekal, F Nemeth, J Dvorak IFAC-PapersOnLine 52 (27), 377-381, 2019 | 2 | 2019 |
| Methodology for correlations discovery in security logs Z Martinasek, P Blazek, P Silhavy, D Smekal 2017 9th International Congress on Ultra Modern Telecommunications and …, 2017 | 2 | 2017 |
| Privacy-enhancing cloud computing solution for big data D Smekal, S Ricci, P Dzurenda, Z Martinasek 2019 11th International Congress on Ultra Modern Telecommunications and …, 2019 | 1 | 2019 |
| ZABEZPEČENÍ VYSOKORYCHLOSTNÍCH KOMUNIKAČNÍCH SYSTÉMŮ PBD SMÉKAL, JAN HAJNÝ | | |
