| Shared memory consistency models: A tutorial SV Adve, K Gharachorloo computer 29 (12), 66-76, 1996 | 1638 | 1996 |
| Weak ordering—a new definition SV Adve, MD Hill ACM SIGARCH Computer Architecture News 18 (2SI), 2-14, 1990 | 1007 | 1990 |
| The Java memory model J Manson, W Pugh, SV Adve ACM SIGPLAN Notices 40 (1), 378-391, 2005 | 940 | 2005 |
| The impact of technology scaling on lifetime reliability J Srinivasan, SV Adve, P Bose, JA Rivers International Conference on Dependable Systems and Networks, 2004, 177-186, 2004 | 752 | 2004 |
| Foundations of the C++ concurrency memory model HJ Boehm, SV Adve ACM SIGPLAN Notices 43 (6), 68-78, 2008 | 646 | 2008 |
| The case for lifetime reliability-aware microprocessors J Srinivasan, SV Adve, P Bose, JA Rivers ACM SIGARCH Computer Architecture News 32 (2), 276, 2004 | 575 | 2004 |
| Addressing failures in exascale computing M Snir, RW Wisniewski, JA Abraham, SV Adve, S Bagchi, P Balaji, J Belak, ... The International Journal of High Performance Computing Applications 28 (2 …, 2014 | 537 | 2014 |
| A type and effect system for deterministic parallel Java RL Bocchino Jr, VS Adve, D Dig, SV Adve, S Heumann, R Komuravelli, ... Proceedings of the 24th ACM SIGPLAN conference on Object oriented …, 2009 | 470 | 2009 |
| Reconfigurable caches and their application to media processing P Ranganathan, S Adve, NP Jouppi ACM SIGARCH Computer Architecture News 28 (2), 214-224, 2000 | 414 | 2000 |
| Understanding the propagation of hard errors to software and implications for resilient system design ML Li, P Ramachandran, SK Sahoo, SV Adve, VS Adve, Y Zhou ACM Sigplan Notices 43 (3), 265-276, 2008 | 369 | 2008 |
| A unified formalization of four shared-memory models SV Adve, MD Hill IEEE Transactions on Parallel and distributed systems 4 (6), 613-624, 1993 | 337 | 1993 |
| Exploiting structural duplication for lifetime reliability enhancement J Srinivasan, SV Adve, P Bose, JA Rivers 32nd International Symposium on Computer Architecture (ISCA'05), 520-531, 2005 | 303 | 2005 |
| Rsim: simulating shared-memory multiprocessors with ILP processors CJ Hughes, VS Pai, P Ranganathan, SV Adve Computer 35 (2), 40-49, 2002 | 289 | 2002 |
| Parallel programming must be deterministic by default RL Bocchino, V Adve, S Adve, M Snir Usenix HotPar 6 (10.5555), 1, 2009 | 270 | 2009 |
| DeNovo: Rethinking the memory hierarchy for disciplined parallelism B Choi, R Komuravelli, H Sung, R Smolinski, N Honarmand, SV Adve, ... 2011 International Conference on Parallel Architectures and Compilation …, 2011 | 264 | 2011 |
| Lifetime reliability: Toward an architectural solution J Srinivasan, SV Adve, P Bose, JA Rivers Ieee Micro 25 (3), 70-80, 2005 | 263 | 2005 |
| Memory models: A case for rethinking parallel languages and hardware SV Adve, HJ Boehm Communications of the ACM 53 (8), 90-101, 2010 | 256 | 2010 |
| Performance of database workloads on shared-memory systems with out-of-order processors P Ranganathan, K Gharachorloo, SV Adve, LA Barroso Proceedings of the eighth international conference on Architectural support …, 1998 | 247 | 1998 |
| Predictive dynamic thermal management for multimedia applications J Srinivasan, SV Adve Proceedings of the 17th annual international conference on Supercomputing …, 2003 | 244 | 2003 |
| The ALPBench benchmark suite for complex multimedia applications ML Li, R Sasanka, SV Adve, YK Chen, E Debes IEEE International. 2005 Proceedings of the IEEE Workload Characterization …, 2005 | 241 | 2005 |
