A BIST scheme for a SNR, gain tracking, and frequency response test of a sigma-delta ADC
MF Toner, GW Roberts - … on Circuits and Systems II: Analog …, 1995 - ieeexplore.ieee.org
MF Toner, GW Roberts
IEEE Transactions on Circuits and Systems II: Analog and Digital …, 1995•ieeexplore.ieee.orgBuilt-in-self test (BIST) for VLSI systems is desirable in order to reduce the cost per chip of
production-time testing by the manufacturer. In addition, it can provide the means to perform
in-the-field diagnostics. This paper discusses a mixed analog-digital BIST (MADBIST) for a
signal-to-noise-ratio test, gain tracking test, and frequency response test of a sigma-delta
analog-to-digital converter. The MADBIST strategy for the SNR, GT, and FR tests of the ADC
is introduced, accuracy issues are discussed, and experimental results are presented.<>
production-time testing by the manufacturer. In addition, it can provide the means to perform
in-the-field diagnostics. This paper discusses a mixed analog-digital BIST (MADBIST) for a
signal-to-noise-ratio test, gain tracking test, and frequency response test of a sigma-delta
analog-to-digital converter. The MADBIST strategy for the SNR, GT, and FR tests of the ADC
is introduced, accuracy issues are discussed, and experimental results are presented.<>
Built-in-self test (BIST) for VLSI systems is desirable in order to reduce the cost per chip of production-time testing by the manufacturer. In addition, it can provide the means to perform in-the-field diagnostics. This paper discusses a mixed analog-digital BIST (MADBIST) for a signal-to-noise-ratio test, gain tracking test, and frequency response test of a sigma-delta analog-to-digital converter. The MADBIST strategy for the SNR, GT, and FR tests of the ADC is introduced, accuracy issues are discussed, and experimental results are presented.< >
ieeexplore.ieee.org