Flexible hardware acceleration for instruction-grain program monitoring
ACM SIGARCH Computer Architecture News, 2008•dl.acm.org
Instruction-grain program monitoring tools, which check and analyze executing programs at
the granularity of individual instructions, are invaluable for quickly detecting bugs and
security attacks and then limiting their damage (via containment and/or recovery).
Unfortunately, their fine-grain nature implies very high monitoring overheads for software-
only tools, which are typically based on dynamic binary instrumentation. Previous hardware
proposals either focus on mechanisms that target specific bugs or address only the cost of …
the granularity of individual instructions, are invaluable for quickly detecting bugs and
security attacks and then limiting their damage (via containment and/or recovery).
Unfortunately, their fine-grain nature implies very high monitoring overheads for software-
only tools, which are typically based on dynamic binary instrumentation. Previous hardware
proposals either focus on mechanisms that target specific bugs or address only the cost of …
Instruction-grain program monitoring tools, which check and analyze executing programs at the granularity of individual instructions, are invaluable for quickly detecting bugs and security attacks and then limiting their damage (via containment and/or recovery). Unfortunately, their fine-grain nature implies very high monitoring overheads for software-only tools, which are typically based on dynamic binary instrumentation. Previous hardware proposals either focus on mechanisms that target specific bugs or address only the cost of binary instrumentation. In this paper, we propose a flexible hardware solution for accelerating a wide range of instruction-grain monitoring tools. By examining a number of diverse tools (for memory checking, security tracking, and data race detection), we identify three significant common sources of overheads and then propose three novel hardware techniques for addressing these overheads: Inheritance Tracking, Idempotent Filters, and Metadata-TLBs. Together, these constitute a general-purpose hardware acceleration framework. Experimental results show our framework reduces overheads by 2-3X over the previous state-of-the-art, while supporting the needed flexibility.
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