A 48-core IA-32 message-passing processor with DVFS in 45nm CMOS
J Howard, S Dighe, Y Hoskote, S Vangal… - … Solid-State Circuits …, 2010 - ieeexplore.ieee.org
J Howard, S Dighe, Y Hoskote, S Vangal, D Finan, G Ruhl, D Jenkins, H Wilson, N Borkar…
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 2010•ieeexplore.ieee.orgA 567 mm 2 processor on 45 nm CMOS integrates 48 IA-32 cores and 4 DDR3 channels in
a 6× 4 2D-mesh network. Cores communicate through message passing using 384 KB of on-
die shared memory. Fine-grain power management takes advantage of 8 voltage and 28
frequency islands to allow independent DVFS of cores and mesh. As performance scales,
the processor dissipates between 25 W and 125 W.
a 6× 4 2D-mesh network. Cores communicate through message passing using 384 KB of on-
die shared memory. Fine-grain power management takes advantage of 8 voltage and 28
frequency islands to allow independent DVFS of cores and mesh. As performance scales,
the processor dissipates between 25 W and 125 W.
A 567 mm 2 processor on 45 nm CMOS integrates 48 IA-32 cores and 4 DDR3 channels in a 6×4 2D-mesh network. Cores communicate through message passing using 384 KB of on-die shared memory. Fine-grain power management takes advantage of 8 voltage and 28 frequency islands to allow independent DVFS of cores and mesh. As performance scales, the processor dissipates between 25 W and 125 W.
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