High-density shift-register-based rapid single-flux-quantum memory system for bit-serial microprocessors

M Tanaka, R Sato, Y Hatanaka… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
M Tanaka, R Sato, Y Hatanaka, A Fujimaki
IEEE Transactions on Applied Superconductivity, 2016ieeexplore.ieee.org
We demonstrated a high-density shift-register-based random access memory system based
on rapid single-flux-quantum (RSFQ) logic. This memory system was developed to be
integrated with bit-serial RSFQ microprocessors, which are called the CORE e series. It is
composed of a shift-register array to store data, a decoder to select the shift register pointed
to by a given address, and mergers to output data. To achieve high density, we introduced a
new memory system structure and designed compact storage elements and other peripheral …
We demonstrated a high-density shift-register-based random access memory system based on rapid single-flux-quantum (RSFQ) logic. This memory system was developed to be integrated with bit-serial RSFQ microprocessors, which are called the CORE e series. It is composed of a shift-register array to store data, a decoder to select the shift register pointed to by a given address, and mergers to output data. To achieve high density, we introduced a new memory system structure and designed compact storage elements and other peripheral components. We integrated two 256-bit memory systems (32 entries for 8-bit data and instructions each) with a CORE e microprocessor and fabricated it using the National Institute of Advanced Industrial Science and Technology 10-kA/cm 2 Advanced Process. The area occupied by each memory system is 2.69 mm 2 . We obtained correct operations for all of the addresses in low-frequency tests. The typical measured bias margin was 86%-106%.
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