Soft error rate improvements in 14-nm technology featuring second-generation 3D tri-gate transistors
N Seifert, S Jahinuzzaman, J Velamala… - … on Nuclear Science, 2015 - ieeexplore.ieee.org
N Seifert, S Jahinuzzaman, J Velamala, R Ascazubi, N Patel, B Gill, J Basile, J Hicks
IEEE Transactions on Nuclear Science, 2015•ieeexplore.ieee.orgWe report on radiation-induced soft error rate (SER) improvements in the 14-nm second
generation high-k+ metal gate bulk tri-gate technology. Upset rates of memory cells,
sequential elements, and combinational logic were investigated for terrestrial radiation
environments, including thermal and high-energy neutrons, high-energy protons, and alpha-
particles. SER improvements up to~ 23× with respect to devices manufactured in a 32-nm
planar technology are observed. The improvements are particularly pronounced in logic …
generation high-k+ metal gate bulk tri-gate technology. Upset rates of memory cells,
sequential elements, and combinational logic were investigated for terrestrial radiation
environments, including thermal and high-energy neutrons, high-energy protons, and alpha-
particles. SER improvements up to~ 23× with respect to devices manufactured in a 32-nm
planar technology are observed. The improvements are particularly pronounced in logic …
We report on radiation-induced soft error rate (SER) improvements in the 14-nm second generation high- k + metal gate bulk tri-gate technology. Upset rates of memory cells, sequential elements, and combinational logic were investigated for terrestrial radiation environments, including thermal and high-energy neutrons, high-energy protons, and alpha-particles. SER improvements up to ~ 23× with respect to devices manufactured in a 32-nm planar technology are observed. The improvements are particularly pronounced in logic devices, where aggressive fin depopulation combined with scaling of relevant fin parameters results in a ~ 8× reduction of upset rates relative to the first-generation tri-gate technology.
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