Digital fiber optic delay line memory

DB Sarrazin, HF Jordan… - Digital Optical Computing …, 1990 - spiedigitallibrary.org
DB Sarrazin, HF Jordan, VP Heuring
Digital Optical Computing II, 1990spiedigitallibrary.org
Characteristics of digital synchronous delay-line memories that use pulse stretching to
compensate for phase variations are presented. When optical fiber is used as the delay
medium, the choice of carrier wavelength determines which mechanism (thermal variation or
dispersion) limits the maximum memory size. If implemented at the dispersion-minimum
wavelength of 1310 nm using a laser with lmewidth 1.55 nm and 50% duty cycle, a memory
could store up to 22 million bits before dispersion dominates, but such a system would …
Characteristics of digital synchronous delay-line memories that use pulse stretching to compensate for phase variations are presented. When optical fiber is used as the delay medium, the choice of carrier wavelength determines which mechanism (thermal variation or dispersion) limits the maximum memory size. If implemented at the dispersion-minimum wavelength of 1310 nm using a laser with lmewidth 1.55 nm and 50% duty cycle, a memory could store up to 22 million bits before dispersion dominates, but such a system would require thermal stabilization to within 0.002C. A digital fiberoptic delay line memory will be built for a bit-serial optical computer, where each switching element is a lithium niobate directional coupler having an electro-optic control terminal. Non-idealities in this type of switch, such as attenuation, crosstalk, and polarization losses, will have negligible effects on the memory. Intermittent regeneration errors at the electrooptic boundary will also be minor. For a bit modulation frequency of 100 MHz, a single-line 2000-bit memory can be reliably implemented without thermal compensation for a lab variation of A memory system incorporating L delay lines would reduce both the average access time and the thermal sensitivity of the system by a factor of L. The number of additional switches required by such a memory is roughly 5L in a system accounting for regeneration needs.
SPIE Digital Library