Compilation of a countermeasure against instruction-skip fault attacks
T Barry, D Couroussé, B Robisson - Proceedings of the Third Workshop …, 2016 - dl.acm.org
T Barry, D Couroussé, B Robisson
Proceedings of the Third Workshop on Cryptography and Security in Computing …, 2016•dl.acm.orgPhysical attacks especially fault attacks represent one the major threats against embedded
systems. In the state of the art, software countermeasures against fault attacks are either
applied at the source code level where it will very likely be removed at compilation time, or at
assembly level where several transformations need to be performed on the assembly code
and lead to significant overheads both in terms of code size and execution time. This paper
presents the use of compiler techniques to efficiently automate the application of software …
systems. In the state of the art, software countermeasures against fault attacks are either
applied at the source code level where it will very likely be removed at compilation time, or at
assembly level where several transformations need to be performed on the assembly code
and lead to significant overheads both in terms of code size and execution time. This paper
presents the use of compiler techniques to efficiently automate the application of software …
Physical attacks especially fault attacks represent one the major threats against embedded systems. In the state of the art, software countermeasures against fault attacks are either applied at the source code level where it will very likely be removed at compilation time, or at assembly level where several transformations need to be performed on the assembly code and lead to significant overheads both in terms of code size and execution time. This paper presents the use of compiler techniques to efficiently automate the application of software countermeasures against instruction-skip fault attacks. We propose a modified LLVM compiler that considers our security objectives throughout the compilation process. Experimental results illustrate the effectiveness of this approach on AES implementations running on an ARM-based microcontroller in terms of security overhead compared to existing solutions.
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