MorphoSys: case study of a reconfigurable computing system targeting multimedia applications
H Singh, G Lu, E Filho, R Maestre, MH Lee… - Proceedings of the 37th …, 2000 - dl.acm.org
Proceedings of the 37th Annual Design Automation Conference, 2000•dl.acm.org
In this paper, we present a case study for the design, programming and usage of a
reconfigurable system-on-chip, MorphoSys, which is targeted at computation-intensive
applications. This 2-million transistor design combines a reconfigurable array of cells with a
RISC processor core and a high bandwidth memory interface. The system architecture,
software tools including a scheduler for reconfigurable systems, and performance analysis
(with impressive speedups) for target applications are described.
reconfigurable system-on-chip, MorphoSys, which is targeted at computation-intensive
applications. This 2-million transistor design combines a reconfigurable array of cells with a
RISC processor core and a high bandwidth memory interface. The system architecture,
software tools including a scheduler for reconfigurable systems, and performance analysis
(with impressive speedups) for target applications are described.
In this paper, we present a case study for the design, programming and usage of a reconfigurable system-on-chip, MorphoSys, which is targeted at computation-intensive applications. This 2-million transistor design combines a reconfigurable array of cells with a RISC processor core and a high bandwidth memory interface. The system architecture, software tools including a scheduler for reconfigurable systems, and performance analysis (with impressive speedups) for target applications are described.
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