A 1.1pJ/b/Lane, 1.8Tb/s Chiplet Over XSR-MCM Channels Using 113Gb/s PAM-4 Transceiver with Signal Equalization and Envelope Adaptation Using TX-FFE in 5nm CMOS | IEEE Conference Publication | IEEE Xplore
Location via proxy:
[ UP ]
[Report a bug]
[Manage cookies]
No cookies
No scripts
No ads
No referrer
Show this form