Testing embedded RAM modules in SRAM-based FPGAs
Abstract
Index Terms
- Testing embedded RAM modules in SRAM-based FPGAs
Recommendations
Test, diagnosis and fault simulation of embedded RAM modules in SRAM-based FPGAs
This paper presents a unique scheme for testing and locating multiple stuck at faults in the embedded RAM modules of SRAM-based FPGAs. The RAM modules are tested using the MATS++ algorithm. The interconnection scheme makes it possible to test all the ...
Testing memory modules in SRAM-based configurable FPGAs
MTDT '97: Proceedings of the 1997 IEEE International Workshop on Memory Technology, Design and TestingThis paper studies the issues involved in testing memory modules (configured as LUTs and RAMs) in FPGAs and proposes new algorithms as this scenario is substantially different from traditional memory testing. Test generation for LUTs and RAMs is ...
SRAM-Based FPGAs: Testing the Embedded RAM Modules
Special issue on the IEEE European Test WorkshopThis paper addresses the problem of testing the RAM mode of the LUT/RAM modules of configurable SRAM-based Field Programmable Gate Arrays (FPGAs) using a minimum number of test configurations. A model of architecture for the LUT/RAM module with N inputs ...
Comments
Information & Contributors
Information
Published In
![cover image ACM Conferences](/cms/asset/fd9c4a91-74f1-4095-9492-86582f039655/1117201.cover.jpg)
Sponsors
Publisher
Association for Computing Machinery
New York, NY, United States
Publication History
Check for updates
Qualifiers
- Article
Conference
Acceptance Rates
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- 0Total Citations
- 0Total Downloads
- Downloads (Last 12 months)0
- Downloads (Last 6 weeks)0
Other Metrics
Citations
View Options
Get Access
Login options
Check if you have access through your login credentials or your institution to get full access on this article.
Sign in