research-article

Optimizing scientific application loops on stream processors

Authors:

Quan Hoang NguyenAuthors Info & Claims

LCTES '08: Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems

Pages 161 - 170

https://doi.org/10.1145/1375657.1375679

Published: 12 June 2008 Publication History

Abstract

This paper describes a graph coloring compiler framework to allocate on-chip SRF(Stream Register File) storage for optimizing scientific applications on stream processors. Our framework consists of first applying enabling optimizations such as loop unrolling to expose stream reuse and opportunities for maximizing parallelism, i.e., overlapping kernel execution and memory transfers.Then the three SRF management tasks are solved in a unified manner via graph coloring: (1) placing streams in the SRF, (2) exploiting stream use, and (3) maximizing parallelism. We evaluate the performance of our compiler framework by actually running nine representative scientific computing kernels on our FT64 stream processor. Our preliminary results show that compiler management achieves an average speedup of 2.3x compared to First-Fit allocation. In comparison with the performance results obtained from running these benchmarks on Itanium 2, an average speedup of 2.1x is observed.

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Cited By

Wang LXue JYang X(2018)Optimizing modulo scheduling to achieve reuse and concurrency for stream processorsThe Journal of Supercomputing10.1007/s11227-010-0522-z59:3(1229-1251)Online publication date: 31-Dec-2018
https://dl.acm.org/doi/10.1007/s11227-010-0522-z
Raghavan PCatthoor F(2012)Storage Allocation for Streaming-Based Register FileEnergy-Aware Memory Management for Embedded Multimedia Systems10.1201/b11418-6(151-194)Online publication date: 4-Jan-2012
https://doi.org/10.1201/b11418-6
Yang XWang LXue JWu Q(2012)Comparability Graph Coloring for Optimizing Utilization of Software-Managed Stream Register Files for Stream ProcessorsACM Transactions on Architecture and Code Optimization10.1145/2133382.21333879:1(1-30)Online publication date: 1-Mar-2012
https://dl.acm.org/doi/10.1145/2133382.2133387
Show More Cited By

Index Terms

Optimizing scientific application loops on stream processors
1. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory
2. Software and its engineering
  1. Software notations and tools
    1. Compilers

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Published In

cover image ACM Conferences

LCTES '08: Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems

June 2008

180 pages

ISBN:9781605581040

DOI:10.1145/1375657

General Chair:
Krisztián Flautner
ARM Limited, UK
,
Program Chair:
John Regehr
University of Utah, USA

ACM SIGPLAN Notices Volume 43, Issue 7
LCTES '08
July 2008
167 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/1379023
Issue’s Table of Contents

Copyright © 2008 ACM.

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Published: 12 June 2008

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LCTES08: ACM SIGPLAN/SIGBED 2008 Conference on Languages, Compilers, and Tools for Embedded Systems

June 12 - 13, 2008

AZ, Tucson, USA

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Overall Acceptance Rate 116 of 438 submissions, 26%

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Cited By

Wang LXue JYang X(2018)Optimizing modulo scheduling to achieve reuse and concurrency for stream processorsThe Journal of Supercomputing10.1007/s11227-010-0522-z59:3(1229-1251)Online publication date: 31-Dec-2018
https://dl.acm.org/doi/10.1007/s11227-010-0522-z
Raghavan PCatthoor F(2012)Storage Allocation for Streaming-Based Register FileEnergy-Aware Memory Management for Embedded Multimedia Systems10.1201/b11418-6(151-194)Online publication date: 4-Jan-2012
https://doi.org/10.1201/b11418-6
Yang XWang LXue JWu Q(2012)Comparability Graph Coloring for Optimizing Utilization of Software-Managed Stream Register Files for Stream ProcessorsACM Transactions on Architecture and Code Optimization10.1145/2133382.21333879:1(1-30)Online publication date: 1-Mar-2012
https://dl.acm.org/doi/10.1145/2133382.2133387
Tian WXue CLi MChen EChu WWong WPalakal MHung C(2011)Loop fusion and reordering for register file optimization on stream processorsProceedings of the 2011 ACM Symposium on Applied Computing10.1145/1982185.1982306(560-565)Online publication date: 21-Mar-2011
https://dl.acm.org/doi/10.1145/1982185.1982306
Wang LXue JYang XDe Micheli GAl-Hashimi BMueller WMacii E(2010)Reuse-aware modulo scheduling for stream processorsProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871197(1112-1117)Online publication date: 8-Mar-2010
https://dl.acm.org/doi/10.5555/1870926.1871197
Li Wang Jingling Xue Xuejun Yang (2010)Reuse-aware modulo scheduling for stream processors2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)10.1109/DATE.2010.5456975(1112-1117)Online publication date: Mar-2010
https://doi.org/10.1109/DATE.2010.5456975
Yang XWu JZeng KTang Y(2010)Managing Data-Objects in Dynamically Reconfigurable CachesJournal of Computer Science and Technology10.1007/s11390-010-9320-625:2(232-245)Online publication date: 16-Mar-2010
https://doi.org/10.1007/s11390-010-9320-6
Raghavan PCatthoor FRosenstiel WWakabayashi K(2009)SARAProceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis10.1145/1629435.1629442(41-50)Online publication date: 11-Oct-2009
https://dl.acm.org/doi/10.1145/1629435.1629442
Yang XWang LXue JDeng YZhang Y(2009)Comparability graph coloring for optimizing utilization of stream register files in stream processorsACM SIGPLAN Notices10.1145/1594835.150419544:4(111-120)Online publication date: 14-Feb-2009
https://dl.acm.org/doi/10.1145/1594835.1504195
Yang XWang LXue JDeng YZhang YReed DSarkar V(2009)Comparability graph coloring for optimizing utilization of stream register files in stream processorsProceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming10.1145/1504176.1504195(111-120)Online publication date: 14-Feb-2009
https://dl.acm.org/doi/10.1145/1504176.1504195
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