poster

Analog circuit shielding routing algorithm based on net classification

Authors:

Hailong YaoAuthors Info & Claims

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

Pages 123 - 128

https://doi.org/10.1145/1840845.1840872

Published: 18 August 2010 Publication History

Abstract

Analog signals are more sensitive to crosstalk than digital signals, resulting in instability of analog circuits. To eliminate coupling, it is common practice to insert shielding wires on one or both sides of critical signals. In this paper, a novel analog circuit shielding routing algorithm based on net classification is proposed. Circuit performance requirements are transformed into geometric properties of nets according to the result of placement, and different shielding wire routing algorithms are designed to meet these geometric properties. A* algorithm is adopted to route the critical nets, and shielding wires are added at the same time. Maze algorithm is used to route the P/G nets and other general nets. Experimental results show that the router is efficient in routing and effective in reducing crosstalk. Although capacitive load and routing area increase, the resulting coupling is negligible and the circuit performance is significantly improved.

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Cited By

Xu PLi JHo TYu BZhu K(2024)Performance-Driven Analog Layout Automation: Current Status and Future Directions (Invited Paper)2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASP-DAC58780.2024.10473859(679-685)Online publication date: 22-Jan-2024
https://doi.org/10.1109/ASP-DAC58780.2024.10473859
Martins RLourenço N(2023)Analog Integrated Circuit Routing Techniques: An Extensive ReviewIEEE Access10.1109/ACCESS.2023.326548111(35965-35983)Online publication date: 2023
https://doi.org/10.1109/ACCESS.2023.3265481
Nader RNashaat IDessouky M(2022)Automatic Analog and Mixed-Signal Physical Design Review2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)10.1109/JAC-ECC56395.2022.10043953(58-63)Online publication date: 19-Dec-2022
https://doi.org/10.1109/JAC-ECC56395.2022.10043953
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Index Terms

Analog circuit shielding routing algorithm based on net classification
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Placement
      2. Wire routing

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Published In

cover image ACM Conferences

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

August 2010

458 pages

ISBN:9781450301466

DOI:10.1145/1840845

General Chairs:
Vojin Oklobdzija
University of Texas, Dallas
,
Barry Pangle
Mentor Graphics
,
Naehyuck Chang
Seoul National University
,
Program Chairs:
Naresh Shanbhag
University of Illinois at Urbana-Champaign
,
Chris H. Kim
University of Minnesota

Copyright © 2010 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGDA: ACM Special Interest Group on Design Automation

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Association for Computing Machinery

New York, NY, United States

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Published: 18 August 2010

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SIGDA

ISLPED'10: International Symposium on Low Power Electronics and Design

August 18 - 20, 2010

Texas, Austin, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

Xu PLi JHo TYu BZhu K(2024)Performance-Driven Analog Layout Automation: Current Status and Future Directions (Invited Paper)2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASP-DAC58780.2024.10473859(679-685)Online publication date: 22-Jan-2024
https://doi.org/10.1109/ASP-DAC58780.2024.10473859
Martins RLourenço N(2023)Analog Integrated Circuit Routing Techniques: An Extensive ReviewIEEE Access10.1109/ACCESS.2023.326548111(35965-35983)Online publication date: 2023
https://doi.org/10.1109/ACCESS.2023.3265481
Nader RNashaat IDessouky M(2022)Automatic Analog and Mixed-Signal Physical Design Review2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)10.1109/JAC-ECC56395.2022.10043953(58-63)Online publication date: 19-Dec-2022
https://doi.org/10.1109/JAC-ECC56395.2022.10043953
Budak APan DChen HZhu KLiu MAlawieh MZhang SShi WTang X(2022)CAD for Analog/Mixed‐Signal Integrated CircuitsAdvances in Semiconductor Technologies10.1002/9781119869610.ch3(43-60)Online publication date: 30-Sep-2022
https://doi.org/10.1002/9781119869610.ch3
Zhu KLiu MLin YXu BLi STang XSun NPan D(2019)GeniusRoute: A New Analog Routing Paradigm Using Generative Neural Network Guidance2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD45719.2019.8942164(1-8)Online publication date: Nov-2019
https://doi.org/10.1109/ICCAD45719.2019.8942164
Xu BZhu KLiu MLin YLi STang XSun NPan D(2019)MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence: Invited Paper2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD45719.2019.8942060(1-8)Online publication date: Nov-2019
https://doi.org/10.1109/ICCAD45719.2019.8942060
Torabi MZhang L(2017)A Fast Hierarchical Adaptive Analog Routing Algorithm Based on Integer Linear ProgrammingACM Transactions on Design Automation of Electronic Systems10.1145/303546422:3(1-23)Online publication date: 23-May-2017
https://dl.acm.org/doi/10.1145/3035464
Marolt DScheible JJerke GMarolt V(2016)SWARM: A Self-Organization Approach for Layout Automation in Analog IC DesignInternational Journal of Electronics and Electrical Engineering10.18178/ijeee.4.5.374-385(374-385)Online publication date: 2016
https://doi.org/10.18178/ijeee.4.5.374-385
Lin MChang YHung C(2016)Recent research development and new challenges in analog layout synthesis2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2016.7428080(617-622)Online publication date: Jan-2016
https://doi.org/10.1109/ASPDAC.2016.7428080
Levi IKeren OFish A(2015)Data-Dependent Delays as a Barrier Against Power AttacksIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2015.245237162:8(2069-2078)Online publication date: Aug-2015
https://doi.org/10.1109/TCSI.2015.2452371
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