research-article

Efficient memory virtualization for Cross-ISA system mode emulation

Authors:

Chao-Jui Chang,

Pen-Chung YewAuthors Info & Claims

VEE '14: Proceedings of the 10th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments

Pages 117 - 128

https://doi.org/10.1145/2576195.2576201

Published: 01 March 2014 Publication History

Abstract

Cross-ISA system-mode emulation has many important applications. For example, Cross-ISA system-mode emulation helps computer architects and OS developers trace and debug kernel execution-flow efficiently by emulating a slower platform (such as ARM) on a more powerful plat-form (such as an x86 machine). Cross-ISA system-mode emulation also enables workload consolidation in data centers with platforms of different instruction-set architectures (ISAs). However, system-mode emulation is much slower. One major overhead in system-mode emulation is the multi-level memory address translation that maps guest virtual address to host physical address. Shadow page tables (SPT) have been used to reduce such overheads, but primarily for same-ISA virtualization. In this paper we propose a novel approach called embedded shadow page tables (ESPT). EPST embeds a shadow page table into the address space of a cross-ISA dynamic binary translation (DBT) and uses hardware memory management unit in the CPU to translate memory addresses, instead of software translation in a current DBT emulator like QEMU. We also use the larger address space on modern 64-bit CPUs to accommodate our DBT emulator so that it will not interfere with the guest operating system. We incorporate our new scheme into QEMU, a popular, retargetable cross-ISA system emulator. SPEC CINT2006 benchmark results indicate that our technique achieves an average speedup of 1.51 times in system mode when emulating ARM on x86, and a 1.59 times speedup for emulating IA32 on x86_64.

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Cited By

Jiang JLiang CDong RYang ZZhou ZWang WYew PZhang WGrosser TDubach CSteuwer MXue JOttoni GQuintão Pereira F(2024)A System-Level Dynamic Binary Translator using Automatically-Learned Translation RulesProceedings of the 2024 IEEE/ACM International Symposium on Code Generation and Optimization10.1109/CGO57630.2024.10444850(423-434)Online publication date: 2-Mar-2024
https://dl.acm.org/doi/10.1109/CGO57630.2024.10444850
Xie BLi XYan YYan CLiu TZhang TYang CZhang F(2023)On-Demand Triggered Memory Management Unit in Dynamic Binary TranslatorAdvanced Parallel Processing Technologies10.1007/978-981-99-7872-4_17(297-309)Online publication date: 8-Nov-2023
https://doi.org/10.1007/978-981-99-7872-4_17
Faravelon AGruber OPétrot F(2021)Removing Load/Store Helpers in Dynamic Binary TranslationMulti‐Processor System‐on‐Chip 110.1002/9781119818298.ch7(133-160)Online publication date: 26-Mar-2021
https://doi.org/10.1002/9781119818298.ch7
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Index Terms

Efficient memory virtualization for Cross-ISA system mode emulation
1. Computer systems organization
  1. Architectures

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cover image ACM Conferences

VEE '14: Proceedings of the 10th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments

March 2014

236 pages

ISBN:9781450327640

DOI:10.1145/2576195

General Chair:
Martin Hirzel
IBM Research
,
Program Chairs:
Erez Petrank
Technion
,
Dan Tsafrir
Technion

ACM SIGPLAN Notices Volume 49, Issue 7
VEE '14
July 2014
222 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/2674025
Editors:
Mark W. Bailey
Hamilton College, Clinton, NY
,
Rajeev Balasubramonian
University of Utah
,
Al Davis
University of Utah
,
Sarita Adve
University of Illinois at Urbana-Champ
Issue’s Table of Contents

Copyright © 2014 ACM.

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Published: 01 March 2014

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VEE '14: 10th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments

March 1 - 2, 2014

Utah, Salt Lake City, USA

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VEE '14 Paper Acceptance Rate 18 of 56 submissions, 32%;

Overall Acceptance Rate 80 of 235 submissions, 34%

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Cited By

Jiang JLiang CDong RYang ZZhou ZWang WYew PZhang WGrosser TDubach CSteuwer MXue JOttoni GQuintão Pereira F(2024)A System-Level Dynamic Binary Translator using Automatically-Learned Translation RulesProceedings of the 2024 IEEE/ACM International Symposium on Code Generation and Optimization10.1109/CGO57630.2024.10444850(423-434)Online publication date: 2-Mar-2024
https://dl.acm.org/doi/10.1109/CGO57630.2024.10444850
Xie BLi XYan YYan CLiu TZhang TYang CZhang F(2023)On-Demand Triggered Memory Management Unit in Dynamic Binary TranslatorAdvanced Parallel Processing Technologies10.1007/978-981-99-7872-4_17(297-309)Online publication date: 8-Nov-2023
https://doi.org/10.1007/978-981-99-7872-4_17
Faravelon AGruber OPétrot F(2021)Removing Load/Store Helpers in Dynamic Binary TranslationMulti‐Processor System‐on‐Chip 110.1002/9781119818298.ch7(133-160)Online publication date: 26-Mar-2021
https://doi.org/10.1002/9781119818298.ch7
Song CWang WYew PZhai AZhang WDan TDahlia M(2019)Unleashing the power of learningProceedings of the 2019 USENIX Conference on Usenix Annual Technical Conference10.5555/3358807.3358815(77-89)Online publication date: 10-Jul-2019
https://dl.acm.org/doi/10.5555/3358807.3358815
Wang WMcCamant SZhai AYew P(2018)Enhancing Cross-ISA DBT Through Automatically Learned Translation RulesACM SIGPLAN Notices10.1145/3296957.317716053:2(84-97)Online publication date: 19-Mar-2018
https://dl.acm.org/doi/10.1145/3296957.3177160
Wang WMcCamant SZhai AYew PShen XTuck JBianchini RSarkar V(2018)Enhancing Cross-ISA DBT Through Automatically Learned Translation RulesProceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3173162.3177160(84-97)Online publication date: 19-Mar-2018
https://dl.acm.org/doi/10.1145/3173162.3177160
d'Antras AGorgovan CGarside JGoodacre JLuján M(2017)HyperMAMBO-X64ACM SIGPLAN Notices10.1145/3140607.305075652:7(228-241)Online publication date: 8-Apr-2017
https://dl.acm.org/doi/10.1145/3140607.3050756
Wang WYew PZhai AMcCamant SWu YBobba JChoudhury TKo SCampbell AGanesan D(2017)Enabling Cross-ISA Offloading for COTS BinariesProceedings of the 15th Annual International Conference on Mobile Systems, Applications, and Services10.1145/3081333.3081337(319-331)Online publication date: 16-Jun-2017
https://dl.acm.org/doi/10.1145/3081333.3081337
d'Antras AGorgovan CGarside JGoodacre JLuján M(2017)HyperMAMBO-X64Proceedings of the 13th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments10.1145/3050748.3050756(228-241)Online publication date: 8-Apr-2017
https://dl.acm.org/doi/10.1145/3050748.3050756
Faravelon AGruber OPetrot F(2017)Optimizing Memory Access Performance Using Hardware Assisted Virtualization in Retargetable Dynamic Binary Translation2017 Euromicro Conference on Digital System Design (DSD)10.1109/DSD.2017.41(40-46)Online publication date: Aug-2017
https://doi.org/10.1109/DSD.2017.41
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