Single-Photon Avalanche Diodes (SPAD) in CMOS 0.35
µm technology
D Pellion, K Jradi, Nicolas Brochard, D Prêle, Dominique Ginhac
To cite this version:
D Pellion, K Jradi, Nicolas Brochard, D Prêle, Dominique Ginhac. Single-Photon Avalanche Diodes
(SPAD) in CMOS 0.35 µm technology. Nuclear Instruments and Methods in Physics Research Section
A: Accelerators, Spectrometers, Detectors and Associated Equipment, Elsevier, 2015, 787, pp.380-385.
10.1016/j.nima.2015.01.100. hal-01196570
HAL Id: hal-01196570
https://hal-univ-bourgogne.archives-ouvertes.fr/hal-01196570
Submitted on 10 Sep 2015
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1
Single-‐Photon
Avalanche
Diodes
(SPAD)
in
2
CMOS
0.35µm
technology
3
D.
Pellion1,
K.
Jradi1,
N.
Brochard1,
D.
Prêle2,
D.
Ginhac1
4
5
1:
Le2i
-‐
CNRS/Univ.
de
Bourgogne,
Dijon,
France
6
2:
APC
-‐
CNRS/Univ.
Paris
Diderot,
Paris,
France
7
8
Abstract:
9
Some
decades
ago
single
photon
detection
used
to
be
the
terrain
of
photomultiplier
tube
10
(PMT),
thanks
to
its
characteristics
of
sensitivity
and
speed.
However,
PMT
has
several
11
disadvantages
such
as
low
quantum
efficiency,
overall
dimensions,
and
cost,
making
12
them
unsuitable
for
compact
design
of
integrated
systems.
So,
the
past
decade
has
seen
a
13
dramatic
increase
in
interest
in
new
integrated
single-‐photon
detectors
called
Single-‐
14
Photon
Avalanche
Diodes
(SPAD)
or
Geiger-‐mode
APD.
SPAD
are
working
in
avalanche
15
mode
above
the
breakdown
level.
When
an
incident
photon
is
captured,
a
very
fast
16
avalanche
is
triggered,
generating
an
easily
detectable
current
pulse.
17
This
paper
discusses
SPAD
detectors
fabricated
in
a
standard
CMOS
technology
18
featuring
both
single-‐photon
sensitivity,
and
excellent
timing
resolution,
while
19
guaranteeing
a
high
integration.
In
this
work,
we
investigate
the
design
of
SPAD
20
detectors
using
the
AMS
0.35µm
CMOS
Opto
technology.
Indeed,
such
standard
CMOS
21
technology
allows
producing
large
surface
(few
mm2)
of
single
photon
sensitive
22
detectors.
Moreover,
SPAD
in
CMOS
technologies
could
be
associated
to
electronic
23
readout
such
as
active
quenching,
digital
to
analog
converter,
memories
and
any
specific
24
processing
required
to
build
efficient
calorimeters1
(Silicon
PhotoMultiplier
-‐
SiPM)
or
25
high
resolution
imagers
(SPAD
imager).
The
present
work
investigates
SPAD
geometry.
26
MOS
transistor
has
been
used
instead
of
resistor
to
adjust
the
quenching
resistance
and
27
find
optimum
value.
From
this
first
set
of
results,
a
detailed
study
of
the
Dark
Count
Rate
1
SiPM
is
often
used
to
measure
the
number
of
photons,
proportional
to
the
particle
energy,
which
interacts
with
a
scintillator.
At
the
opposite,
an
imager
gives
both
the
number
of
hit
pixels
and
there
position.
So,
in
particle
physics,
calorimetry
corresponds
to
the
energy
measurement
of
particles
even
if
any
temperature
measurement
is
done.
28
(DCR)
has
been
conducted.
Our
results
show
a
dark
count
rate
increase
with
the
size
of
29
the
photodiodes
and
the
temperature
(at
T=22.5°C,
the
DCR
of
a
10
µm-‐photodiode
is
30
2020
count.s-‐1
while
it
is
270
count.s-‐1
at
T=-‐40°C
for
a
overvoltage
of
800
mV).
A
small
31
pixel
size
is
desirable,
because
the
DCR
per
unit
area
decreases
with
the
pixel
size.
We
32
also
found
that
the
adjustment
of
overvoltage
is
very
sensitive
and
depends
on
the
33
temperature.
The
temperature
will
be
adjusted
for
the
subsequent
experiments.
34
35
36
1
37
A
Single-‐Photon
Avalanche
Diode
(SPAD)
is
a
semiconductor
photon
sensor
operated
in
38
Geiger-‐mode
where
bias
voltage
is
above
the
diode
breakdown
voltage
(typical
Vbr=10
39
to
100
V)
and
associated
to
a
quenching
circuit
[Ref
1].
A
Silicon
PhotoMultiplier
(SiPM)
40
is
composed
of
hundreds
of
SPAD
(about
10x10µm2
up
to
100x100
µm2)
realised
on
the
41
same
substrate
and
interconnected
together
to
sum
the
photo-‐current
coming
from
each
42
of
them.
The
typical
density
of
SPAD
is
100-‐10000
per
mm2.
The
first
development
43
started
about
10
years
ago
in
Russia
[Ref
2].
Hamamatsu
Photonics
produces
44
commercially
SiPM-‐based
circuits
named
Multi-‐Pixel
Photon
Counter
(MPPC)
since
45
2008.
Currently,
several
technologies
have
also
been
developed
by
other
companies
46
such
as
Sensl,
or
Ketek.
Micro-‐electronic
CMOS
technologies
can
also
be
used
to
develop
47
specific
SPAD
and
SiPM
sensors
with
good
performance
[Ref
3][Ref
4].
We
introduce
in
48
this
paper
our
development
of
SPAD
arrays
using
the
CMOS-‐Opto
“C35B4O1"
technology
49
proposed
by
CMP
(Circuit
Multi-‐Projects)
in
Grenoble
and
manufactured
by
AMS.
This
50
microelectronic
technology
has
been
chosen
to
design
large
arrays
of
high-‐resolution
51
SPAD
imagers
for
optical
ultra
low
flux
applications
(for
example,
medical
application
52
[Ref
9]
or
high-‐energy
astrophysics
[Ref
8]).
CMOS
technologies
allow
integrating
into
53
the
same
substrate
the
SPADs
and
their
specific
readout
electronic.
In
this
paper,
we
54
present
both
the
investigations
on
the
SPAD
design
and
resulting
performance
of
the
55
fabricated
chips.
56
57
Introduction
58
2
The
Technology
"CMOS-‐Opto
C35B4O1",
and
breakdown
voltage
simulation
59
60
a) Characteristics
of
the
AMS
technology
61
The
"AMS
CMOS-‐Opto
C35B4O1"
process
is
made
with
a
P
epi-‐layer
(thickness
≈14
µm)
62
on a P type substrate. This
0.35µm
CMOS-‐Opto
process
offers
4
metallization
layers
and
2
63
polysilicon
layers.
Figure
1
shows
the
cross-‐section.
64
AMS
gives
the
value
of
45
pA/cm2
for
the
Dark
current.
P-‐epi
wafers
allow
lower
current
65
leakage
in
the
diode,
then
a
lower
dark
current
for
a
better
sensitivity.
This
current
is
66
very
low,
which
is
ideal
for
the
Geiger
mode.
67
AMS
gives
the
saturation
current
for
PMOS:
240
μA/μm
for
L=0.35
µm
and
W=0.4
µm
68
where
L
is
the
PMOS
channel
length
and
W
the
channel
width.
Depending
on
the
69
electrical
simulations
of
the
transistor,
we
selected
W=6
µm
and
L=0,7
µm.
The
aim
is
to
70
have
a
resistive
mode
for
Vds
=
0
to
1
V
(Vds
is
the
drain-‐source
voltage
of
the
PMOS).
The
71
resistive
mode
range
is
from
10
kΩ
to
100
kΩ
depending
on
Vgs
adjustment
(Vgs
is
the
72
gate-‐source
voltage
of
the
PMOS).
73
This
technology
is
normally
sensitive
in
the
range
400-‐1000
nm
[Ref
5]
with
optimal
74
responsivity
of
290
mA/W
for
a
550
nm
wavelength
and
330
mA/W
for
850
nm.
75
b) The
SIMS
results
76
The
first
step
was
to
study
the
different
layers.
There
are
2
n_type
layers,
and
2
p_type
77
layers
of
different
doping
levels
to
modify
the
field
distribution
across
the
structure.
78
Figure
2
shows
the
summary
table
of
SIMS
results
(Secondary
ion
mass
spectrometry).
79
These
doping
values
have
been
found
by
SIMS,
after
components
manufacturing.
80
c) Silvaco
simulation:
results
81
We
use
the
doping
profiles
obtained
by
SIMS
to
determine
the
breakdown
voltages.
We
82
expose
here
the
simulation
results
with
these
profiles
obtained.
The
Figure
3
presents
a
83
first
simulation
of
the
structure
with
the
4
zones
and
the
doping
correctly
adjusted.
The
84
software
"Silvaco"
was
used
for
these
simulations.
The
result
of
these
simulations
at
85
22.5°C
(Figure
4)
gives
us
a
breakdown
voltage
of
11.7
V
and
a
guard ring of 40 V. At this
86
point of our work, we can say that this technology is well suited to Geiger Mode.
87
88
89
3
Experimental
results:
Breakdown
voltage
90
We
present
here
the
experimental
results
obtained
for
several
isolated
photodiodes
of
91
different
diameters.
The
diameter
of
the
photodiodes
is
between
D=200
µm
and
D=2.7
92
µm.
The
size
of
the
guard
ring
is
1.7
µm.
The
structural
dimension
is
shown
in
Figure
5.
93
The
breakdown
voltage
values
have
been
determined
from
the
reverse
current–voltage
94
(I–V)
characteristics,
using
a
Keithley
2636A.
A
breakdown
voltage
of
11.7
V
was
95
measured
at
22.5°C
for
photodiodes
with
a
diameter
greater
than
or
equals
to
10
µm.
96
For
photodiodes
with
a
diameter
lower
than
10
µm
diameter,
we
measured
a
higher
97
breakdown
voltage
(near
of
guard
ring
40
V)
(Figure
6).
Measurements
have
been
98
repeated
on
a
significant
number
of
devices,
showing
a
very
good
uniformity
of
the
99
breakdown
voltage
values
and
confirming
the
reliability
of
the
technology
used
for
the
100
Geiger
mode.
We
measured
on
Figure
7
the
temperature
sensitivity
for
breakdown
101
voltage:
9
mV.°C-‐1.
It
is
found
that
the
temperature
has
a
strong
influence
on
breakdown
102
voltage
and
therefore
on
the
overvoltage.
103
104
105
4
106
This
is
a
first
positive
result
concerning
the
dark
count
rate
(DCR)
using
only
one
107
isolated
photodiode.
The
behaviour
of
the
quenching
system
is
correct.
At
22.5°C
the
108
dark
count
rate,
for
a
photodiode
of
D=10
µm
diameter,
and
an
800
mV
overvoltage,
is
109
2020
count.s-‐1
(Figure
8).
At
-‐40°C,
the
dark
count
rate,
for
a
photodiode
of
D=10
µm
110
diameter,
and
an
800
mV
overvoltage,
is
270
count.s-‐1
(Figure
9).
These
two
results
are
111
presented
in
Figure
10.
The
Figure
12,
summarises
all
these
results.
With
a
diameter
112
lower
than
10
µm,
the
DCR
does
not
decrease
anymore
which
confirms
that
the
smallest
113
diameter
for
this
technology
is
about
D=10
µm.
The
experimental
set-‐up
is
presented
in
114
Figure
11.
The
Geiger
pulses
were
measured
with
a
universal
counter
"Hameg
HM
8021-‐
115
4"
to
the
terminal
of
a
resistor
(100
Ω).
116
117
118
Experimental
results:
Dark
count
rate
119
5
120
We
introduced
in
the
present
document
an
investigation
of
the
technology
"CMOS-‐Opto
121
C35B4O1"
proposed
by
CMP
(Circuit
Multi-‐Projects)
in
Grenoble
and
manufactured
by
122
AMS for the
Geiger
mode.
The
main
part
of
our
work
deals
with
the
characteristics
in
the
123
dark
and
allows
us
to
find
the
size
of
the
photodiode
with
the
smallest
DCR/um2:
10µm.
124
These
values
are
comparable
to
those
reported
in
literature
for
CMOS
SPADs
built
in
a
125
similar
technology
[Ref
6]
[Ref
7].
The
first
results
that
we
have
obtained
are
in
good
126
agreement
with
the
challenge
of
the
Geiger
mode.
Other
results
will
be
reported
in
a
127
forthcoming
paper.
128
6
129
130
Ref
1
:
S.
Cova,
M.
Ghioni,
A.
Lacaita,
C.
Samori,
and
F.
Zappa
(1996),
“Avalanche
photodiodes
and
quenching
131
132
Ref
2:
V.
Golovin
and
V.
Saveliev,
“Novel
type
of
avalanche
photodetector
with
Geiger
mode”,
NIMA
518
(2004)
133
134
Ref
3:
Vilà,
A.,
Arbat,
A.,
Vilella,
E.,
&
Dieguez,
A.
“Geiger-‐Mode
Avalanche
Photodiodes
in
Standard
CMOS
135
136
Ref
4:
Mandai,
S.,
Fishburn,
M.
W.,
Maruyama,
Y.,
&
Charbon,
E.
“A
wide
spectral
range
single-‐photon
avalanche
137
138
Ref
5:
K.
Jradi,
D.
Pellion,
D.
Ginhac,
“Design,
Characterization
and
Analysis
of
0.35µM
CMOS
Single
Photon
139
140
Ref
6:
S.
Tisa,
F.
Guerrieri,
F.
Zappa,
“Variable-‐load
quenching
circuit
for
single-‐photon
avalanche
diodes”
141
142
143
Ref
7:
E.
Vilella,
A.
Comerma,
O.
Alonso,
A.
Diéguez,
“Low-‐noise
pixel
detectors
based
on
gated
Geiger
mode
144
145
146
Ref
8:
F.
Lebrun;
R.
Terrier;
P.
Laurent;
D.
Prêle;
E.
Bréelle;
J.-‐P.
Baronick;
C.
Buy;
A.
Noury;
C.
Olivetto;
R.
147
148
Ref
9:
Taiga
Yamaya
et
al
«
A
SiPM-‐based
isotropic-‐3D
PET
detector
X'tal
cube
with
a
three-‐dimensional
array
149
150
Conclusion
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single-‐photon
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Vol.
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No.
12,
1956-‐1976
560-‐564
Technologies
“
diode
fabricated
in
an
advanced
180
nm
CMOS
technology”
Opt
Express,
20(6),
5849-‐5857.
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22773-‐22784;
doi:10.3390/s141222773
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»
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6793–6807.
doi:10.1088/0031-‐9155/56/21/003
151
152
Figure
1:
Cross-‐section
of
the
Photodiodes
design
(SPAD)
for
Geiger
mode
in
CMOS-‐Opto
C35B4O1
and
circuit.
153
154
155
156
Figure
2:
SIMS
Results.
157
158
159
+
-
Figure
3:
Cross-‐section,
simulation
"Silvaco"
of
the
structure: N /P junction and guard ring N layer.
160
161
162
163
164
165
Figure
4:
Breakdown
voltage
of
the
photodiode
(11.7V)
and
breakdown
voltage
of
the
guard
ring
(40V)
;
166
167
simulation
results
SILVACO
obtained
at
22.5°C
168
169
Figure
5:
Schematic
structure:
Size
of
guard
rings
and
size
of
photodiodes
170
171
172
173
174
Figure
6:
Breakdown
voltage
of
the
photodiodes;
experimental
results
obtained
at
25°C
175
176
177
178
179
Figure
7:
Breakdown
voltage
versus
temperature
for
different
size
180
181
182
183
Figure
8:
Dark
count
rate
versus
photodiode
voltage
at
22.5°C
184
185
Figure
9:
Dark
count
rate
versus
photodiode
voltage
at
-‐40°C
186
187
188
Figure
10:
Dark
count
rate
versus
Temperature
for
three
size
at
800mV
overvoltage
189
190
191
192
193
Figure
11:
Electrical
circuit used for dynamic characterizations, an exterior resistor (100 Ω for
194
read) has been used.
195
196
197
198
199
200
201
202
Figure
12:
Summary
table
of
our
design
203
204