... Viterbi algorithm (SOVA), a building block for turbo codes, and develops an architecture that completes those computations with reduced power consumption.

However, to counteract the exponential dependence of viterbi decoder complexity on memory order in low power designs, good power reduction methods are needed.

A low complexity algorithm based on a limited search algorithm, which reduces the average number of the add-compare-select computation of the Viterbi algorithm, ...

The new Viterbi decoder is designed and implemented in TSMC 0.18-µm CMOS process. Simulation results show that power consumption is reduced by up to 80% for ...

exponential dependence of Viterbi decoder complexity on memory order in low-power designs, good power reduction. Manuscript received January 23, 2002. This ...

Hierarchical problem abstraction, when ap- plicable, may offer exponential reductions in computational complexity. Previous work on coarse-to-fine dynamic ...

... reduce power consumption in Viterbi decoder by enhancing the ACS and PMU module. For ACS, the traditional method of Viterbi algorithm is to add the previous ...

Apr 23, 2012 · It will be shown that the high-throughput decoding architecture can achieve a much lower computational complexity compared to the Viterbi ...

Dec 3, 2007 · The Viterbi decoding algorithm [3], [4] is the most popular decoding scheme of convolutional codes. It finds the sequence of branch words ...

Mergers between STTC and complexity of the Viterbi algorithm will result in the STTC Viterbi decoding algorithm and will increase power consumption and reduced ...