Dave Welch

Within the “terahertz technology gap” (100 GHz - 30 THz) lies a vast reserve of bandwidth poised for development. “The carrier frequency of 300 GHz is 150 times larger than two gigahertz where the current cellular network is today,” explains Research Scientist James Greenberg, a program manager at IMRA. “So, take the number of devices we currently have and imagine multiplying that by a factor of 150. That's the biggest driver in going into a higher frequency.” However, the development of user-friendly technologies capable of generating, manipulating, and detecting radiation within these frequency bands is not only technically challenging but also hindered by the limitations of available THz-capable components. At Micro Harmonics, we are developing new components that enable scientists to design better and faster mm-wave and terahertz systems. Read more about how our #mmWave isolators allowed researchers at IMRA to have a significant breakthrough: https://lnkd.in/gtFm-Nk5 #mmWave #MicroHarmonics #rfengineering #IMRA

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Mivium's Game-Changing Gallium Nitride Tech Seeks to Outperform Silicon, Reducing Toxicity and Enhancing Efficiency for Data Centers and AI Applications http://s4g.biz/14nov24 tl;dr: Eric Tsai’s Mivium focuses on gallium nitride (GaN) to replace silicon, improving efficiency and sustainability. GaN's fast-switching properties make devices smaller, more powerful, and less energy-intensive. Mivium’s unique, clean GaN production process avoids the toxic materials typical in semiconductors. Nevada’s tech-friendly policies support Mivium’s plans to establish a new “gallium valley” in Reno. By crowdfunding, Eric brings everyday investors into Mivium’s journey, making early-stage investing accessible. https://lnkd.in/e2nunP4g #ImpactCrowdfunding #DiverseFounders #SocialEntrepreneurs #CommunityCapital #ImpactInvestors #RIC #InvestmentCrowdfunding #SuperCrowd #gallium

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This letter proposes a scalable channel estimation and reflection optimization framework for #reconfigurable #intelligent #surface (#RIS)-enhanced #orthogonal #frequency #division #multiplexing (#OFDM) systems. Specifically, the proposed scheme firstly generates a training set of RIS reflection coefficient vectors offline. For each RIS reflection coefficient vector in the training set, the proposed scheme estimates only the end-to-end composite channel and then performs the transmit power allocation. As a result, the RIS reflection optimization is simplified by searching for the optimal reflection coefficient vector maximizing the achievable rate from the pre-designed training set. The proposed scheme is capable of flexibly adjusting the training overhead according to the given channel coherence time, which is in sharp contrast to the conventional counterparts. Moreover, the authors discuss the computational complexity of the proposed scheme and analyze the theoretical scaling law of the achievable rate versus the number of training slots. ---- Jiancheng An, Qingqing Wu, Chau Yuen More details can be found at this link: https://lnkd.in/eK6dgdST

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Tackling Data Retention in SSDs (by Anil Burra from Intelligent Memory) 🤩 "SSDs have conquered the market due to their speed, durability, energy efficiency, and small form factor. However, write endurance and data retention are concerns in #embedded and #industrial applications, especially as the technology moves to ever smaller nodes." (Anil Burra) With the scaling of #NAND #flash #technology to higher densities (e.g., Triple-Level-Cell or Quad Level-Cell) and smaller process nodes, data retention becomes more challenging due to increased cell-to-cell interference and reduced margins for charge storage. Therefore, newer #technologies may have shorter specified data retention periods compared to older, more robust #SLC (Single-Level-Cell) or #MLC (Mul ti-Level-Cell) #NAND products. Two key factors affect data retention, the period over which #flashmemory can store #data without loss or corruption, in #NANDflash cells: program/erase (P/E) cycling and operating temperature. A very big thank you to Anil Burra from Intelligent Memory for this insightful article via Electronic Specifier Ltd with more background and insights via the link below 💡🙏👇 - A very good read to an important TOPIC 🤩 https://lnkd.in/eqdH7-N2 #semiconductorindustry #semiconductormanufacturing #innovation #it #ai #ssd #datastorage #automotiveindustry #embeddedsystems #ic #computer #computing #iot #memory #chip #chips #technology #tech

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Researchers from NVIDIA, CMU and the University of Washington Released ‘FlashInfer’: A Kernel Library that Provides State-of-the-Art Kernel Implementations for LLM Inference and Serving FlashInfer incorporates a block-sparse format to handle heterogeneous KV-cache storage efficiently and employs dynamic, load-balanced scheduling to optimize GPU usage. With integration into popular LLM serving frameworks like SGLang, vLLM, and MLC-Engine, FlashInfer offers a practical and adaptable approach to improving inference performance. FlashInfer's unique features include: ✅ Comprehensive Attention Kernels: covering prefill/decode/append attention for various KV-Cache formats (Page Table, Ragged Tensor, etc.) for both single-request and batch-serving scenarios. ✅ Optimized Shared-Prefix Batch Decoding: 31x faster than vLLM's Page Attention implementation for long prompt large batch decoding. ✅ Efficient Attention for Compressed KV-Cache: optimized grouped-query attention with Tensor Cores (3x faster than vLLM's GQA), fused-RoPE attention, and high-performance quantized attention...... Read the full article here: https://lnkd.in/g69DqsgM Paper: https://lnkd.in/g4KK_9x4 GitHub: https://lnkd.in/gY5MeJYC NVIDIA NVIDIA AI Machine Learning Department at CMU Zihao Ye Lequn Chen Ruihang Lai Wuwei Lin Yineng Zhang Stephanie Wang Tianqi Chen Baris Kasikci Vinod Grover Arvind Krishnamurthy Luis Ceze

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Tech Thought #1 Innovations Beyond HBM in Memory Technology Exciting advancements are on the horizon beyond HBM in memory technology. HBM3 is poised to elevate bandwidth and capacity for demanding applications, while Memory-Class Storage (MCS) merges memory and storage features for enhanced speed and capacity. Persistent Memory (PMEM) offers a blend of DRAM-like performance and storage durability, propelling innovation in data processing efficiency. Furthermore, breakthroughs in 3D integration, like 3D NAND and 3D DRAM, promise heightened storage density and performance. Neuromorphic memory, inspired by neural networks, and Quantum memory, harnessing quantum states, hold the potential to revolutionize speed and capacity in memory technology. Reconfigurable memory architectures are also set to adapt to diverse workloads, optimizing performance across various applications. These advancements collectively mark a significant leap forward in memory technology, paving the way for a future that goes beyond the capabilities of HBM. #MemoryArchitecture #3DMemories #HBM #SpintronicsAI

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The use of coherent transceiver technology helps edge networks span longer reaches with higher capacity, but it also comes with the trade-off of increased latency due to more signal processing from the DSP. What the different boundary conditions are and what it means for DSP building blocks is the topic of this weeks article. Enjoy the read. #dsp #latency #transceiver #photonics #ai #cluster #cloud #coherent #transceivers #effectphotonics

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#Memory Industry Revenue Expected to Reach Record High in 2025 Due to Increasing Average Prices and the Rise of #HBM and QLC, Says TrendForce Corporation 💡 TrendForce 集邦科技’s latest report on the memory industry reveals that #DRAM and #NAND #Flash revenues are expected to see significant increases of 75% and 77%, respectively, in 2024, driven by increased bit demand, an improved supply-demand structure, and the rise of high-value products like #HBM. Furthermore, industry revenues are projected to continue growing in 2025, with DRAM expected to increase by 51% and #NANDFlash by 29%, reaching record highs. This growth is anticipated to revive capital expenditures and boost demand for upstream raw materials, although it will also increase cost pressure for memory buyers. Thanks again to TrendForce Corporation for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eQufNZQg #semiconductorindustry #semiconductors #semiconductor #technology #tech #chip #chips #ai #aiot #consumerelectronics #datacenter #it #ic #chips #artificialintelligence #samsung #micron #skhynix #kioxia #nanya #westerndigital #winbond #japan #usa #southkorea #taiwan #china #it

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Sivers Semiconductors and #AyarLabs to expand their partnership on enabling high volume manufacturing of optical I/O solutions for scalable cost-effective AI infrastructure. Read the press release: https://lnkd.in/ds53PdUE #AI #Datacenters #Optical #laserarrays #AyarLabs #Semiconductors #OpticalIO

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Check out this blog and podcast from Allyson Klein at The_TechArena, featuring Letizia Giuliano, as they explore #AI innovations! They discuss #chiplets, high-speed interconnects, and how Alphawave Semi is redefining the industry to meet the demands of AI infrastructure. The future of AI is about smarter infrastructure, and with Alphawave’s commitment to innovation in connectivity and design standards, we are shaping the future of AI silicon. Curious about how new competitors are challenging established players like NVIDIA’s NVLink? Letizia shares her insights! Do not miss this engaging discussion—tune in to discover what is next for AI technology. https://lnkd.in/erSG29nB #AlphawaveSemi #ConnectivityIP #ConnectivitySolutions #Chiplets #AI #Connectivity #CustomSilicon #Silicon

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The combination of software-defined networking (SDN) and photonics is emerging as a potential solution for network optimization. This blend of technologies aims to offer dynamic traffic routing and resource allocation, responding to real-time network conditions and user demands. It's a development that could shape the future of telecom and datacom, introducing programmability, adaptability, and flexibility. Authored by iPronics Programmable Photonics: https://lnkd.in/dSkM3aP7 #Photonics

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Insightful conversation on Scaling Performance in AI Systems with Ed Sperling of Semiconductor Engineering and Andy Nightingale of Arteris. Check it out here: https://hubs.ly/Q02Y_6KN0 #semiconductor #innovation #SystemOnChip #NetworkOnChip #Arteris

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Huawei developing #SSD-tape hybrid amid #US #tech restrictions #Huawei’s in-house development of Magneto-Electric Disk (MED) archive storage #technology combines an #SSD with a Huawei-developed #tapedrive to provide warm (#nearline) and cold #data storage. MED technology was first revealed back in March. Blocks and Files were briefed by Huawei’s Michael FanJie, VP of Marketing for Huawei’s storage product line, who told them that, facing potential disk supply disruption due to US technology export restrictions, Huawei was working on its own warm and cold data storage device by combining an SSD, #tapecartridge, and drive in a single enclosure. Its storage portfolio could then run from fast (#SSD) for hot data and MED for warm and cold data, skipping disk drives entirely. A very big thank you again to Chris Mellor and Blocks and Files for the full article with more background and insights via the link below 🙏💡👇 https://lnkd.in/eJhPqkyj #semiconductorindustry #semiconductors #semiconductor #tech #it #ai #technology #chip #chips #geopolitics #china #datacenter #hdd

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Z-Wave Alliance Principal member Silicon Labs wrote a blog discussing #Matter vs #ZWave and it's important to share with the industry. The blog highlights key differentiators between the two #standards, as well as how they coexist and complement each other in the smart home industry. Learn more about these standards, use cases, the next generation of Z-Wave with #LongRange (which supports up to 4,000 nodes per network) and more. https://lnkd.in/e4rdeniY

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Join EdgeQ Inc. in an Invited Talk by IEEE and Santa Clara University Moderator: Alan J Weissberger Guest Speakers: Adil Kidwai (Head of Product Management, EdgeQ Inc.) Edward Wu (Head of Marketing, EdgeQ Inc.) Date:  30 May 2024 Time: 02:30 PM to 05:00 PM INSIDE A TELECOM CHIP START-UP AND ITS 4G+5G BASE STATION SOC This talk will focus on the foundation of all wireless infrastructure—the 4G+5G baseband System on a Chip (SoC). We will explore how a "soft modem" can adapt to evolving infrastructural demands across small cells and macro cells, address new application use cases, and respond to emerging megatrends such as 5G non-terrestrial networks. Additionally, we will discuss market fundamentals impacting 5G deployments and share personal insights into the founding and evolution of a 5G semiconductor startup in the era of AI. https://lnkd.in/gFjMPniF

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#HBM4 set to land sooner than expected 💡 Suppliers and JEDEC are bringing their HBM4 plans forward as they suspect the forecasted Gen #AI boom means incoming NVIDIA GPUs will need it sooner. High bandwidth memory (#HBM) bypasses #X86 socket-connected #DRAM capacity and bandwidth limits by having #memory dies stacked on top of a logic layer, with interconnecting TSV channels, all linked to a #GPU via an interposer component providing higher bandwidth than X86 sockets. The Joint Electron Device Engineering Council (JEDEC) confirms and issues HBM standards, with the current one being its fifth, HBM3E (extended). JEDEC has said it will issue a completed HBM4 spec by the end of this year – just few months ago the schedule was for a 2025 delivery. Preliminary HBM4 characteristics are emerging already. Thanks again to Chris Mellor and Blocks and Files for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eZp_wyHB #semiconductorindustry #semiconductors #semiconductor #technology #tech #innovation #semiconductormanufacturing #it #chip #chips #ic #it

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This paper proposes a #promising #transceiver #architecture relying on #stacked #intelligent #metasurfaces (#SIM). An SIM is constructed by stacking an array of programmable metasurface layers, where each layer consists of a massive number of #low-#cost #passive #meta-#atoms that individually manipulate the #electromagnetic (#EM) waves. By appropriately configuring the passive meta-atoms, an SIM is capable of accomplishing advanced computation and signal processing tasks, such as #multiple-#input #multiple-#output (#MIMO) precoding/combining, multi-user interference mitigation, and radar sensing, as the EM wave propagates through the multiple layers of the metasurface, which effectively reduces both the #RF-#related #energy #consumption and #processing #delay. Inspired by this, the authors provide an overview of the #SIM-#aided #MIMO #transceiver #design, which encompasses its hardware architecture and its potential benefits over state-of-the-art solutions. ----Jiancheng An, Chau Yuen, @Chao Xu, @Hongbin Li, @Derrick Wing Kwan Ng, @Marco Di Renzo, @Mérouane Debbah, @Lajos Hanzo More details can be found at this link: https://lnkd.in/gQcumtwn

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