Colour Television

Chassis

LC10.1L
LA

18850_000_100107.eps 100209

Contents
1. 2. 3. 4. 5. 6. 7. 8. 9.

Page

Contents
SSB: MPD SSB: Mini LVDS SSB: SRP List Explanation SSB: SRP List IR/LED Board Keyboard Control Board 11. Styling Sheets Styling Sheet Dali 32" - 40"

Page
(B08D) 61 (B08E) 62 65 66 (J) 68 (E) 69 71 63-64 63-64

Revision List 2 Technical Specifications and Connections 2 Precautions, Notes, and Abbreviation List 4 Mechanical Instructions 8 Service Modes, Error Codes, and Fault Finding 13 Alignments 19 Circuit Descriptions 21 IC Data Sheets 27 Block Diagrams Wiring Diagram 32" - 40" (Dali) 37 Block Diagram Video 38 Block Diagram Audio 39 Block Diagram Control & Clock Signals 40 Block Diagram I2C 41 Supply Lines Overview 42 10. Circuit Diagrams and PWB Layouts Diagram SSB: DC-DC (B01) 43 SSB: Tuner (B02A) 44 SSB: Digital Demodulator (B02B) 45 SSB: Class-D & Muting (B03) 46 SSB: MTK Power (B04A) 47 SSB: DDR (B04B) 48 SSB: Controller (B04C) 49 SSB: LVDS Display (B04D) 50 SSB: HDMI & Multiplexer (B05) 51 SSB: Analog I/O - Headphone (B06A) 52 SSB: Analog I/O - Audio (B06B) 53 SSB: Analog I/O - Video (B06C) 54 SSB: USB (B06D) 55 SSB: VGA (B06E) 56 SSB: Hospitality (B07) 57 SSB: TCON Control (B08A) 58 SSB: TCON DC/DC (B08B) 59 SSB: P Gamma, VCOM & NVM (B08C) 60

68 70

PWB 63-64 63-64 63-64 63-64 63-64 63-64 63-64 63-64 63-64 63-64 63-64 63-64 63-64 63-64 63-64 63-64 63-64 63-64

Copyright 2010 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

Published by JA/JY 1064 BU TV Consumer Care

Printed in the Netherlands

Subject to modification

EN 3122 785 18980 2010-Apr-06

EN 2

1.

LC10.1L LA

Revision List

1. Revision List
Manual xxxx xxx xxxx.0 First release.

2. Technical Specifications and Connections

Index of this chapter: 2.1 Technical Specifications 2.2 Directions for Use 2.3 Connections Notes: Figures can deviate due to the different set executions. Specifications are indicative (subject to change). Table 2-1 Described Model numbers CTN 40PFL3605D/78 Styling Published in: 3122 785 18980

32PFL3605D/78 Dali

2.2

Directions for Use

You can download this information from the following websites: http://www.philips.com/support http://www.p4c.philips.com

2.1

Technical Specifications
For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.

2.3

Connections

Back connector
3 4 5

Side connector
1

Bottom connector
6 7 8 9
10

18980_001_100330.eps 100402

Figure 2-1 Connection overview Note: The following connector colour abbreviations are used (according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow. 2.3.1 Side Connections 1 - USB2.0
1 2 3 4

10000_022_090121.eps 090121

Figure 2-2 USB (type A) 1 2 3 4 - +5V - Data (-) - Data (+) - Ground k jk jk H

Gnd

2 - HDMI: Digital Video/Audio - In (see HDMI 1)

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Technical Specifications and Connections

2.3.2 Back Connections 3 - CVI-1: Cinch: Video YPbPr - In, Audio - In Wh - Audio - L 0.5 VRMS / 10 k Rd - Audio - R 0.5 VRMS / 10 k Rd - Video Pr 0.7 VPP / 75 Bu - Video Pb 0.7 VPP / 75 Gn - Video Y 1 VPP / 75 4 - Service Connector (UART) 1 - Ground Gnd 2 - UART_TX Transmit 3 - UART_RX Receive 5 - AV IN: S-Video (Hosiden): Video Y/C - In 1 - Ground Y Gnd 2 - Ground C Gnd 3 - Video Y 1 VPP / 75 4 - Video C 0.3 VPP / 75 5 - AV IN: Cinch: Video CVBS - In, Audio - In Ye - Video CVBS 1 VPP / 75 ohm Wh - Audio L 0.5 VRMS / 10 kohm Rd - Audio R 0.5 VRMS / 10 kohm 2.3.3 Bottom Connections 6 - CVI-2: Cinch: Video YPbPr - In, Audio - In Wh - Audio - L 0.5 VRMS / 10 k Rd - Audio - R 0.5 VRMS / 10 k Rd - Video Pr 0.7 VPP / 75 Bu - Video Pb 0.7 VPP / 75 Gn - Video Y 1 VPP / 75 7 - Cinch: Digital Audio - Out Bk - Coaxial 0.4 - 0.6VPP / 75 ohm 8 - HDMI 1: Digital Video, Digital Audio - In
19 18 1 2

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2.

EN 3

9 - VGA: Video RGB - In

1 6 5 10 15

jq jq jq jq jq 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

11

10000_002_090121.eps 090127

Figure 2-4 VGA Connector - Video Red - Video Green - Video Blue - n.c. - Ground - Ground Red - Ground Green - Ground Blue - +5VDC - Ground Sync - n.c. - DDC_SDA - H-sync - V-sync - DDC_SCL 0.7 VPP / 75 0.7 VPP / 75 0.7 VPP / 75 Gnd Gnd Gnd Gnd +5 V Gnd DDC data 0-5V 0-5V DDC clock j j j H H H H j H j j j j

H k j

H H j j

jq jq jq

10 - Aerial - In - - F-type

Coax, 75

jq jq jq jq jq

kq

10000_017_090121.eps 090428

Figure 2-3 HDMI (type A) connector 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 - D2+ - Shield - D2- D1+ - Shield - D1- D0+ - Shield - D0- CLK+ - Shield - CLK- Easylink - n.c. - DDC_SCL - DDC_SDA - Ground - +5V - HPD - Ground Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Control channel/CEC DDC clock DDC data Gnd Hot Plug Detect Gnd j H j j H j j H j j H j jk j jk H j j H

9 - Mini Jack: Audio - In DVI/VGA Bk - Audio 0.5 VRMS / 10 k

jo

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Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List

Index of this chapter: 3.1 Safety Instructions 3.2 Warnings 3.3 Notes 3.4 Abbreviation List picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3). Where necessary, measure the waveforms and voltages with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

3.1

Safety Instructions
Safety regulations require the following during a repair: Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA). Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft! Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: Route the wire trees correctly and fix them with the mounted cable clamps. Check the insulation of the Mains/AC Power lead for external damage. Check the strain relief of the Mains/AC Power cord for proper function. Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the on position (keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 M and 12 M. 4. Switch off the set, and remove the wire between the two pins of the Mains/AC Power plug. Check the cabinet for defects, to prevent touching of any inner parts by the customer. 3.3.2

Schematic Notes All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 k). Resistor values with no multiplier may be indicated with either an E or an R (e.g. 220E or 220R indicates 220 ). All capacitor values are given in micro-farads ( = 10-6), nano-farads (n = 10-9), or pico-farads (p = 10-12). Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF). An asterisk (*) indicates component usage varies. Refer to the diversity tables for the correct values. The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3

Spare Parts For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4

BGA (Ball Grid Array) ICs Introduction For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com. Select Magazine, then go to Repair downloads. Here you will find Information on how to deal with BGA-ICs. BGA Temperature Profiles For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

3.2

Warnings
All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential. Be careful during measurements in the high voltage section. Never replace modules or other components while the unit is switched on. When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3.5

Lead-free Soldering Due to lead-free technology some rules have to be respected by the workshop during a repair: Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle. Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: To reach a solder-tip temperature of at least 400C. To stabilize the adjusted temperature at the solder-tip. To exchange solder-tips for different applications. Adjust your solder tool so that a temperature of around 360C - 380C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch off unused equipment or reduce heat. Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

3.3
3.3.1

Notes
General Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

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Precautions, Notes, and Abbreviation List

3.3.6 Alternative BOM identification It should be noted that on the European Service website, Alternative BOM is referred to as Design variant. The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number 1 (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a 2 (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number. Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.
MODEL : 32PF9968/10
MADE IN BELGIUM 220-240V ~ 50/60Hz 128W VHF+S+H+UHF

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3.

EN 5

3.4

Abbreviation List
0/6/12 SCART switch control signal on A/V board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page Analogue to Digital Converter Automatic Frequency Control: control signal used to tune to the correct frequency Automatic Gain Control: algorithm that controls the video input of the feature box Amplitude Modulation Asia Pacific Aspect Ratio: 4 by 3 or 16 by 9 Auto Screen Fit: algorithm that adapts aspect ratio to remove horizontal black bars without discarding video information Advanced Television Systems Committee, the digital TV standard in the USA See Auto TV A hardware and software control system that measures picture content, and adapts image parameters in a dynamic way External Audio Video Audio Video Controller Audio Video Input Processor Monochrome TV system. Sound carrier distance is 5.5 MHz Business Display Solutions (iTV) Board-Level Repair Broadcast Television Standard Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries Blue TeleteXT Centre channel (audio) Consumer Electronics Control bus: remote control bus on HDMI connections Constant Level: audio output to connect with an external amplifier Component Level Repair Computer aided rePair Connected Planet / Copy Protection Customer Service Mode Color Transient Improvement: manipulates steepness of chroma transients Composite Video Blanking and Synchronization Digital to Analogue Converter Dynamic Bass Enhancement: extra low frequency amplification Data Communication Module. Also referred to as System Card or Smartcard (for iTV). See E-DDC Monochrome TV system. Sound carrier distance is 6.5 MHz Dynamic Frame Insertion
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AARA

ACI

ADC AFC

AGC

AM AP AR ASF

ATSC

ATV Auto TV

PROD.NO: AG 1A0617 000001

BJ3.0E LA

AV AVC AVIP B/G BDS BLR BTSC

10000_024_090121.eps 100105

Figure 3-1 Serial number (example) 3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR) If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging! 3.3.8 Practical Service Precautions It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard. Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

B-TXT C CEC

CL CLR ComPair CP CSM CTI

CVBS DAC DBE DCM

DDC D/K DFI

EN 6
DFU DMR DMSD DNM DNR DRAM DRM DSP DST

3.

LC10.1L LA

Precautions, Notes, and Abbreviation List

SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz. Institutional TeleVision; TV sets for hotels, hospitals etc. Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences Latin America Liquid Crystal Display Light Emitting Diode Monochrome TV system. Sound carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I LG.Philips LCD (supplier) Loudspeaker Low Voltage Differential Signalling Mega bits per second Monochrome TV system. Sound carrier distance is 4.5 MHz Part of a set of international standards related to the presentation of multimedia information, standardised by the Multimedia and Hypermedia Experts Group. It is commonly used as a language to describe interactive television services Microprocessor without Interlocked Pipeline-Stages; A RISC-based microprocessor Matrix Output Processor Metal Oxide Silicon Field Effect Transistor, switching device Motion Pictures Experts Group Multi Platform InterFace MUTE Line Mainstream TV: TV-mode with Consumer TV features enabled (iTV) Not Connected Near Instantaneous Compounded Audio Multiplexing. This is a digital sound system, mainly used in Europe. Negative Temperature Coefficient, non-linear resistor National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air) Non-Volatile Memory: IC containing TV related data such as alignments Open Circuit On Screen Display Over the Air Download. Method of software upgrade via RF transmission. Upgrade software is broadcasted in TS with TV channels. On screen display Teletext and Control; also called Artistic (SAA5800) Project 50: communication protocol between TV and peripherals Phase Alternating Line. Color system mainly used in West Europe (color carrier= 4.433619 MHz) and South America (color carrier PAL M=

DTCP

DVB-C DVB-T DVD DVI(-d) E-DDC

EDID EEPROM EMI EPG EPLD EU EXT FDS FDW FLASH FM FPGA FTV Gb/s G-TXT H HD HDD HDCP

HDMI HP I I2 C I2 D I2 S IF IR IRQ ITU-656

Directions For Use: owner's manual Digital Media Reader: card reader Digital Multi Standard Decoding Digital Natural Motion Digital Noise Reduction: noise reduction feature of the set Dynamic RAM Digital Rights Management Digital Signal Processing Dealer Service Tool: special remote control designed for service technicians Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394 Digital Video Broadcast - Cable Digital Video Broadcast - Terrestrial Digital Versatile Disc Digital Visual Interface (d= digital only) Enhanced Display Data Channel (VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display. Extended Display Identification Data (VESA standard) Electrically Erasable and Programmable Read Only Memory Electro Magnetic Interference Electronic Program Guide Erasable Programmable Logic Device Europe EXTernal (source), entering the set by SCART or by cinches (jacks) Full Dual Screen (same as FDW) Full Dual Window (same as FDS) FLASH memory Field Memory or Frequency Modulation Field-Programmable Gate Array Flat TeleVision Giga bits per second Green TeleteXT H_sync to the module High Definition Hard Disk Drive High-bandwidth Digital Content Protection: A key encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a snow vision mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP software key decoding. High Definition Multimedia Interface HeadPhone Monochrome TV system. Sound carrier distance is 6.0 MHz Inter IC bus Inter IC Data bus Inter IC Sound bus Intermediate Frequency Infra Red Interrupt Request The ITU Radio communication Sector (ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a.

ITV LS

LATAM LCD LED L/L'

LPL LS LVDS Mbps M/N MHEG

MIPS

MOP MOSFET MPEG MPIF MUTE MTV NC NICAM

NTC NTSC

NVM O/C OSD OAD

OTC P50 PAL

2010-Apr-06

Precautions, Notes, and Abbreviation List

3.575612 MHz and PAL N= 3.582056 MHz) Printed Circuit Board (same as PWB) Pulse Code Modulation Plasma Display Panel Power Factor Corrector (or Preconditioner) Picture In Picture Phase Locked Loop. Used for e.g. FST tuning systems. The customer can give directly the desired frequency Point Of Deployment: a removable CAM module, implementing the CA system for a host (e.g. a TV-set) Power On Reset, signal to reset the uP Power Supply for Direct view LED backlight with 2D-dimming Power Supply with integrated LED drivers Power Supply with integrated LED drivers with added Scanning functionality Positive Temperature Coefficient, non-linear resistor Printed Wiring Board (same as PCB) Pulse Width Modulation Quasi Resonant Converter Quality Temporal Noise Reduction Quality Video Composition Processor Random Access Memory Red, Green, and Blue. The primary color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced. Remote Control Signal protocol from the remote control receiver RESET signal Read Only Memory Reduced Swing Differential Signalling data interface Red TeleteXT Service Alignment Mode Short Circuit Syndicat des Constructeurs d'Appareils Radiorcepteurs et Tlviseurs Serial Clock I2C CLock Signal on Fast I2C bus Standard Definition Serial Data I2C DAta Signal on Fast I2C bus Serial Digital Interface, see ITU-656 Synchronous DRAM SEequence Couleur Avec Mmoire. Color system mainly used in France and East Europe. Color carriers= 4.406250 MHz and 4.250000 MHz Sound Intermediate Frequency Switched Mode Power Supply System on Chip Sync On Green Self Oscillating Power Supply Serial Peripheral Interface bus; a 4wire synchronous serial data link standard Sony Philips Digital InterFace Static RAM Service Reference Protocol Small Signal Board Spread Spectrum Clocking, used to reduce the effects of EMI Set Top Box STand-BY 800 600 (4:3) SVHS SW SWAN SXGA TFT THD TMDS TS TXT TXT-DW UI uP UXGA V VESA VGA VL VSB WYSIWYR

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3.

EN 7

PCB PCM PDP PFC PIP PLL

POD

POR PSDL PSL PSLS

PTC PWB PWM QRC QTNR QVCP RAM RGB

WXGA XTAL XGA Y Y/C YPbPr

RC RC5 / RC6 RESET ROM RSDS R-TXT SAM S/C SCART

YUV

Super Video Home System Software Spatial temporal Weighted Averaging Noise reduction 1280 1024 Thin Film Transistor Total Harmonic Distortion Transmission Minimized Differential Signalling Transport Stream TeleteXT Dual Window with TeleteXT User Interface Microprocessor 1600 1200 (4:3) V-sync to the module Video Electronics Standards Association 640 480 (4:3) Variable Level out: processed audio output toward external amplifier Vestigial Side Band; modulation method What You See Is What You Record: record selection that follows main picture and sound 1280 768 (15:9) Quartz crystal 1024 768 (4:3) Luminance signal Luminance (Y) and Chrominance (C) signal Component video. Luminance and scaled color difference signals (B-Y and R-Y) Component video

SCL SCL-F SD SDA SDA-F SDI SDRAM SECAM

SIF SMPS SoC SOG SOPS SPI

S/PDIF SRAM SRP SSB SSC STB STBY SVGA

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EN 8

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Mechanical Instructions

4. Mechanical Instructions
Index of this chapter: 4.1 Cable Dressing 4.2 Service Positions 4.3 Assy/Panel Removal 4.4 Set Re-assembly Notes: Figures below can deviate slightly from the actual situation, due to the different set executions.

4.1

Cable Dressing

18980_101_100331.eps 100331

Figure 4-1 Cable dressing 32"

18970_108_100323.eps 100331

Figure 4-2 Adding felt on front cabinet 32"

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Mechanical Instructions

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4.

EN 9

18980_103_100331.eps 100331

Figure 4-3 Cable dressing 40"

Add 2 felts on Front Cabinet

40PFL3605D/78 & 40PFL3805D/78

FELT (145 x 7 x 0.9)

RIB
END OF RIB

FELT (145 x 7 x 0.9)

END OF RIB
18980_104_100331.eps 100401

Figure 4-4 Adding felt on front cabinet 40"

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EN 10 4.2

4.

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Mechanical Instructions

Service Positions
For easy servicing of a TV set, the set should be put face down on a soft flat surface, foam buffers or other specific workshop tools. Ensure that a stable situation is created to perform measurements and alignments. When using foam bars take care that these always support the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! Ensure that ESD safe measures are taken.

4.3

Assy/Panel Removal
Instructions below apply to the 32PFL3605D/xx, but will be similar for other models.

4.3.1

Rear Cover Warning: Disconnect the mains power cord before you remove the rear cover. Note: it is not necessary to remove the stand while removing the rear cover. 1. Remove all screws of the rear cover. 2. Lift the rear cover from the TV. Make sure that wires and flat coils are not damaged while lifting the rear cover from the set.

4.3.2

Rear Cover

2 2 2

2 2 1 1 2 2 2 2

2 2

1 1

18980_105_100331.eps 100331

Figure 4-5 Rear cover removal (32") Warning: Disconnect the mains power cord before removing the rear cover. See Figure 4-5. 1. Remove fixation screws [2] and [3] that secure the rear cover. It is not necessary to remove the stand first [1]. 2. Lift the rear cover from the TV. Make sure that wires and flat foils are not damaged while lifting the rear cover from the set. 4.3.3 Speakers Tweeters (when applicable) Each tweeter unit is mounted with one screw. When defective, replace the whole unit. Loudspeaker/subwoofer The loudspeaker/subwoofer is located in the centre of the set, and is fixed with two screws. When defective, replace the whole unit.

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Mechanical Instructions
4.3.4 Main Power Supply Refer to next figure for details.

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EN 11

1 2 3 2

18980_102_100331.eps 100401

Figure 4-8 Keyboard Control Board - 1 18980_106_100331.eps 100331

Figure 4-6 Main Power Supply 1. Unplug all connectors [1]. 2. Remove the fixation screws [2]. 3. Take the board out. When defective, replace the whole unit. Be aware to (re)place the spacers [3]. 4.3.5 Small Signal Board (SSB) Refer to next figure for details.

2
18980_109_100331.eps 100331

3 3 1
4.3.7

Figure 4-9 Keyboard Control Board - 2 IR/LED Board Refer to next figure for details.

2 3

3 3

18980_107_100331.eps 100331

Figure 4-7 SSB 1. Unplug all connectors [1] and [2]. 2. Remove the fixation screws [3]. 3. Take the board out. When defective, replace the whole unit. 4.3.6 Local Control Board Refer to next figure for details. 1. Unplug the connector [1] on the IR/LED board that leads to the Local Control board, as it is not unplug-able at the Local Control board itself (soldered connector). 2. Release the cable from its clamps/tape. 3. Put your thumbs against the front bezel [1] while pulling the Local Control board in the direction of the arrow (fig. 2). When defective, replace the whole unit.

1 2

18980_108_100331.eps 100331

Figure 4-10 IR/LED Board 1. Push both clips [1] that secure the IR & LED board outwards. 2. Pull the board out. 3. Remove the connectors [2] on the IR/LED board. When defective, replace the whole unit.

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EN 12
4.3.8

4.

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Mechanical Instructions

LCD Panel Refer to Figure 4-11 for details. 1. Remove the Stand [A]. 2. Remove the Speakers/Subwoofer [B] as described earlier. 3. Remove the PSU [C] and SSB [D] as described earlier. 4. Remove the IR/LED board [E] as described earlier. 5. Remove the Local Control board [F] as described earlier. 6. Remove the clamps [1]. 7. Remove all metal brackets [2] that do not belong to the LCD display. Now the LCD Panel can be lifted from the front cabinet.

B
1 1

C F
2

18980_110_100331.eps 100331

Figure 4-11 LCD Panel removal (based on 32" model)

4.4

Set Re-assembly
To re-assemble the whole set, execute all processes in reverse order.

Notes: While re-assembling, make sure that all cables are placed and connected in their original position. Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.

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Service Modes, Error Codes, and Fault Finding

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EN 13

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter: 5.1 Test Points 5.2 Service Modes 5.3 Service Tools 5.4 Error Codes 5.5 The Blinking LED Procedure 5.6 Fault Finding and Repair Tips 5.7 Software Upgrading 5.2.1 General Next items are applicable to all Service Modes or are general. Life Timer During the life time cycle of the TV set, a timer is kept (called Op. Hour). It counts the normal operation hours (not the Stand-by hours). The actual value of the timer is displayed in SDM and SAM in a decimal value. Every two soft-resets increase the hour by +1. Stand-by hours are not counted. Software Identification, Version, and Cluster The software ID, version, and cluster will be shown in the main menu display of SDM, SAM, and CSM. The screen will show: AAAAAB-XX.YY, where: AAAAA is the chassis name: LC101. B is the region indication: E= Europe, A= AP/China, U= NAFTA, L= LATAM. XX is the main version number: this is updated with a major change of specification (incompatible with the previous software version). Numbering will go from 01 - 99 and AA ZZ. If the main version number changes, the new version number is written in the NVM. If the main version number changes, the default settings are loaded. YY is the sub version number: this is updated with a minor change (backwards compatible with the previous versions) Numbering will go from 00 - 99. If the sub version number changes, the new version number is written in the NVM. If the NVM is fresh, the software identification, version, and cluster will be written to NVM. Display Option Code Selection When after an SSB or display exchange, the display option code is not set properly, it will result in a TV with no display. Therefore, it is required to set this display option code after such a repair. To do so, press the following key sequence on a standard RC transmitter: 062598 directly followed by MENU/HOME and xxx, where xxx is a 3 digit decimal value of the panel type: see column Display Code in Table 6-4 , or see sticker on the side/bottom of the cabinet. When the value is accepted and stored in NVM, the set will switch to Stand-by, to indicate that the process has been completed.

5.1

Test Points
In the chassis schematics and layout overviews, the test points are mentioned. In the schematics and layouts, test points are indicated with Fxxx or Ixxx. As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. Several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective. Perform measurements under the following conditions: Service Default Mode. Video: Colour bar signal. Audio: 3 kHz left, 1 kHz right.

5.2

Service Modes
The Service Mode feature is split into four parts: Service Default Mode (SDM). Service Alignment Mode (SAM). Customer Service Mode (CSM). Computer Aided Repair Mode (ComPair). SDM and SAM offer features, which can be used by the Service engineer to repair/align a TV set. Some features are: A pre-defined situation to ensure measurements can be made under uniform conditions (SDM). Activates the blinking LED procedure for error identification when no picture is available (SDM). The possibility to overrule software protections when SDM is entered via the Service pins. Make alignments (e.g. White Tone), (de)select options, enter options codes, reset the error buffer (SAM). Display information (SDM or SAM indication in upper right corner of screen, error buffer, software version, operating hours, options and option codes, sub menus). The CSM is a Service Mode that can be enabled by the consumer. The CSM displays diagnosis information, which the customer can forward to the dealer or call centre. In CSM mode, CSM, is displayed in the top right corner of the screen. The information provided in CSM and the purpose of CSM is to: Increase the home repair hit rate. Decrease the number of nuisance calls. Solved customers' problem without home visit. ComPair Mode is used for communication between a computer and a TV on I2C /UART level and can be used by a Service engineer to quickly diagnose the TV set by reading out error codes, read and write in NVMs, communicate with ICs and the uP (PWM, registers, etc.), and by making use of a fault finding database. It will also be possible to up and download the software of the TV set via I2C with help of ComPair. To do this, ComPair has to be connected to the TV set via the ComPair connector, which will be accessible through the rear of the set (without removing the rear cover).

Display Option Code

39mm

PHILIPS
27mm

040

MODEL: 32PF9968/10
PROD.SERIAL NO: AG 1A0620 000001

(CTN Sticker)

10000_038_090121.eps 090819

Figure 5-1 Location of Display Option Code sticker During this algorithm, the NVM-content must be filtered, because several items in the NVM are TV-related and not SSBrelated (e.g. Model and Prod. S/N). Therefore, Model and Prod. S/N data is changed into See Type Plate. In case a call centre or consumer reads See Type Plate in CSM mode, he needs to look to the side/bottom sticker to identify the set, for further actions.
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5.2.2

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Service Modes, Error Codes, and Fault Finding

How to Navigate As this mode is read only, there is not much to navigate. To switch to other modes, use one of the following methods: Command MENU from the user remote will enter the normal user menu (brightness, contrast, color, etc...) with SDM OSD remaining, and pressing MENU key again will return to the last status of SDM again. To prevent the OSD from interfering with measurements in SDM, command OSD or i+ (STATUS or INFO for NAFTA and LATAM) from the user remote will toggle the OSD on/off with SDM OSD remaining always on. Press the following key sequence on the remote control transmitter: 062596 directly followed by the INFO[i+] button to switch to SAM (do not allow the display to time out between entries while keying the sequence). How to Exit Switch the set to Stand-by by pressing the mains button on the remote control transmitter or on the television set. If you switch the television set off by removing the mains (i.e., unplugging the television), the television set will remain in SDM when mains is re-applied, and the error buffer is not cleared. The error buffer will only be cleared when the clear command is used in the SAM menu. Note: If the TV is switched off by a power interrupt while in SDM, the TV will show up in the last status of SDM menu as soon as the power is supplied again. The error buffer will not be cleared. In case the set is accidentally in Factory mode (with an F displayed on the screen), pressing and holding VOL- and CH- simultaneously should exit the Factory mode. 5.2.3 Service Alignment Mode (SAM) Purpose To change option settings. To display / clear the error code buffer. To perform alignments. Specifications Operation hours counter (maximum five digits displayed). Software version, error codes, and option settings display. Error buffer clearing. Option settings. Software alignments (White Tone). NVM Editor. Set screen mode to full screen (all content is visible). How to Activate To activate SAM, use one of the following methods: Press the following key sequence on the remote control transmitter: 062596 directly followed by the INFO[i+] button. Do not allow the display to time out between entries while keying the sequence. Or via ComPair. After entering SAM, the following items are displayed, with SAM in the upper right corner of the screen to indicate that the television is in Service Alignment Mode. Menu items and explanation: 1. System Information. Op Hour: This represents the life timer. The timer counts normal operation hours, but does not count Stand-by hours. MAIN SW ID: See paragraph Software Identification, Version, and Cluster for the SW name definition. ERR: Shows all errors detected since the last time the buffer was erased. Five errors possible. OP1/OP2: Used to read-out the option bytes. See paragraph 6.6 Option Settings in the Alignments

Service Default Mode (SDM) Purpose Set the TV in SDM mode in order to be able to create a predefined setting for measurements to be made. In this platform, a simplified SDM is introduced (without protection override and without tuning to a predefined frequency). Specifications Set linear video and audio settings to 50%, but volume to 25%. Stored user settings are not affected. All service-unfriendly modes (if present) are disabled, since they interfere with diagnosing/repairing a set. These service unfriendly modes are: (Sleep) timer. Blue mute/Wall paper. Auto switch off (when there is no ident signal). Hotel or hospital mode. Child lock or parental lock (manual or via V-chip). Skipping, blanking of Not favourite, Skipped or Locked presets/channels. Automatic storing of Personal Preset or Last Status settings. Automatic user menu time-out (menu switches back/ OFF automatically. Auto Volume levelling (AVL). How to Activate To activate SDM, use one of the following methods: Press the following key sequence on the RC transmitter: 062596 directly followed by the MENU button. Short one of the Service pads on the TV board during cold start (see Figure 5-2). Then press the mains button (remove the short after start-up). Caution: When doing this, the service-technician must know exactly what he is doing, as it could damage the television set.

SDM

18980_200_100331.eps 100402

Figure 5-2 Service pads (SSB component side) On Screen Menu After activating SDM, the following items are displayed, with SDM in the upper right corner of the screen to indicate that the television is in Service Default Mode. Menu items and explanation: xxxxx: Operating hours (in decimal). AAAAAB-XX.YY: See paragraph Software Identification, Version, and Cluster for the SW name definition. ERR: Shows all errors detected since the last time the buffer was erased in format <xxx> <xxx> <xxx> <xxx> <xxx> (five errors possible). OP: Used to read-out the option bytes. Ten codes (in two rows) are possible.

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Service Modes, Error Codes, and Fault Finding

section for a detailed description. Ten codes are possible. Tuner. AGC Adjustment: See paragraph 6.3.1 for instructions. Store: To store the data. Clear. Erases the contents of the error buffer. Select this menu item and press the MENU RIGHT key on the remote control. The content of the error buffer is cleared. Options. To set the option bits. See paragraph 6.6 Option Settings in the Alignments chapter for a detailed description. RGB Align. To align the White Tone. See White Tone Alignment: for a detailed description. NVM Editor. To change the NVM data in the television set. See also paragraph 5.6 Fault Finding and Repair Tips. NVM Copy. Gives the possibility to copy/load the NVM file to/from an USB stick. See also paragraph 5.7.4 How to Copy NVM Data to/from USB and 5.7.5 How to Copy EDID Data to/from USB. Initialise NVM. To initialize a (corrupted) NVM. Be careful, this will erase all settings! Auto ADC. Refer to chapter 6. Alignments for detailed information. EDID Write Enable. Enables EDID writing.

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2.

identify the status of the set. This helps them to diagnose problems and failures in the TV before making a service call. The CSM is a read-only mode; therefore, modifications are not possible in this mode. Specifications Ignore Service unfriendly modes. Line number for every line (to make CSM language independent). Set the screen mode to full screen (all contents on screen is visible). After leaving the Customer Service Mode, the original settings are restored. Possibility to use CH+ or CH- for channel surfing, or enter the specific channel number on the RC. How to Activate To activate CSM, press the following key sequence on a standard remote control transmitter: 123654 (do not allow the display to time out between entries while keying the sequence). After entering the Customer Service Mode, the following items are displayed: Menu Explanation CSM1 1. Set Type. Type number, e.g. 32PFL5605/93. (*) 2. Production code. Product serial no., e.g. BZ1A1008123456 (*). BZ= Production centre, 1= BOM code, A= Service version change code, 10= Production year, 08= Production week, 123456= Serial number. 3. Installation date. Indicates the date of the first initialization of the TV. This date is acquired via time extraction. 4. a - Option Code 1. Option code information (group 1). b - Option Code 2. Option code information (group 2). 5. SSB. Indication of the SSB factory ID (= 12nc). (*) 6. Display. Indication of the display ID (=12 nc). (*) 7. PSU. Indication of the PSU factory ID (= 12nc). (*) If an NVM IC is replaced or initialized, these items must be re-written to it. ComPair will foresee in a possibility to do this. Menu Explanation CSM2 1. Current Main SW. Shows the main software version. 2. Standby SW. Shows the Stand-by software version. 3. Panel Code. Shows the current display code. 4. Bootloader ID. Shows the Bootloader software ID. 5. NVM Version. The NVM software version no. 6. Flash ID. Shows the flash ID. Menu Explanation CSM3 1. Signal Quality. Shows the signal quality (No Signal/Poor/ Average/Good). 2. Child lock. This is a combined item for locks. If any lock (Preset lock, child lock, lock after, or Parental lock) is active, this item indicates active. 3. HDCP KeyS. Indicates if the HDMI keys (or HDCP keys) are valid or not. 4. not used 5. not used 6. HDMI audio format input stream. Specification of HDMI audio input stream. 7. HDMI video format input stream. Specification of HDMI video input stream. How to Exit To exit CSM, use one of the following methods: Press the MENU/HOME button on the remote control transmitter. Press the POWER button on the remote control transmitter. Press the POWER button on the television set.

3.

4.

5. 6. 7.

8. 9. 10.

How to Navigate In the SAM menu, select menu items with the UP/DOWN keys on the remote control transmitter. The selected item will be indicated. When not all menu items fit on the screen, use the UP/DOWN keys to display the next / previous menu items. With the LEFT/RIGHT keys, it is possible to: Activate the selected menu item. Change the value of the selected menu item. Activate the selected sub menu. When you press the MENU button twice while in top level SAM, the set will switch to the normal user menu (with the SAM mode still active in the background). To return to the SAM menu press the MENU button. The INFO[i+] key from the user remote will toggle the OSD on/off with SAM OSD remaining always on. Press the following key sequence on the remote control transmitter: 062596 directly followed by the MENU button to switch to SDM (do not allow the display to time out between entries while keying the sequence). How to Store SAM Settings To store the settings changed in SAM mode (except the OPTIONS and RGB ALIGN settings), leave the top level SAM menu by using the POWER button on the remote control transmitter or the television set. The mentioned exceptions must be stored separately via the STORE button. How to Exit Switch the set to STANDBY by pressing the mains button on the remote control transmitter or the television set. Note: When the TV is switched off by a power interrupt while in SAM, the TV will show up in normal operation mode as soon as the power is supplied again. The error buffer will not be cleared. In case the set is in Factory mode by accident (with F displayed on screen), by pressing and hold VOL- and CH- together should leave Factory mode. 5.2.4 Customer Service Mode (CSM) Purpose The Customer Service Mode shows error codes and information on the TVs operation settings. A call centre can instruct the customer (by telephone) to enter CSM in order to

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5.3.1

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Service Modes, Error Codes, and Fault Finding 5.4

5.4.1

Service Tools
ComPair Introduction ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following: 1. ComPair helps you to quickly get an understanding on how to repair the chassis in a short and effective way. 2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. You do not have to know anything about I2C or UART commands yourself, because ComPair takes care of this. 3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available. 4. ComPair features TV software up possibilities. Specifications ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The (new) ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). How to Connect This is described in the ComPair chassis fault finding database.
TO TV
TO UART SERVICE CONNECTOR TO I2C SERVICE CONNECTOR TO UART SERVICE CONNECTOR

Error Codes
Introduction Error codes are required to indicate failures in the TV set. In principle a unique error code is available for every: Activated (SW) protection. Failing I2C device. General I2C error. The last five errors, stored in the NVM, are shown in the Service menus. This is called the error buffer. The error code buffer contains all errors detected since the last time the buffer was erased. The buffer is written from left to right. When an error occurs that is not yet in the error code buffer, it is displayed at the left side and all other errors shift one position to the right. An error will be added to the buffer if this error differs from any error in the buffer. The last found error is displayed on the left. An error with a designated error code may never lead to a deadlock situation. This means that it must always be diagnosable (e.g. error buffer via OSD or blinking LED procedure, ComPair to read from the NVM). In case a failure identified by an error code automatically results in other error codes (cause and effect), only the error code of the MAIN failure is displayed.

5.4.2

How to Read the Error Buffer You can read the error buffer in 3 ways: On screen via the SAM/SDM/CSM (if you have a picture). Example: ERROR: 0 0 0 0 0 : No errors detected ERROR: 6 0 0 0 0 : Error code 6 is the last and only detected error ERROR: 9 6 0 0 0 : Error code 6 was detected first and error code 9 is the last detected (newest) error Via the blinking LED procedure (when you have no picture). See paragraph 5.5 The Blinking LED Procedure. Via ComPair.

ComPair II RC in RC out

Multi function

Optional Power Link/ Mode Switch Activity

I2C

RS232 /UART

PC

5.4.3

Error codes The layer 1 error codes are pointing to the defective board. They are triggered by LED blinking when CSM is activated. In the LC10 platform, only two boards are present: the SSB and the PSU/IPB, meaning only the following layer 1 errors are defined: 2: SSB 4: PSU/IPB Table 5-1 Error code table
Layer-1 Defective error code board 2 4 4 2 2 2 SSB IPB IPB SSB SSB SSB Layer-2 Defective device error code 11 12 13 15 16 18 Speaker DC protection active on SSB +12 missing/low, IPB defective, POWER_DOWN POK line defective EEPROM I2C error on SSB, M24C16 Tuner I2C error on SSB IF Demodulator I2C error on SSB, TDA9886

ComPair II Developed by Philips Brugge Optional power 5V DC

HDMI I2C only

10000_036_090121.eps 091118

Figure 5-3 ComPair II interface connection Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown! How to Order ComPair II order codes: ComPair II interface: 3122 785 91020. ComPair UART interface cable: 3138 188 75051. Program software can be downloaded from the Philips Service web portal. Additional cables for VCOM Alignment ComPair/I2C interface cable: 3122 785 90004. ComPair/VGA adapter cable: 9965 100 09269. Note: If you encounter any problems, contact your local support desk.
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5.4.4

How to Clear the Error Buffer The error code buffer is cleared in the following cases: By using the CLEAR command in the SAM menu: If the contents of the error buffer have not changed for 50 hours, the error buffer resets automatically. Note: If you exit SAM by disconnecting the mains from the television set, the error buffer is not reset.

Service Modes, Error Codes, and Fault Finding 5.5

5.5.1

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The Blinking LED Procedure

Introduction The software is capable of identifying different kinds of errors. Because it is possible that more than one error can occur over time, an error buffer is available, which is capable of storing the last five errors that occurred. This is useful if the OSD is not working properly. Errors can also be displayed by the blinking LED procedure. The method is to repeatedly let the front LED pulse with as many pulses as the error code number, followed by a period of 1.5 seconds in which the LED is off. Then this sequence is repeated. Example (1): error code 4 will result in four times the sequence LED on for 0.25 seconds / LED off for 0.25 seconds. After this sequence, the LED will be off for 1.5 seconds. Any RC5 command terminates the sequence. Error code LED blinking is in red color. Example (2): the content of the error buffer is 12 9 6 0 0 After entering SDM, the following occurs: 1 long blink of 5 seconds to start the sequence, 12 short blinks followed by a pause of 1.5 seconds, 9 short blinks followed by a pause of 1.5 seconds, 6 short blinks followed by a pause of 1.5 seconds, 1 long blink of 1.5 seconds to finish the sequence, The sequence starts again with 12 short blinks.

TV set. To initiate a forced default download the following action has to be performed: 1. Switch off the TV set with the mains cord disconnected from the wall outlet (it does not matter if this is from Standby or Off situation). 2. Short-circuit the SDM pads on the SSB (keep short circuited, see Figure 5-2). 3. Press P+ or CH+ on the local keyboard (and keep it pressed). 4. Reconnect the mains supply to the wall outlet. 5. Release the P+ or CH+ when the set is started up and has entered SDM. When the downloading has completed successfully, the set will perform a restart. After this, put the set to Stand-by and remove the short-circuit on the SDM pads.

Alternative method: It is also possible to upload the default values to the NVM with ComPair in case the SW is changed, the NVM is replaced with a new (empty) one, or when the NVM content is corrupted. After replacing an EEPROM (or with a defective/no EEPROM), default settings should be used to enable the set to start-up and allow the Service Default Mode and Service Alignment Mode to be accessed. 5.6.3 No Picture When you have no picture, first make sure you have entered the correct display code. See Display Option Code Selection for the instructions. See also Table 6-4 Option code overview. 5.6.4 Unstable Picture via HDMI input Check (via ComPair) if HDMI EDID data is properly programmed. 5.6.5 No Picture via HDMI input Check if HDCP key is valid. This can be done in CSM. 5.6.6 HDMI CEC Not Functioning Go to Home/Menu ->Setup -> Installation -> Preference and set the Easylink option to on. Also check if the connected device is CEC enabled. 5.6.7 TV Will Not Start-up from Stand-by. Possible Stand-by Controller failure. Reflash the SW.

5.5.2

Displaying the Entire Error Buffer Additionally, the entire error buffer is displayed when Service Mode SDM is entered. In case the TV set is in protection or Stand-by: The blinking LED procedure sequence (as in SDMmode in normal operation) must be triggered by the following RC sequence: MUTE 062500 OK. In order to avoid confusion with RC5 signal reception blinking, this blinking procedure is terminated when a RC5 command is received.

5.6

Fault Finding and Repair Tips

Notes: It is assumed that the components are mounted correctly with correct values and no bad solder joints. Before any fault finding actions, check if the correct options are set.

5.6.1

NVM Editor In some cases, it can be convenient if one directly can change the NVM contents. This can be done with the NVM Editor in SAM mode. With this option, single bytes can be changed. Caution: Do not change these, without understanding the function of each setting, because incorrect NVM settings may seriously hamper the correct functioning of the TV set! Always write down the existing NVM settings, before changing the settings. This will enable you to return to the original settings, if the new settings turn out to be incorrect.

5.7
5.7.1

Software Upgrading
Introduction It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set. A description on how to upgrade the main software can be found in the DFU or on the Philips website.

5.7.2

Main Software Upgrade Automatic Software Upgrade In normal conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the autorun.upg (FUS part in the one-zip file). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update

5.6.2

Load Default NVM Values It is possible to download default values automatically into the NVM in case a blank NVM is placed or when the NVM first 20 address contents are FF. After the default values are downloaded, it is possible to start-up and to start aligning the

2010-Apr-06

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Service Modes, Error Codes, and Fault Finding

Assistant in the user menu (see DFU). The autorun.upg file must be placed in the root of your USB stick. How to upgrade: 1. Copy the autorun.upg file to the root of an USB stick. 2. Insert the USB stick in the side I/O while the set is on. The TV will prompt an upgrade message. Press Update to continue, after which the upgrading process will start. As soon as the programming is finished, the set must be restarted. In the Setup menu you can check if the latest software is running. 5.7.3 Content and Usage of the One-Zip Software File Below you find a content explanation of the One-Zip file, and instructions on how and when to use it. Only files that are relevant for Service are mentioned here! EDID_clustername_version.zip. Contains the EDID content of the different EDID NVMs. See ComPair for further instructions. FUS_clustername_version.zip. Contains the autorun.upg which is needed to upgrade the TV main software and the software download application. NVM_clustername_version.zip. Default NVM content. Must be programmed via ComPair.

5.7.4

How to Copy NVM Data to/from USB Write NVM data to USB 1. Insert the USB stick into the USB slot while in SAM mode. 2. Execute the command "NVM Copy" > "NVM Copy to USB", to copy the NVM data to the USB stick. The NVM filename on the USB stick will be named "NVM_COPY.BIN" (this takes a couple of seconds). Write NVM data to TV 1. First, ensure (via a PC) that the filename on the USB stick has the correct format: "NVM_COPY.BIN". 2. Insert the USB stick into the USB slot while in SAM mode. 3. Execute the command "NVM Copy" > "NVM Copy from USB" to copy the USB data to NVM (this takes about a minute to complete). Important: The file must be located in the root directory of the USB stick.

5.7.5

How to Copy EDID Data to/from USB Write EDID data to USB 1. Insert the USB stick into the USB slot while in SAM mode. 2. Execute the command "NVM Copy" > "EDID Copy to USB", to copy the EDID data to the USB stick. The filename on the USB stick will be named "EDID2USB.BIN" (this takes a couple of seconds). Write EDID data to TV 1. First, ensure (via a PC) that the filename on the USB stick has the correct format: "EDID2USB.BIN". 2. Insert the USB stick into the USB slot while in SAM mode. 3. Execute the command "NVM Copy" > "EDID Copy from USB" to copy the USB data to EDID (this takes about a minute to complete). Important: The file must be located in the root directory of the USB stick.

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Alignments

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6. Alignments
Index of this chapter: 6.1 General Alignment Conditions 6.2 Hardware Alignments 6.3 Software Alignments 6.4 ADC gain adjustment 6.6 Option Settings Note: Figures below can deviate slightly from the actual situation, due to the different set executions. General: The Service Default Mode (SDM) and Service Alignment Mode (SAM) are described in chapter 5. Menu navigation is done with the CURSOR UP, DOWN, LEFT or RIGHT keys of the remote control transmitter.

6.3

Software Alignments
With the software alignments of the Service Alignment Mode (SAM) the Tuner and RGB settings can be aligned.

6.3.1

Tuner Adjustment (RF AGC Take Over Point) Purpose: To keep the tuner output signal constant as the input signal amplitude varies. The LC10.1L LA chassis comes with the VA1E1BF2403 tuner. No alignment is necessary, as the AGC alignment is done automatically (standard value: 0).

6.1

General Alignment Conditions

Perform all electrical adjustments under the following conditions: Power supply voltage (depends on region): AP-NTSC: 120 VAC or 230 VAC / 50 Hz ( 10%). AP-PAL-multi: 120 - 230 VAC / 50 Hz ( 10%). EU: 230 VAC / 50 Hz ( 10%). LATAM-NTSC: 120 - 230 VAC / 50 Hz ( 10%). US: 120 VAC / 60 Hz ( 10%). Connect the set to the mains via an isolation transformer with low internal resistance. Allow the set to warm up for approximately 15 minutes. Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heatsinks as ground. Test probe: Ri > 10 Mohm, Ci < 20 pF. Use an isolated trimmer/screwdriver to perform alignments.

6.3.2

RGB Alignment Before alignment, set the picture as follows:

Picture Setting Dynamic backlight Dynamic Contrast Colour Enhancement Picture Format Light Sensor Brightness Colour Contrast Off Off Off Unscaled Off 50 0 100

White Tone Alignment: Activate SAM. Select RGB Align. and choose a color temperature. Use a 100% white screen as input signal and set the following values: Red BL Offset and Green BL Offset to 7 (if present). All White point values initial to 127.

6.2

Hardware Alignments
There are no hardware alignments foreseen for this chassis, but below find an overview of the most important DC voltages on the SSB. These can be used for checking proper functioning of the DC/DC converters.
Description Test Point +12VS +3V3_SW +1V2_SW +5V_SW +1V8_SW +1V0_SW +5VS +2V5_SW F118 F133 F131 F132 F125 F134 F235 F305 Specifications (V) Min. 11.7 3.2 3.17 1.18 4.98 1.74 0.99 4.94 2.38 4.75 14.82 -6.32 3.14 Typ. 12.3 3.3 3.34 1.25 5.25 1.83 1.05 5.2 2.5 5 15.6 -6.02 3.3 Max. 12.91 3.4 3.5 1.31 5.51 1.92 1.1 5.46 2.62 5.25 16.38 -5.72 3.47 B01_DC-DC B01_DC-DC B01_DC-DC B01_DC-DC B01_DC-DC B01_DC-DC B01_DC-DC B02A_Tuner B02B_Demod B02A_Tuner Diagram

+3V3_STBY F113

In case you have a color analyzer: Measure with a calibrated (phosphor- independent) color analyzer (e.g. Minolta CA-210) in the centre of the screen. Consequently, the measurement needs to be done in a dark environment. Adjust the correct x,y coordinates (while holding one of the White point registers R, G or B on max. value) by means of decreasing the value of one or two other white points to the correct x,y coordinates (see Table 6-1 White D alignment values). Tolerance: dx: 0.002, dy: 0.002. Repeat this step for the other color Temperatures that need to be aligned. When finished return to the SAM root menu and press STANDBY on the RC to store the aligned values to the NVM. Table 6-1 White D alignment values

+5VTUN_DI F236 GITAL VLS_15V6 VGL_-6V VCC_3V3 FJ00 FJ14 FK13

B08B TCON DC/DC B08B TCON DC/DC B08B TCON DC/DC Value x y Cool (11000 K) 0.276 0.282 Normal (9000 K) 0.287 0.296 Warm (6500 K) 0.313 0.329

If you do not have a color analyzer, you can use the default values. This is the next best solution. The default values are average values coming from production (statistics). Set the RED, GREEN and BLUE default values per temperature according to the values in the Tint settings table. When finished return to the SAM root menu and press STANDBY on the RC to store the aligned values to the NVM.
2010-Apr-06

EN 20

6.

LC10.1L LA

Alignments 6.5
G tbf tbf tbf B tbf tbf tbf

Table 6-2 Tint settings 32"

Colour Temp. Cool Normal Warm R tbf tbf tbf

TCON Alignment (= VCOM alignment)

New requirement for TCON on SSB project: The purpose of VCOM alignment is to obtain an equal voltages for both Positive and Negative LC polarity. This is important to avoid Flicker and Image Sticking. The P-Gamma + VCOM calibrator IC, ISL24837 is used for VCOM adjustment. The adjusted VCOM data will be stored inside on-chip memory and will be automatically recalled during each power-up. ComPair (see 5.3.1 ComPair) will foresee in a possibility to do this alignment.

Table 6-3 Tint settings 40"

Colour Temp. Cool Normal Warm R tbf tbf tbf G tbf tbf tbf B tbf tbf tbf

6.4

ADC gain adjustment

Use a Quantum Data Patters Generator 802BT and apply a PgcWrgb image (dot, cross and color bar mix pattern) according to Figure 6-1.

6.6
6.6.1

Option Settings
Introduction The microprocessor communicates with a large number of I2C ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence/absence of these specific ICs (or functions) is made known by the option codes. Notes: After changing the option(s), save them with the STORE command. The new option setting becomes active after the TV is switched off and on again with the mains switch (the EAROM is then read again).

6.6.2
18920_200_100317.eps 100317

How To Set Option Codes When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set all option numbers. You can find the correct option numbers in Table 6-4. How to Change Options Codes An option code (or option byte) represents eight different options (bits). All options are controlled via ten option bytes (OP#1... OP#10). Activate SAM and select Options. Now you can select the option byte (OP#1... OP#10) with the CURSOR UP/ DOWN keys, and enter the new 3 digit (decimal) value. For the correct factory default settings, see Table 6-4 Option code overview. Table 6-4 Option code overview
CTN 32PFL3605D/78 40PFL3605D/78 Option Code 002 192 145 248 072 006 060 078 068 001 002 192 145 248 072 006 060 078 068 002 Display Code 237 238

Figure 6-1 PgcWrgb pattern 6.4.1 YPbPr Following instructions result in correct alignment of ADC gain, offset and phase, related to YPbPr input signal. Apply a signal of format 1080i25. Apply following signals to the YPbPr input connectors: Pr signal of 0.7 Vp-p1 / 75 ohm to the red cinch connector. Y signal of 0.7 Vb-p2 / 75 ohm with a sync pulse of 0.3 Vp-p1 to the green cinch connector. Pb signal of 0.7 Vb-p1 / 75 ohm to the blue cinch connector. Select the input source to YPbPr input. In SAM, initiate the Auto ADC calibration command. Upon appearance of the Auto ADC Completed message, the alignment is completed. Notes: 1. Peak-to-Peak 2. Black-to-Peak. 6.4.2 PC VGA Following instructions result in correct alignment of ADC gain, offset and phase, related to PC VGA input signal. Apply a signal of format DMT1060. Apply following signals to the PC VGA input connector: Red signal of 650 - 730 mV. Green signal of 650 - 730 mV. Blue signal of 650 - 730 mV. Select the input source to PC VGA input. In SAM, initiate the Auto ADC calibration command. Upon appearance of the Auto ADC Completed message, the alignment is completed.
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Circuit Descriptions

LC10.1L LA

7.

EN 21

7. Circuit Descriptions
Index of this chapter: 7.1 Introduction 7.2 Power Supply 7.3 Video 7.3.1 Video: Front-End 7.3.2 VIDEO: TCON 7.4 Audio 7.5 Inputs 7.5.1 Inputs: HDMI 7.5.2 Inputs: USB Notes: Only new circuits (circuits that are not published recently) are described. Figures can deviate slightly from the actual situation, due to different set executions. For a good understanding of the following circuit descriptions, please use chapter 9. Block Diagrams and 10. Circuit Diagrams and PWB Layouts. Where necessary, you will find a separate drawing for clarification.

7.1

Introduction
The LC10.1L LA chassis is a digital chassis using a Mediatek chipset. It covers screen sizes of 32" to 40" with a styling called Dali. Main key components are the Mediatek MT5363 integrated System On Chip (SoC) that supports multimedia video/audio input, and the integrated TCON (Timing Controller) part for the LCD panel. System SoC is based on MT5363: NAND Flash 128 Mbyte, NumOnyx/Hynix. DDR 128 Mbyte (32x16M, 2 pcs), Hynix. Use internal MT5363 Stand-by micro-controller. Tuner/Frontend configuration: Half NIM tuner from Sharp. Toshiba Channel Decoder (TC90517). Digital Connectivity: 1x USB port with over current protection using power switch. 2x HDMI ports (using MT5363 internal mux). Analog Connectivity: 2x YPbPr (component video) + Audio (cinch). 1x CVBS (composite) + Audio (cinch). 1x VGA (RGB) + Audio (3.5mm stereo jack). Interfaces for debug and SW upgrade: UART (3.5mm jack). USB port. JTAG. Refer to Figure 7-1 for details.

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EN 22

7.

LC10.1L LA

Circuit Descriptions

18980_201_100402.eps 100402

Figure 7-1 LC10.1L LA Architecture

18980_202_100402.eps 100402

Figure 7-2 SSB cell layout

2010-Apr-06

Circuit Descriptions 7.2 Power Supply

The Power Supply Unit (PSU) in this chassis is a buy-in and is a black-box for Service. When defective, a new panel must be ordered and the defective panel must be returned for repair, unless the main fuse of the unit is broken. Always replace the fuse with one with the correct specifications! This part is commonly available in the regular market. Refer to Figure 7-3 and Figure 7-4 for details The power supply system consists of stand-by, switched and regulated voltages. The stand-by voltage, +3V3STBY, will be available once AC supply is provided to the system. As for the other voltages, namely switched and regulated voltages, these are available once the STANDBY signal is pulled low to allow other supplies from the IPB to turn on. The switched supplies are generated from the main +12VS supply, while the regulated supplies are derived from the switched supplies. There are a number of detection circuits to detect the following supplies: +12VS, +12Vdisp and +3V3_SW. The +12VS is the main supply voltage from the IPB that enables the switched voltages to be generated. The +12Vdisp is the supply to the display timing controller, while the +3V3_SW is powering the microprocessor and its flash memory. The mains power supply unit distribute the following voltages to the TV system: +3V3STBY, 12VS, +24Vaudio, and +24Vpanel for panel with inverter (or) high voltage (HV) for inverterless panel. Requirement of the High Voltage depend on the specification of the LCD panel.

LC10.1L LA

7.

EN 23

18980_203_100402.eps 100402

Figure 7-4 Power timing overview

+12VS

DC/DC

1.1V+/ - 0.05V 1.25V+/ - 0.06V

DC/DC

1V8+/ - 0.09V

DDR2 x2

3.3V+/ -0.16V DC/DC 5.25V+/ -0.26V R e g u la tor

2.5V +/ - 0.12V

Dig Demod

MT5363

USB R e g u la tor 5.25V+/ - 0.25V Tuner

NVM

EEPROM EEPROM

Flash

+3V3STBY

18980_203_100402.eps 100402

Figure 7-3 Power distribution overview

2010-Apr-06

EN 24 7.3
7.3.1

7.

LC10.1L LA

Circuit Descriptions
Toshiba channel decoder TC90517 (external ISDB-T channel decoder). Analog demodulator (using internal MT5363 analog demodulator - pin AH35 VIP, AH37 VIN).

Video
Video: Front-End Key components for the tuner section are: Sharp Half NIM tuner VA1E1BF2403,

Refer to Figure 7-5 for details.

18980_205_100402.eps 100402

Figure 7-5 Front-end functional block diagram 7.3.2 VIDEO: TCON The Timing Controller (TCON) is integrated in the SSB (Forward Integration concept). Refer to Figure 7-6.

EEPROM

LVDS

(10bit)
Timing Controller

Mini - LVDS

Control Signals
Gamma Reference Voltage

Main Platform

MTK
+12V

Source Drive IC

+3V3 + 1V2

Gate Drive IC

+ 15.6V Power Block

TFT LCD Panel

VGH (+35V) VGL ( 6V)

TCON LCD Panel

SSB
18920_209_100318.eps 100319

Figure 7-6 TCON system block diagram

2010-Apr-06

Circuit Descriptions 7.4 Audio

In this chassis, audio processing is done by the following key components: MT5363 micro-processor for input selection and audio processing, TPA3123D2 class-D power amplifier for 2 x 10 W amplification. The audio profile (optimal setting per screen size and styling) is stored at Option 10 (bit 0 to bit 4). Profile 1 for 32-inch Dali and profile 2 for 40-inch Dali. Table 7-1 Microprocessor control lines - 1 From uP SW_MUTE At class D Usage SW_MUTE Will pull audio signals to LOW upon DC drops, help to eliminate plop sound. Control SHUTDOWN pin of class D amplifier: ON/OFF the amplifier Corresponding to the MUTE button on Remote Control, to mute/unmute speakers

LC10.1L LA

7.

EN 25

RESET_AUDIO A_STBY MUTE DC_PROT MUTE

DC_PROT Detecting present of DC at speakers output and feedback to uP. This will trigger TV into protection mode. This is important to protect speakers

Table 7-2 Microprocessor control lines - 2 From uP SW_MUTE LOW HIGH RESET_AUDIO LOW HIGH MUTE DC_PROT LOW HIGH LOW HIGH A_STBY Class D outputs to class D HIGH LOW MUTE Operating (unmute) Operating (unmute) Class D shutdown (mute) Operating (unmute) MUTE DC detected -> set going to protection No DC -> normal operating

18980_206_100402.eps 100402
Figure 7-7 Audio signal flow

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EN 26 7.5
7.5.1

7.

LC10.1L LA

Circuit Descriptions

Inputs
Inputs: HDMI In this chassis, the main Mediatek MT5363 SoC has an on-chip HDMI multiplexer. Refer to Figure 7-8 for the implementation.

18980_208_100402.eps 100402

Figure 7-8 HDMI implementation Signal description: TMDS: Signals that contain audio and video information. PWR5V: Signal to detect the presence of any HDMI source connected to the TVs HDMI input port. SIDE_HDMI_HPD1 and HDMI_HPD2: Signal to initiate reading of the TV EDID data by the source device. I2C: The EDID data reading and the HDCP authentication process runs via I2C. CEC: Signal direct connected between inputs and uP. EDID_WC: Signal used to disable the write protect pin of the EEPROM. When updating, the program will temporarily pull this pin LOW before writing new data. 7.5.2 Inputs: USB In this chassis, the main Mediatek MT5363 SoC has an on-chip USB processor. Refer to Figure 7-9 for the implementation.

18980_207_100402.eps 100402

Figure 7-9 USB implementation

2010-Apr-06

IC Data Sheets

LC10.1L LA

8.

EN 27

8. IC Data Sheets
This section shows the internal block diagrams and pin layouts of ICs that are drawn as "black boxes" in the electrical diagrams (with the exception of "memory" and "logic" ICs).

8.1

Diagram B01, Type TPS54386 (IC7116 and 7117)

BLOCK DIAGRAM
2 CLK1 BP Level Shift f(IDRAIN1) + DC(ofst) GND 4 + FB1 7 0.8 VREF f(IDRAIN1) Overcurrent Comp Current Comparator + S R R Q Q 1 PVDD1 BOOT1

+
RCOMP f(ISLOPE1) f(IMAX1) CLK1 BP Weak Pull-Down MOSFET

SW1

Soft Start 1

SD1

CCOMP

Anti-Cross Conduction f(ISLOPE1) Ramp Gen 1

VDD2

TSD 6 A EN1 EN2 5 6 150 k SEQ 10 150 k CLK2 Level Shift f(IDRAIN2) + DC(ofst) GND 4 Current Comparator + BP FB1 FB2 Output Undervoltage Detect Internal Control 6 A SD1 SD2 UVLO

1.2 MHz Oscilator

Divide by 2/4 Ramp Gen 2

CLK1 f(ISLOPE2)

CLK2

13 BOOT2 BP 14 PVDD2 FET Switch

S R R

Q Q

+ FB2 8 0.8 VREF f(IDRAIN2)

+
RCOMP f(ISLOPE2)

Overcurrent Comp f(IMAX2) CLK2 BP Weak Pull-Down MOSFET

12 SW2

Soft Start 2

SD2

CCOMP

Anti-Cross Conduction

BP 11 150 k BP ILIM2 9 150 k Level Select

5.25-V Regulator

PVDD2

0.8 VREF References IMAX2 (Set to one of three limits)

UDG-07124

PIN CONNECTIONS
HTSSOP (PWP) (Top View) PVDD1 BOOT1 SW1 GND EN1 EN2 FB1 1 2 3 4 5 6 7 Thermal Pad (bottom side) 14 PVDD2 13 BOOT2 12 SW2 11 BP 10 SEQ 9 ILIM2 8 FB2

18980_300_100402.eps 100402

Figure 8-1 Internal block diagram and pin configuration

2010-Apr-06

EN 28 8.2

8.

LC10.1L LA

IC Data Sheets

Diagram B01 SSB: DC-DC, Type ST1S10PH (IC7107)

Block diagram

Pinning information

DFN8 (4 4)

PowerSO-8
I_18010_083.eps 100402

Figure 8-2 Internal block diagram and pin configuration

2010-Apr-06

IC Data Sheets 8.3 Diagram B02B SSB: Digital Demodulator, Type LD1117D (IC7315)

LC10.1L LA

8.

EN 29

Block diagram

LD1117DT

Pinning information

DPAK

F_15710_166.eps 100402

Figure 8-3 Internal block diagram and pin configuration

2010-Apr-06

EN 30 8.4

8.

LC10.1L LA

IC Data Sheets

Diagram B03 SSB: Class-D & Muting, Type TPA3123 (IC7400)

Block diagram
1 F

1 F LIN RIN BSR ROUT PGNDR 1 F BYPASS AGND PGNDL LOUT BSL

0.22 F 22 H 0.68 F 0.68 F 470 F

22 H 0.22 F

470 F

AVCC

PVCCL PVCCR

VCLAMP Shutdown Control SD 1 F

MUTE

GAIN0 GAIN1

}
PGNDL PGNDL LOUT BSL AVCC AVCC GAIN0 GAIN1 BSR ROUT PGNDR PGNDR

Control

Pinning information
PVCCL SD PVCCL MUTE LIN RIN BYPASS AGND AGND PVCCR VCLAMP PVCCR
TERMINAL NAME SD RIN LIN GAIN0 GAIN1 MUTE BSL PVCCL LOUT PGNDL VCLAMP BSR ROUT PGNDR PVCCR AGND AGND BYPASS AVCC Thermal pad 24-PIN (PWP) 2 6 5 18 17 4 21 1, 3 22 23, 24 11 16 15 13, 14 10, 12 9 8 7 19, 20 Die pad I/O/P DESCRIPTION Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to AVCC Audio input for right channel Audio input for left channel Gain select least-significant bit. TTL logic levels with compliance to AVCC Gain select most-significant bit. TTL logic levels with compliance to AVCC Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low = outputs enabled). TTL logic levels with compliance to AVCC Bootstrap I/O for left channel Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC Class-D 1/2-H-bridge positive output for left channel Power ground for left-channel H-bridge Internally generated voltage supply for bootstrap capacitors Bootstrap I/O for right channel Class-D 1/2-H-bridge negative output for right channel Power ground for right-channel H-bridge. Power supply for right-channel H-bridge, not connected to PVCCL or AVCC Analog ground for digital/analog cells in core Analog ground for analog cells in core Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via external capacitor sizing. High-voltage analog power supply. Not internally connected to PVCCR or PVCCL Connect to ground. Thermal pad should be soldered down on all applications to properly secure device to printed wiring board.

1 2 3 4 5 6 7 8 9 10 11 12

24 23 22 21 20 19 18 17 16 15 14 13

I I I I I I I/O P O P P I/O O P P P P O P P

18440_302_090303.eps 090318

Figure 8-4 Internal block diagram and pin configuration

2010-Apr-06

IC Data Sheets 8.5 Diagram B04 SSB: MTK Power, Type MT5363 (IC7700)

LC10.1L LA

8.

EN 31

Block diagram
CVBS/ YC Input

HDMI Rx HDMI In I/F Audio Demod

Audio Input

Panel LVDS

CVBS VDAC TVE DDR DRAM Controller

DVB-T

ATD

VADCx4 TV Decoder VDO-In

Audio ADC

Audio In JPEG,MPEG H.264 2-D Graphic

ARM BIM

TS Demux

Mix andPost Processing OSD scaler Vplane scaler/PIP

PreProc MDDi

IO Bus Audio DSP Audio I/F Audio DAC

JTAG IrDA SIF USB2.0 Watchdog

Standby uP CKGEN
Serial Flash Servo ADC

BScan

PVR

RTC UART

MS,SD

PWM

NAND Flash

SPDIF, I2S
18850_300_100107.eps 100222

Figure 8-5 Internal block diagram

2010-Apr-06

EN 32

8.

LC10.1L LA

IC Data Sheets

Pinning information
LT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 A RCLK0_ RDQ10 RDQ15 RDQS0_ RDQ14 RDQ12 AO1N AOCKN

VCC2IO

RCLK0

RDQ8

RDQS1

RDQS0

RDQ11

VCC2IO

AO0N

AO2N

AO3N

VCC2IO RA9

RDQ13

RDQS1_

DVSS

RDQM1

VCC2IO

AO1P

AOCKP

VCC2IO

RDQ5

RDQ0

DVSS

RDQ9

VCC2IO

AO0P

AO2P

AO3P

RA12 RA5

VCC2IO

RDQ2

DVSS

RDQM0

VCC2IO

VCC2IO AVDD33_L VDS VCC2IO AVDD33_L VDS VCC2IO

AE0N

AE2N

RA7

VCC2IO

RDQ7

DVSS

RDQ6

VCC2IO

AE1N

AECKN

RA10 RBA2

RA3

VCC2IO

DVSS

DVSS

RDQ3

AE0P

AE2P

RBA0

RA1

VCC2IO

RDQ1

RDQ4

AE1P AVSS33_L VDS

AECKP

RBA1 RCKE

DVSS

DVSS

RWE_

MEMTN

MEMTP

RCAS_ RA13

DVSS

DVSS TP_VPLL AVDD12_L VDS DVSS AVSS12_L VDS VCCK DVSS DVSS AVDD12_V PLL AVSS12_V PLL

RA2

RA4

RA6 DVSS AVDD12_M EMPLL DVSS AVSS12_M EMPLL VCCK DVSS DVSS DVSS

RA11 RA8

RA0

RODT

RVREF

RCS_

RRAS_

RVREF

VCC2IO RDQ19

VCC2IO

VCC2IO

RDQ20

RDQ30

RDQ25

DVSS

RDQ22 RDQM2

RDQ17

RDQM3

RDQS2

RDQ28

RDQ27

VCCK

DVSS

DVSS

DVSS

RDQS2_ RDQS3

DVSS

DVSS

DVSS

DVSS

DVSS

DVSS

RDQ24

RDQ31

VCCK

VCCK

DVSS

DVSS

AA

RDQS3_ RDQ16

RDQ29

RDQ26

VCCK

DVSS

DVSS

AB

RDQ23

REXTDN

DVSS

DVSS

DVSS

DVSS

AC

RDQ21 RCLK1

RDQ18

VCC2IO VCC2IO

DVSS

DVSS

DVSS

AD

RCLK1_

VCC2IO

DVSS

VCCK

VCCK

VCCK

AE

VCC2IO

VCC2IO

GPIO39

DVSS

VCCK

VCCK

VCCK

AF

VCC2IO

VCC2IO

GPIO37

GPIO40

DVSS

VCCIO33-1

VCCIO33-1

AG

GPIO38 GPIO44

GPIO41

GPIO42

VCCK

AH

GPIO43

JTDO

VCCK VCCK

AJ

JTDI JTRST_

JTMS

VCCK

AK

JTCK

VCCK

VCCK AVDD12_U SB AVSS12_U SB USB_VRT PDD4 PDD6 AVSS33_U SB PDD7 7 8 9 USB_DP 10 11 AVSS33_U SB USB_DM
AVSS33_U

AL

VCCK

VCCK

VCCK

VCCK

HDMI_SCL 2 AVDD33_U SB AVSS33_H DMI AVDD12_H DMI RX2_C RX2_0B RX2_0 AVDD33_H DMI

HDMI_SDA 2 PWR5V_2

PWR5V_1 HDMI_SCL 1 HDMI_HPD 2 RX2_2 RX1_0

HDMI_HPD 1 OPCTRL1
HDMI_SDA

AM

VCCK

VCCK

VCCK

VCCK

AN

VCCK OSDA0

VCCK

POCE1_

HDMI_CEC

1 RX1_2

AP

OSCL0

PDD1

AR

PDD0 POCE0_

PAALE

PDD2

RX2_1

RX1_C RX2_2B RX1_0B

RX1_1 RX1_2B

AT

POWE_

PARB_

PDD5

SB RX2_CB 12

AU

POOE_ 2 3

PACLE

PDD3 5 6

RX2_1B 13 14 15

RX1_CB 16 17

RX1_1B 18 19

AV 1

18850_301_100107.eps 100222

Figure 8-6 Internal block diagram

2010-Apr-06

IC Data Sheets

LC10.1L LA

8.

EN 33

Pinning information
20 AO4N 21 22 GPI O35 23 24 25 26 GPI O21 27 28 29 30 GPI O3 31 32 ETTXD0 33 34 ETRXD2 35 36 ETRXD0 37 RT A

DVSS

GPIO32

GPIO26

GPIO17

GPIO9

ETTXD3

ETRXCLK

ETRXD1

ETRXDV

AO4P

GPIO36

GPIO28

GPIO22

GPIO11

GPIO4

ETTXD1

ETRXD3

ETCRS

DVSS

GPIO34

GPIO27

GPIO18

GPIO10

ETTXEN

ETTXCLK

ETRXER ETMDC

ETMDIO

AE3N

DVSS

GPIO30

GPIO20

GPIO12

GPIO6

ETTXD2

ETTXER

E CI_MOSTR T

AE4N

GPIO33

GPIO24

GPIO16

GPIO8

ETPHYCLK

CI_MCLKO

CI_MCLKI CI_MOVAL

AE3P

DVSS

GPIO29

GPIO19

GPIO14

GPIO5

ETCOL
CI_MISTR

CI_MIVAL

G CI_MDO0 H

AE4P

VCCIO33

GPIO25

GPIO15

GPIO7

VCCIO33

T GPIO2 OPWM0

CI_MDI0 OPWM1

GPIO31

GPIO23

GPIO13

VCCIO33

AOSDATA3

ASPDIF ALIN AOBCK

GPIO0 AOSDATA0

GPIO1

FSRC_WR

IF_AGC DVSS VCCK VCCK AOSDATA4

RF_AGC TUNER_DA TA

AOMCLK TUNER_CL K AOSDATA1

AOLRCK

DVSS

DVSS

DVSS

OSCL2

OSDA2

AOSDATA2

DVSS

DVSS

DVSS AVDD33_A DAC1 AVSS33_A DAC1 VCCK VCCK AVSS33_R EF_AADC VMID_AAD AVDD33_R EF_AADC VCCIO33

OSDA1

OSCL1

U1RX
VCXO

R T

DVSS

DVSS

VCCK

OPWM2

U1TX

DVSS

DVSS

DVSS

AL1

AR2

AR3
AL3 V

DVSS
DVSS

DVSS DVSS

AR1 VCCIO33 VCCIO33 AVSS33_A ADC AIN4_L_AA DC AIN5_L_AA DC AIN4_R_A ADC AIN1_R_A ADC AIN0_R_A ADC AIN0_L_AA DC AVSS33_A DAC0

AL2 VCCIO33 AIN5_R_A ADC AIN6_L_AA DC AIN2_R_A ADC AIN3_L_AA DC AIN2_L_AA DC AR0

W AIN6_R_A ADC
Y

DVSS

DVSS

VCCK

AVDD33_A ADC

DVSS DVSS DVSS

DVSS DVSS DVSS

VCCK VCCK DVSS

C AIN1_L_AA DC

AA AIN3_R_A AB ADC AC AD

DVSS

DVSS

DVSS

VCCK

VCCK

DVSS AVDD12_T VDPLL AVDD12_A PLL AVSS12_P LL AVSS33_D IG AVSS33_SI F AVSS33_V AVDD33_S IF AVDD12_R GB AVDD33_V GA_STB AVSS12_R GB SOY1 PR1P Y0P PB0P AVSS33_V DAC VDAC_OUT PB1P COM0 AVDD33_V DAC VDAC_OUT 1 AVSS33_C VBS SC0 AVDD33_C VBS SY0 FS_VDAC BYPASS0 AVDD33_D IG ADIN0_SR V AF ADIN1_SR V AVSS12_P LL AVDD12_S YSPLL AVDD12_A DCPLL
AVDD33_

AE

ADAC0 AVDD33_ DEMOD1

AVICM AVSS33_D EMOD1 ADCINN_D EMOD XTALO AVDD33_X TAL_STB ADIN3_SR V ADIN2_SR V MPXP MPXN CVBS2P ADIN5_SR V XTALI

AL0

AF

AG ADCINP_D EMOD AH AJ AVSS33_X TAL AK

OPWRSB OPCTRL0 OPCTRL2

ORESET_ AVDD10_L DO OIRI

GA_STB

AL ADIN4_SR V

AM AN

U0TX

SOG

TUNER_BY PASS AP AR

OPCTRL3

HSYNC

COM

COM1

SY1

CVBS0N

U0RX

BP

RP

2 PR0P

CVBS3P CVBS1P

CVBS0P

AT AU

OPCTRL4

VSYNC 21 22 23

GP 24 25

Y1P 26 27

SOY0 28 29

SC1 31 32 33 34 35

20

30

36

37

RB

18850_302_100107.eps 100222

Figure 8-7 Internal block diagram

2010-Apr-06

EN 34 8.6

8.

LC10.1L LA

IC Data Sheets

Diagram B06B SSB: Analog I/O - Audio, Type LM833 (IC7B01)

Pinning information

Output 1

VCC Output 2

Inputs 1
3 2 6

Inputs 2
5

VEE

(Top View)
18520_306_090325.eps 100402

Figure 8-8 Pin configuration

2010-Apr-06

IC Data Sheets 8.7 Diagram B08B SSB: TCON DC/DC, Type ISL97653 (IC7J00)

LC10.1L LA

8.

EN 35

Block diagram
CM1 GM AMPLIFIER FBB VREF +

RSET HVS

VREF PROT

HVS LOGIC

SAWTOOTH GENERATOR SLOPE COMPENSATION LX1 LX2

BUFFER

UVLO COMPARATOR +

CONTROL LOGIC

RSENSE 0.75 VREF FREQ VL PVIN1,2 CURRENT LIMIT COMPARATOR CURRENT LIMIT THRESHOLD 680kHz OSCILLATOR CURRENT AMPLIFIER PGND1 PGND2

REGULATOR REFERENCE BIAS AND SEQUENCE CONTROLLER

CDEL EN

VL PVIN1,2 SUPN LXL1 LXL2 CONTROL LOGIC CURRENT LIMIT COMPARATOR + CURRENT LIMIT THRESHOLD BUFFER CURRENT AMPLIFIER GM AMPLIFIER CM2 FBL VREF SLOPE COMPENSATION SAWTOOTH GENERATOR CB

NOUT

FBN 0.2V

UVLO COMPARATOR + 0.4V 0.75 VREF +

LDO CONTROL LOGIC2

LDO-CTL LDO-FB

FBP VREF

SUPP +

TEMP SENSOR

TEMP

POUT SUPP

C1-

C1+

POUT

C2+

C2-

DRN

CTL

COM

LDO-CTL

LDO-FB

Pinning information

PGND2

AGND

PVIN1

PGND1 32

PROT

LX2

40 PVIN2 CB LXL1 LXL2 PGND3 PGND4 CM2 FBL VL VREF 1 2 3 4 5 6 7 8 9 10 11 FBN

39

38

37

36

35

34

LX1

33

31 30 COMP 29 FBB 28 RSET 27 HVS

ISL97653A 40 LD 6X6 QFN TOP VIEW

TEMP 26 EN 25 CDEL 24 CTL 23 DRN 22 COM 21 POUT 20 FBP

12 SUPN

13 NOUT

14 PGND5

15 C1P

16 C1N

17 C2P

18 C2N

19 SUPP

18770_307_100217.eps 100217

Figure 8-9 Internal block diagram and pin configuration

2010-Apr-06

EN 36

8.

LC10.1L LA

IC Data Sheets

Personal Notes:

10000_012_090121.eps 090121

2010-Apr-06

Block Diagrams

LC10.1L LA

9.

EN 37

9. Block Diagrams
Wiring Diagram 32" - 40" (Dali)
WIRING DIAGRAM 32"- 40" DALI

Board Level Repair

TO BACKLIGHT 32"

TO DISPLAY

LCD DISPLAY (1004)

TO DISPLAY

Component Level Repair Only For Authorized Workshop

TO BACKLIGHT

8KA1

8319 8316

1M95 (B01)
1. +3V3STDBY 2. STANDBY 3. GND 4. GND 5. GND 6. +12VS 7. +12VS 8. +12VS 9. +24VAUDIO 10. GNDSND 11. N.C.

1M99 (B01)
1. 2. 3. 4. 5. 6. 7. 8. 9. +12VDISP +12VDISP GND GND LAMP-ON PWM-DIMMING BACKLIGHT-PWM GND POWER-OK

8KA2

1M20 (B04c)
1. 2. 3. 4. 5. 6. 7. 8. LIGHT-SENSOR GND RC LED-2 +3V3STBY LED-1 KEYBOARD +5V

1KA1 (B08E)
1. GND | 11. VLS_15V6 12. VLS_15V6 | 33. VCC_3V3 34. VCC_3V3 | 78. VGH_35V 79. VGL_-6V 80. GND

1KA2 (B08E)
1. GND | 11. VLS_15V6 12. VLS_15V6 | 33. VCC_3V3 34. VCC_3V3 | 78. VGH_35V 79. VGL_-6V 80. GND

1319 1P3

1316 1P3

LOUDSPEAKER (5213)

HIGH VOLTAGE

1735 (B03)
1. 2. 3. 4. LEFT_SPEAKER GND-AUDIO GND-AUDIO RIGHT_SPEAKER

MAIN POWER SUPPLY IPB 32 PLHC-P984A B IPB 40 PLHE-P986A B

(1005)

1M99

9P

8M20

1M20 8P
1M95

1KA2 80P

1KA1 80P

B
9P

11P

SSB
(1150)

8M99

1M95

1M99

8M95

KEYBOARD CONTROL (1114)

1735

4P

TUNER

11P

SPDIF

HDMI

HDMI

PHONE

VGA

2P3 N 1308 L

3P

J1

MAINS CORD

J2 3P

J1 8P

IR/LED BOARD (1112)

8191

HDMI

USB

18980_400_100329.eps 100402

2010-Apr-06

TO BACKLIGHT

40"

Block Diagrams

LC10.1L LA

9.

EN 38

Block Diagram Video VIDEO

B02A TUNER
1201 VA1E1BF2403 +B 8 +5VTUN_DIG
5207

B04 MT5363:
7302 TC90517FG 58 TSO_VALID DIGITAL DEMODULATOR 59 TSO_SYNC G34 H33 F35 H35 7700 MT5363BHMG B04C MAC-CI CI_MIVAL CI_MISTRT CI_MCLKI AO CI_MDIO B04C CONTROL IF_AGC 7218 RF_AGC M31 M33 AGC_IF AGC_RF AE B05 HDMI-LVDS

B08A TCON CONTROL

7H01 VPP1501BFG B08A INTERFACE

B08D MPD

B08E MINI LVDS

1KA1 81

TUNER
IF_OUT+ IF_OUTSCL 10 11 6 (I2C) DIF_N DIF_P 29 30

61

TSO_CLK

7L00 SL24016IRTZ PX1 RXO ASIC_CS

VGL_-6V VGH_35V CS(1-12) VH

79 78 72 61 50

60 TSO_DATA0 AGCCNTI 9

LEVEL SHIFTER

7 SDA 9 IF_AGC RF_AGC 3

LLV(0-7) PX2 RXE VCC_3V3

13 34 33 12 11 10

TO DISPLAY (TCON ON SSB)

B04C

RF_AGC_SW

7217 RF_AGC_SW

VLS_15V6

B06C ANALOG I/O - VIDEO

SY0N
2C15

B06B ANALOG I/O - AUDIO

3B08 Y0N AT29

B06B AUDIO-VIDEO

B08C P GAMMA &

VCOM & NVM
7K00 ISL24837IRZ REF VOLTAGE GEN VL/VH

VL

2 1 1KA2 81 79 78 72

SOY0

1C02 Y CVI-1 PB PR 12 9 7 SC1_G SC1_B SC1_CVBS_OUT 5C05 5C04 5C03

SY0P SPB0P SPR0P

3B07 3B09 3B11

Y0P PB0P PR0P

AR28 AP29 AU30 AK22

Y0P PB0P PR0P PBR0N SOY1

MT5363

VGL_-6V VGH_35V

VH RLV(0-7)

61 50 13 34 TO DISPLAY (TCON ON SSB)

1C01 Y CVI-2 PB PR 1C03 AVIN CVBS 12 9 7 SY1P_SC2 PB1P_SC2 PR1P_SC2 5C02 5C01 5C05
2C06

SOY1-AV2 SY1P SPB1P SPR1P SY1N

3B00 3B01 3B03 3B05 3B02

AP25 AU26 AT27 AP27 AR26

VCC_3V3 Y1P VLS_15V6 PB1P PR1P Y1N VL

33 12 11 10 2 1

B04C CONTROL 2 CVBS_AV3

2C06

AP35 GND_CVBS AR36

B06D USB
1D01 1 AR10 AU10 USB_DM USB_DP 2 3 4 USB 2.0 CONNECTOR SIDE SW UPLOAD JPEG MP3
3 2 1

CVBS_2P CVBS_0N

B06E VGA
10 5 15

USB_DM USB_DP

1E01 1 2 3 13 14 VGA_R VGA_G VGA_B H-SYNC V-SYNC

2E08 2E03

VGA_Rp VGA_Gp VGA_Bp

RP GP BP HSYNC VSYNC SOG GN

AT25 RP AU24 GP AT23 BP AR22 HSYNC AU22 VSYNC AP23 AR24 SOG COM PDD

B04C FLASH & EJTAG & DISPLAY INTERFACE

7708 NAND01GW3B2CN6F

VGA CONNECTOR

11

NAND_PDD(0-7)

FLASH 1G

B05 HDMI & MUX

1902 1 3
1 2

B05 HDMI M_RX2_2 M_RX2_2B M_RX2_1 M_RX2_1B M_RX2_0 M_RX2_0B M_RX2_C M_RX2_CB AP19 AT19 AR18 AU18 AP17 RX1 AT17 AR16 AU16 B04B DRAM

B04B DDR
RDQ
RDQ(0-15)

9 10 12 1901

19 18

7600 H5PS5162FFR

RDQ(16-31)

4 6 7

RDQ(0-31)
7601 H5PS5162FFR

HDMI 2 CONNECTOR

SDRAM 512Mb
VDD

SDRAM 512Mb
VDD

1 3
1 2

M_RX1_2 M_RX1_2B M_RX1_1 M_RX1_1B M_RX1_0 M_RX1_0B M_RX1_C M_RX1_CB

4 6 7 9 10 12

AP15 AT15 AR14 AU14 AP13 RX2 AT13 AR12 AU12 RA

A1 RA(0-13)

A1

HDMI 1 (SIDE) CONNECTOR

19 18

+1V8_SW

18980_401_100329.eps 100402

2010-Apr-06

Block Diagrams

LC10.1L LA

9.

EN 39

Block Diagram Audio AUDIO

B02A TUNER
1201 VA1E1BF2403 +B 8 +5VTUN_DIG 5207 7302 TC90517FG 58 TSO_VALID DIGITAL DEMODULATOR 59 TSO_SYNC 10 11 6 DIF_N DIF_P (I2C) 29 30 61 TSO_CLK G34 H33 F35 H35

B04 MT5363:
7700 MT5363BHMG B04C MAC-CI CI_MIVAL CI_MISTRT CI_MCLKI CI_MDIO B04C CONTROL IF_AGC 7218 RF_AGC M31 M33 AGC_IF AGC_RF AL_L AR_R V37 u36 B06B ALI_ADAC

B06B ANALOG I/O - AUDIO

B03 CLASS-D & MUTING

TUNER
IF_OUT+ IF_OUT-

7B01 PREAMPL PREAMPR AOUTL AOUTR 5 6

7400 TPA3123D2PWP 22 LEFT_SPEAKER 5406

SCL 7 SDA 9 IF_AGC RF_AGC 3

60 TSO_DATA0 AGCCNTI 9

1735 1 2 3 4 SPEAKER RIGHT SPEAKER LEFT

CLASS D POWER AMPLIFIER

B04C MUTE RESET_AUDIO SW_MUTE STANDBY A_STBY 4 6 15

GND-AUDIO RIGHT_SPEAKER

B04C

RF_AGC_SW

7217 RF_AGC_SW
B06B ALI_DAC

B04C B04C

74087410 B04C DC_PROT DC-DETECTION

B06B ANALOG I/O - AUDIO

1B01 1 ASPDIF_OUT J28

ASPDIF

MT5363
B04C CONTROL

1B02

2 3 1

DVI_AUL_IN DVI_AUR_IN

AC36 AC37

AIN_AADC_3_L AIN_AADC_3_R

B06D USB
1D01 1 AR10 AU10 USB_DM USB_DP 2 3 4 USB 2.0 CONNECTOR SIDE SW UPLOAD JPEG MP3
3 2 1

B06C ANALOG I/O - VIDEO

1C12 AV IN AUDIO L/R 5 3 AIN1_L-SC1 AIN1_R-SC1 3B28 3B27 AIN1_L AIN1_R V30 V29 AIN1_L AIN_1_R USB_DM USB_DP

CVI-1

B04C FLASH & EJTAG & DISPLAY INTERFACE

1C13 5 CVI-2 AV IN AUDIO L/R 3 AIN0_L-SC2 AIN0_R-SC2 3B30 3B29 AIN0_L AIN0_R V28 V27 AIN_0_L AIN_0_R PDD NAND_PDD(0-7) 7708 NAND01GW3B2CN6F

FLASH 1G

1C11 5 AVIN AV IN AUDIO L/R 8 AV3_L_IN AV3_L_IN U29 U28 AIN_2_L AIN_2_R B04B DRAM

B04B DDR
RDQ RDQ(0-31)
7600 H5PS5162FFR

B05 HDMI M_RX2_2 M_RX2_2B M_RX2_1 M_RX2_1B M_RX2_0 M_RX2_0B M_RX2_C M_RX2_CB AP19 AT19 AR18 AU18 AP17 RX0 AT17 AR16 AU16 RA

RDQ(16-31)

RDQ(0-15)

B05 HDMI & MUX

1902 1 3
1 2

7601 H5PS5162FFR

VDD

9 10 12 1901 1 3

19 18

A1 RA(0-13)

HDMI 2 CONNECTOR

VDD A1 +1V8_SW

4 6 7

SDRAM 512Mb

SDRAM 512Mb

M_RX1_2 M_RX1_2B M_RX1_1 M_RX1_1B M_RX1_0 M_RX1_0B M_RX1_C M_RX1_CB

4 6 7 9 10 12

AP15 AT15 AR14 AU14 AP13 RX1 AT13 AR12 AU12 18980_402_100329.eps 100402

HDMI 1 (SIDE) CONNECTOR

19 18

1 2

2010-Apr-06

Block Diagrams

LC10.1L LA

9.

EN 40

Block Diagram Control & Clock Signals CONTROL + CLOCK SIGNALS

B04 MT5363
7700 MT5363BHMG B04B DRAM RDQ RDQ(0-15) RDQ(0-31) RDQ(16-31)
7600 H5PS5162FFR 7601 H5PS5162FFR

B04B DDR

B08A TCON CONTROL

7J00 ISL97653AIRZ 7601 H5PS5162FFR

TCON CONTROL
TDQ(0-15) TA(0-12) TCK TCK# L2 L1 A1 1H00 27M OSC_IN SLOPE T16

LLV(0-7)

B08E

SDRAM 512Mb

MT5363
RA CLK CLK CLK CLK AD1 AD3 B3 A2 RCLK1 RCLK1# RCLK0 RCLK0#

SDRAM 512Mb

SDRAM 512Mb

RLV(0-7) GSLOP

B08E

B08B

J8 K8 RA(0-13)

J8

K8

B08D MPD
B1 OSC_OUT 7L00 SL24016IRTZ

B08C B08A

RESET 50Hz_60Hz

T9 U9

RST RTC50_60

CS

ASIC_CS

LEVEL SHIFTER

CS(1-12)

B08E

B04C CONTROLLER
B08C B02A B03 B06D B06D B02B BYPASS_MODE RF_AGC_SW DC_PROT USB_PWR_EN USB_OCP RESET_DEMOD B23 B29 AG6 G30 E30 A30

B04C GPIO GPIO_32 GPIO_9 GPIO_42 GPIO_5 GPIO_6 GPIO_3 GPIO_7 GPIO_35 GPIO_24 GPIO_41

B04C FLASH & EJTAG & DISPLAY INTERFACE

H29 A22 D28 AG4 POWER-OK EDID_WC LCD-PWR-ONn LAMP-ON B06 B07E B04C B01A B01A

B08C P GAMMA & VCOM & NVM

7K00 ISL24837IRZ

VH VL

B08E B08E

7708 NAND01GW3B2CN6F B04C CONTROL NAND_PDD(0-7)

P GAMMA
25 26 OUTCOM INCOM

PDD

FLASH 1G

OUTCOM OUT12

VCOM BUFER

VCOM

B08E

2701 SDM 2700 PANEL

B25

GPIO_26

OUT12

24

CS_L

B08B

A26

GPIO_21 OPWM_2 C5 PWM-DIMMI B01

1701

AJ36 1700 54M

XTAL1 U0_RX

AT21 AP21

3 2 1 7710 STANDBY B01

AJ34

XTALO

U0_TX

UART SERVICE CONNECTOR

1M20 3 2 5 TO IR/LED PANEL 6 AND KEYBOARD CONTROL 4 7 +3V3STBY

RC

AN22

OIRI

OPWRSB HDMI_CEC OPCTRL_0

AH14 AN14 AM21 AU20 AR20

STANDBYn HDMI_CEC POWER_DOWN MUTE SW_MUTE B05 B04C B03 B03

LED-1 LED-2 KEYBOARD

AL36 AM37 AM35

ADIN_SRV_5 ADIN_SRV_4 ADIN_SRV_2

OPCTRL_4 OPCTRL_3

B06D USB
7D00 TPS2041BD OUT EN OC USB_PWR_EN USB_OCP B04C B04C

USB_DP0 3

USB_DP0

3 2

+3V3STBY 7701 BD45292G 5 VDD 4 VOUT

1D01 1 ORESET AL22 ORESET USB_DM0 AJ5 AK5 USB_DM0 2 3

1

USB 2.0 CONNECTOR SIDE

18980_403_100329.eps 100402

2010-Apr-06

Block Diagrams

LC10.1L LA

9.

EN 41

Block Diagram I2C

IC
B04C
CONTROLLER

B04C

CONTROLLER

7700 MT5363BHMG B04C CONTROL AP1 OSDA_0 OSCL_0 AP3

+3V3_SW

3719

3718

SDA-MAIN SCL-MAIN

3717

3716

+3V3_SW 6

3772

3773

7703 GPIO_44 AH1 SYS_EEPROM_WE 7708 NAND01GW3B2CN6F 7

5 7702 M24C64

4701 4702

1703 2 3 1 4 6

MT5363
PDD NAND

EEPROM (NVM)
ERR 15

FLASH 1G

MAIN NVM SW

+3V3STBY FOR DEBUGGING ONLY

3746

3747

3727 3728

3749 3748

1701

3 2 1

UART SERVICE CONNECTOR

B2B

DIGITAL Demod

B02A

TUNER

B08A

TCON CONTROL

B08C

P GAMMA & VCOM & NVM

+3V3STBY

3746

3747

1K00 TUNER_SDA TUNER_SCL ROM_SDA ROM_SCL 3 2 5

N34 TUNER_DATA TUNER_CLK N36

3K56

3K55

3352

3351

B04C 6 7 VCC_3V3 B08A

BYPASS_MODE

B04B DRAM RDQ

B04B DDR
RDQ(0-31)
7600 H5PS5162FFR 7601 H5PS5162FFR

46

45 14 12 FE_SDA FE_SCL

R7

P7

5 7K04 M24C64

WP_TCON RESET

4 6

7302 TC90517FG DIGITAL DEMODULATOR

7H01 VPP1501BFG TCON CONTROL 6

3K40

SDRAM 512Mb
VDD

SDRAM 512Mb
VDD

3230

3228

3K41

EEPROM

SDA-TCON SCL-TCON

10 9 RES DEBUG ONLY

1201 VA1E1BF2403 MAIN TUNER

ERR 16

12

13

RA

RA(0-13)

B06E

VGA DC_5V

7K03 SL24837IRZ I2C SWITCH SDA_VGA SCL_VGA 2 1

7K00 ISL24837IRZ VOLTAGE GENERATOR

B05

HDMI & MUX

HDMI_PLUGPWR2

3E21

1E01
10 15

3907

3908

1901
1 6

12 15

4E03 4E02

HDMI_SDA2 HDMI_SCL2

AL12

SIDE_HDMI_SCL1 HDMI_PLUGPWR2

15

HDMI 1 (SIDE) CONNECTOR

VGA CONNECTOR
1902 16 15

11

AL14

SIDE_HDMI_SDA1

16

3E22
5

3915

HDMI_SDA1 HDMI_SCL1

AN18 AM17

HDMI_SDA2 HDMI_SCL2

3916

7E00 M24C02

HDMI 2 CONNECTOR
B04C EDID_WC

EEPROM 7E01 7 EDID SW SW SW SW

7900 M24C02 EEPROM EDID SW

7901 M24C02 EEPROM EDID SW

Programmable via USB Programmable via ComPair Pre-programmed device

18980_404_100329.eps 100402

2010-Apr-06

Block Diagrams

LC10.1L LA

9.

EN 42

Supply Lines Overview

SUPPLY LINES OVERVIEW
B01
1M99 1 1M99 1

DC - DC

B06B B03
+12VDISP B04d B01 B01 B01 B01 +5V_SW +12VS +24VAUDIO

ANALOG I/O - AUDIO

B08D
+3V3_SW +12VS B08c B08b

MPD
VREF_15V2 +VDISP

CLASS-D & MUTING

+3V3STBY B01 +5V_SW +12VS +24VAUDIO B01 VREF_15V2 +3V3_SW +12VS +VDISP

+3V3STBY

2 3 4 5 6 7 8

2 3 4 5 6 7 8 9

LAMP-ON BACKLIGHT-PWM BACKLIGHT-BOOST

B06D
B04C CONTROL B04C CONTROL B04C CONTROL B01 B01 +5V_SW

USB
+5V_SW B08b B08b

B08E
VGL_-6V

MINI LVDS
VCC_3V3 VGL_-6V VGH_35V VLS_15V6

VCC_3V3

B04A

MTK POWER

VGH_35V

B06E
+1V0_SW +1V0_SW SENCE+1V0_MT5363 +3V3STBY B01 +1V8_SW +1V8_SW +3V3_SW B01 B03,B04a,c,d, B05,B06a,b,d +3V3_SW B01 +3V3STBY B01 B01 +5V_SW

VGA
+5V_SW 1E01 18 DC_5V

B08b B08b

VLS_15V6

MAIN POWER SUPPLY

POWER-OK

B06D CONTROL

VGA CONNECTOR

1M99 1

1M95 1

+3V3STBY

2 3 4 5 6 7 8

2 3 4 5

STANDBY

B04A CONTROL

B08A B04B
DDR
+1V8_SW B08b

TCON CONTROL
VCC_3V3 5H02 5H03 VDD3V3LVRS VDD3V3IO VCC_1V8 5H00 VDD1V8 VDD1V8PLL DDR2VDD

VCC_3V3

+1V8_SW B01 +12VS B03,B04c,B06b

6 7 8

VCC_1V8

B04C
1,14 7103 TPS54386PWP 3 5117 Non Synchronous 5116 Converter 12
+5V_TUN B02a 6125 +5V_SW +3V3_SW B01 B02a,b,B03,B04c,d, B05,B06d,e B02b,B04a,c B06a,b +12V_1 B01 +5V N.C.

CONTROLLER
+3V3_SW

B08b

+3V3_SW

5H01 5H05

+3V3STBY

+3V3STBY +5V 1M20 5 8 VGH_35V

5H06 5H04 TO IR/LED B08b PANEL VGH_35V

5120

7116 TPS54386PWP 1,14 Non 3 5104 Synchr 511 Conv 12 7107

5118
IN OUT COM

+1V8_SW B04a,b +1V2_SW B02b +1V0_SW B04a B01 B01 +12VS +5V_SW +12VS +5V_SW

5119

B08B B04D
LVDS DISPLAY

TCON DC/DC

9 10

9 10 GND-AUDIO N.C.

+24VAUDIO B03 B01

+VDISP-INT +12VDISP 7800 5800 5801 +12VDISP +VDISP-INT B04d B08b 4J04 7J01 6J06 4J01

+VDISP-INT +VDISP VLS_15V6_B VLS_15V6 B08c,e

B08a,c,d

11

11

7802 LCD-PWR-ON
SENSE+1V0_MT5363 +3V3STBY B01

5802

SENSE+1V0_MT5363 B04a

+3V3STBY

7J00 ISL97653 10

3J10 3J26

VGL_-6V VGH_35V VCC_3V3 VCC_1V8

B08e B08a,e B08a,c,e B08a,b

B02A
B01

TUNER
+5V5_TUN B01

B05
+5V_SW 5225 +5VTUN_DIGITAL +5V_SW B01

HDMI & MUX

+3V3STBY +5V_SW 6900 6901 1902 18 HDMI_PLUGPWR1 HDMI_PLUGPWR2

+5V5_TUN

+3V3STBY

6J02 4J02 LCD 21 SUPPLY 3,4 5J00 3J12 39

7216
IN OUT COM

B01

+5V_SW 5222

B08C
B08b

P GAMMA & VCOM & NVM

+5VS

HDMI 2 CONNECTOR

PWR5V_2 B08b PWR5V_1

VCC_3V3 VLS_15V6

VCC_3V3 VLS_15V6

B02B
B01 +5V_SW

DIGITAL Demod
+5V_SW

HDMI 1 SIDE CONNECTOR

1901 18

7315
IN OUT COM

5324

+2V5_SW

B06A
+1V2_SW +3V3_SW B01

ANOLOG I/O - HEADPHONE

+3V3_SW

+VDISP B08b

7K00 ISL24837IRZ 32 VOLTAGE GENERATOR

VREF_15V2

B08d

+VDISP

B01 B01

+1V2_SW +3V3_SW

+3V3_SW

18980_405_100329.eps 100402

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 43

10. Circuit Diagrams and PWB Layouts

SSB: DC-DC

B01
A

DC-DC
1 2 3 4 5 6 7 8 9 10 11 12 13 14

B01
A
1M99

+12VS_1

1M99 PIN ON 1 12V 5 3V 6 >1.5V 7 1.5V 9 3V

RES
2123 10u 2168 10u

STBY 0V 0V 0V 0V 0V

2198

100p

100p

100p

100p

100p

100p

100p

100p

100n 2125

+5V5_TUN
F132

2128

2127

2133

2131

RES 2129

RES 2130

2132

14

+5V_SW

6125 SS36 100u 16V 2154 22n

5117 22u

3135 1R0

I125

2152 33n

I126 2 3 5 7 9 10 11

PVDD1 BOOT1 SW1 EN1 FB1 ILIM2 SEQ BP GND

4

PVDD2 BOOT2 SW2 EN2 FB2

13 12 6 8

I127

2153 33n

I128

3136 1R0

I129

5116 22u 4K7 1%

F133 +3V3_SW

100K 1% 2170

3140

RES

3122

2155

I130

10p

2134

2135

7117 TPS54386PWP 1

2126

100n

F135

10n

1-2041145-2

+3V3STBY 2136

10n

2150 100u 16V

1 2 3 4 5 6 7 8 9 10 11 12

F102 F103 F104 F105 F106 F107 F108 F109 F110 F111 F112 3126 3127 3128 68R 68R 68R

+12VDISP

B04C
LAMP-ON BACKLIGHT-PWM BACKLIGHT-BOOST POWER-OK

2156

470p

I131

I132

VIA1 VIA2 GND_HS

15

16 17

2157

470p

C
3129 68R STANDBY

RES 2180

2146

3125

2137

2161

RES

RES

1n0

1K5

2160

18K 1%

4u7

SS34

SS34

100u 6.3V

2159 100u 6.3V

3107

3130

10p 2158

3138

2163

2162

3131

6124

6123

2164

10R

10R

10u

10u

2u2

10p

1n0

I134

I135

1M95 PIN 1 2 6 7 8 9

1M95 ON 3V3 0V 12V 12V 12V 25V STBY 3V3 3V 0V 0V 0V 0V 1 2 3 4 5 6 7 8 9 10 11 1-2041145-1 F113 F114 F115 F116 F117 F118 F119 F120 F121 F122 F123

1K0 1% RES

RES

1n0

+12VS

+24VAUDIO GND-AUDIO

5121 30R 5120 30R

RES

D
100n 2147 2149 100n 2148 100n
100n 2144 2145 1n0 1n0

2141

2142

+12VS

5103 10u

RES

F124

+12VS_1

100n

2185 100u 16V

2186 10u

2187 10u

GND-AUDIO GND-AUDIO GND-AUDIO

2143

RES

1n0

E
1 F125 5104 22u 3105 2188 I105 3108 I106 2167 33n I107 2 3 5 7 9 I122 10 11

7116 14 TPS54386PWP

E
2165 I118 3143 1R0 33n I119 5115 22u 220R 1% 3139 2166 10p I120 F131 +1V2_SW 5118 33R 5 2174 2173 2175 10u 10u 10u I138 7107-1 1 ST1S10PH 6

PVDD1 BOOT1 SW1 EN1 FB1 ILIM2 SEQ BP GND

4

PVDD2 BOOT2 SW2 EN2 FB2

13 12 6 8

I117

+1V8_SW
RES
1K2 1% 10p

1R0

SW

+12VS

INH SYNC A
4

VIN

SW VFB

7 3

I137

5119 2u0

F134 +1V0_SW

220u 25V

10K 1%

RES
470p 2139

3142

I104

VIA1 VIA2 GND_HS

15

16 17

GND P HS
8 9

2124

2181

2176

22u 2182

2138

470p

2151

2195

2196

RES
I139

100u

390R 1%

2192

3119

2193

4u7

10p

F
3106

I136 SS34 2191 3109 6103

I123 2140 100u 6.3V SS34 3145 6122 2197 7107-2 ST1S10PH 1K5 10 11 3133 3134

22u

4n7

22u

10n

22u

F
3144
SENSE+1V0_MT5363

2189

RES

2190

10R

1K2 1%

10R

10p

10u

10u

RES

6.3V

220R 1%
1K0 1%

VIA

G ROUND 4.02mm SCREW HOLE

1X02 REF EMC HOLE 1X04 REF EMC HOLE

G ROUND 4mm SCREW HOLE

1X05 EMC HOLE 1X06 EMC HOLE

SLOT SCREW HOLE

1X01 REF EMC HOLE 1X03 REF EMC HOLE

1
1M95 C10 1M99 A10 2123 B5 2124 F12 2125 B12 2126 B12 2127 B10 2128 B10 2129 B11 2130 B11 2131 B11 2132 B11 2133 B12 2134 B12 2135 B12 2136 C11 2137 C11 2138 F3

2
2139 F5 2140 F6 2141 D10 2142 D10 2143 D11 2144 D11 2145 D12 2146 C12 2147 D12 2148 D12 2149 D11 2150 B5

3
2151 F13 2152 C4 2153 C5 2154 C2 2155 C7 2156 C3 2157 C5 2158 D2 2159 C6 2160 C4 2161 C7 2162 D2

4
2163 D2 2164 D6 2165 E5 2166 F7 2167 E3 2168 B5 2170 C1 2173 F9 2174 F10 2175 F10 2176 F12 2180 C11

5
2181 F13 2182 F14 2185 E3 2186 E3 2187 E4 2188 F2 2189 F2 2190 F2 2191 F2 2192 F4 2193 F7 2195 F13

6
2196 F13 2197 F6 2198 B13 3105 F1 3106 F1 3107 D1 3108 E3 3109 F3 3119 F6 3122 C7 3125 C7 3126 B11

7
3127 B11 3128 B11 3129 C11 3130 D3 3131 D5 3133 F12 3134 F12 3135 C3 3136 C5 3138 D1 3139 F6 3140 C1

8
3142 F12 3143 E5 3144 F13 3145 F5 5103 D3 5104 E2

9
5115 E6 5116 C6 5117 C3 5118 E9 5119 E11 5120 D3 5121 D3 6103 F3 6122 F5 6123 D3 6124 D5 6125 C2

10
7107-1 E10 7107-2 F11 7116 E4 7117 B4 F102 A10 F103 A10 F104 A10 F105 B10 F106 B10 F107 B10 F108 B10 F109 B10

11
F110 B10 F111 B10 F112 B10 F113 C10 F114 C10 F115 C10 F116 D10 F117 D10 F118 D10 F119 D10 F120 D10 F121 D10

12
F122 D10 F123 D10 F124 D4 F125 E2 F131 E7 F132 C1 F133 C7 F134 E12 F135 B1 I104 F1 I105 E3 I106 E3

13
I107 E4 I117 E5 I118 E5 I119 E6 I120 E6 I122 F4 I123 F5 I125 C3 I126 C4 I127 C5 I128 C5 I129 C6

14
I130 C6 I131 C2 I132 C4 I134 C3 I135 C5 I136 F3 I137 E11 I138 E9 I139 F12

2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3139 123 6483

18980_500_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 44

SSB: Tuner

B02A

Tuner
1 2 3 4 5 6 7
F242 7219 2 3264 10K SI1013 I221 3265 1K0 I220 7217 BC847B 1 RES F243 3 100K 10K RES 2292 RES 3266 10n RES 3267 +5VIF
22u 2278 2277 1u0

B02A
8
B04C
RF_AGC_SW
+5V5_TUN 1

10
7216 LD29150DT50R

11

12

13
1201 B1 1211 E12 1213 E4 2213 B7 2225 C5 2226 B5 2228 E4 2229 E5 2230 E2 2231 E3 2232 E3 2233 E6 2235 F8 2236 G7 2237 G7 2240 G8 2243 H7 2244 H2 2245 H7 2246 H4 2247 H4 2250 H4 2251 I4 2252 I5 2258 C2 2262 C6 2263 C7 2277 A9 2278 A10 2279 A10 2280 A11 2281 A11 2282 A12 2283 B10 2284 B11 2285 C12 2286 C10 2287 C12 2288 C11 2289 C12 2290 D12 2291 D10 2292 A4 2293 B6 2294 C2 2295 B2 2296 C2 3223 A7 3224 B7 3228 C6 3230 B6 3231 E4 3232 E2 3234 E7 3235 G7 3236 G7 3238 H7 3241 H4 3244 H4 3246 I4 3247 I4 3254 G8 3255 G8 3261 C7 3262 C10 3263 D10 3264 A3 3265 A2 3266 A3 3267 A4 3268 B2 3269 A4 3270 B7 4208 B4 4209 D6 4210 H1 4211 I1 5207 B2 5212 E12 5213 E10 5222 A9 5225 A11 5226 C11 5227 C12 5228 C10 5229 C11 5230 C12 7212 E2 7213 F7 7216 A10 7217 A3 7218 B4 7219 A3 A210 E12 A211 E12 A212 C1 A213 C1 A214 C1 A225 C1 F201 B1 F202 B1 F203 B1 F204 B1 F205 B1 F206 B1 F207 B1 F208 B1 F209 C1 F213 B1 F214 E3 F215 F7 F216 E11 F227 G8 F235 A11 F236 A12 F237 E1 F240 I2 F241 I2 F242 A7 F243 A4 F244 B7 F245 C7 F246 C7 I220 A2 I221 A3 I222 A4 I228 E3 I230 E5 I231 E4 I232 E5 I233 E3 I234 E6 I235 E3 I237 F8 I238 F7 I239 G7 I240 G7 I242 H4 I243 H7 I244 H4 I245 H6 I247 H5 I249 H4 I251 H5 I254 A9 I255 F7
1 2010-01-22

IN

OUT COM

5225 33R

F236
+5VTUN_DIGITAL

+5VS

100n

2279

22u 2280

2281

2282

10n

22u

+5VIF AGND AGND 3269 1K0 I222 3223 8K2 RES

I254 +5V_SW 10u RF_AGC 2283 22u 2284 10n 5222 F235 +5VS

AGND AGND

AGND

AGND AGND

AGND

AGND

F213 1201 VA1E1BF2403 15 16

MT

AGND 7218 KTK5132E AGND 100p 3268 4208 RES

RF_AGC_EX

3270 10K 2293 2213 22u RES AGND F244 3224 39K RES 47n

AGND 1 2 3 4 5 6 7 8 9 10 11 12 F201 F202 F203 F204 F205 F206 F207 F208 F209 A212 A213 A214 2295

ANT_PWR NC1 RF_AGC NC2 AS SCL SDA +B IF_AGC IF_OUT+ IF_OUTIF_OUT_ANALOG

B02B
AGND
FE_SCL

AGND

AGND

TUNER

AGND 5207 2258 2296 100u 2294 47u 33R 100n AGND

3230 2226 100p

AGND 10R

+5VTUN_DIGITAL

MT

14

13

RES RES 2297 AGND

AGND 2225 100p

180p

2286

2285 27p 5227 220n 2288 33p

B04C
2287
VIP_ATV

3228

10R

F245

FE_SDA DIF_N

5226 220n 5228 330n 3262

C
A225

1n0

10n

C
VIN_ATV

AGND 2262 100p RES 2263 47n

3261 10K

F246

AGND AGND

IF_AGC

75R

5229
DIF_P

5230 220n 2290 27p

2289 10n

220n 2291 AGND DIF_N DIF_P 3263 75R 180p

AGND

Near Tuner

Near MTK5363

4209

RES

IF_ATV

D SAW FILTERS
Reserved Reserved

DEMODULATOR
RF_AGC F237 3232 470n 2231

I228

3231 AGND 1213 4M0 330R 2228 1n5 I230 2229 +5VIF 22p 2233 3234 5213 390n 15R I232 1n0 I234 AFC 21 AGND I255 2235 10n AGND 3 AGND F216 1 1211 I IGND GND OFWM1971M 45M75 5212 RES O1 O2 4 5 A210

220n

2232

AGND F214

I231

E
7212

100R RES 2230 22n AGND TAGC 14

VIF1 VIF2

A211

I233

I235

AGND

VAGC 16

VPLL 19

TDA9886/V3

TOP

REF 15

0V

TUNER AGC

VIF AGC

RC VCO

DIGITAL VCO CONTROL

AFC DETECTOR
AGND

VIF2 VIF1

2V 2V

2 1

VIF2 VIF1

VIF-PLL

SOUND TRAPS 4.5 to 6.5 Mhz

CVBS

17

F215

Note: DIA 1.2MM FT Test Keep spaceing 3.5mm

2V1

7213 BC847B

1V5 2V 2V
24 23 SIF2 SIF1 3235

10n AGND

1R0

SINGLE REFERENCE QSS MIXER INTERCARRIER MIXER AND AM-DEMODULATOR MAD

AUD

8 I238 5 2236

I237

AUDIO PROCESSING AND SWITCHES

DEEM

B06B
3254 F227 CVBS_RF 75R

I239

220R

3236

SUPPLY

SIF AGC

OUTPUT PORTS

I2 C-BUS TRANSCEIVER
12 SIOMAD

470n AGND

18 AGND

10 SDA

22 OP2

13

11 SCL

4 FMPLL

7 DGND

3 OP1

VP

NC

2V3

20

2244 AGND 10n

I244 1n0 1n0

I242 AGND

2V1

+5VIF

2243 10n 2245 390p

I243

AGND 3238 5K6

I245

2246

2247

H
FE_SCL RES TUNER_SCL TUNER_SCL

AGND I249 AGND RES 2250 AGND

TUNER_SDA

47p

AFD

3255

75R 2240

NARROW-BAND FM-PLL DEMODULATOR

I240

2237

AGND I247

H
RE_AGC Int ATD 10K 47n TDA9886 RE_AGC 8k2 39k 0R 22u 3223 3224 4211 2213

AGND

3241 100R I251 3244

4210
FE_SDA RES TUNER_SDA

4211

RES 2251 AGND F240 3246 1R0

100R

SIF_OUT

I
SIF_OUT_GND F241

I
2252 15p

3247 1R0 AGND

10

11

12

13

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_501_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 45

SSB: Digital Demodulator

B02B

Digital Demodulator
1 2 3 4 5 6 7 8 9 10 11
1301 D3 2301 C6 2302 C6 2303 C6 2304 C6 2305 C7 2306 B6 2307 B6 2308 B6 2309 B6 2310 B7 2311 C6 2312 C6 2313 C7 2314 C3 2315 C3 2316 D7 2317 D6 2318 C3 2319 C3 2320 B3 2321 B3 2322 B4 2332 F7 2333 D2 2334 D3 2335 D6 2336 E3 2337 E3 2338 E3 2339 E3 2340 E3 2341 E2 2372 A2 2373 A2 2374 A3 2375 A3 2376 A4 2377 E3 2378 E3 3331 E1 3332 E2 3335 H7 3336 H7 3337 F3 3339 F6 3343 H7 3344 H7 3349 F3 3350 G7 3351 G3 3352 G3 3353 E6 3354 D6 3355 D10 3356 D9 3357 E6 3358 E6 3359 E6 3360 G7 4300 H8 4301 H8 4303 E2 4304 E2 4305 G10 4306 G10 4307 H10 4308 H10 4309 H11 4310 H10 4311 H11 5301 B7 5302 B7 5303 C7 5304 C3 5305 D7 5306 B3 5307 B3 5308 E2 5309 H10 5310 H10 5311 H11 5323 A1 5324 A3 6301 D10 7301 D9 7302 D4 7315 A2 F300 G2 F301 G2 F302 H7 F303 H7 F305 A4 F306 G7 I300 B4 I301 B4 I302 C4 I303 B5 I304 B5 I305 C5 I306 D6 I307 D3 I308 D3 I309 E4 I310 E4 I311 E4 I312 E4 I313 E4 I314 F4 I315 F4 I316 G4 I317 G4 I318 F3 I319 D6 I320 D6 I321 E6 I322 E6 I323 E6 I324 E6 I325 F6 I327 H7 I328 H7 I336 A2 I337 A3 I338 H10

B02B

7315 LD1117DT25 5323 +5V_SW 33R 100u 16V 2373 2372 100n

I336

I337
3

IN

OUT COM

2 47u 16V

5324 33R

F305
+2V5_SW

100n

2374

2375

2376

100n

DGND DGND

DGND

DGND

DGND

DGND

+2V5_SW 5307 I300 I303 5302 30R 2320 2321 100n 2322 100n 2309 100n 2307 100n 2308 100n 2306 2310 1u0 10n 1u0

+1V2_SW

30R

B
+3V3_SW

5306 30R

AGND

AGND

AGND

I301

I304

DGND DGND DGND DGND

DGND

5301 30R

100n 2302

100n 2303

2319

100n

100n 2304

2301

100n

2318

2305

1u0

1u0

+1V2_SW

5304 30R

AGND

AGND

I302

I305

DGND DGND DGND DGND

DGND

5303 30R

C
+2V5_SW

100n

2314

2315

100n 2312

2311

100n

2313

1u0

DGND

DGND

I306

1u0 5305 30R

DGND DGND

DGND

2317

100n

1u0

1 2333

3 2334 18p

2316

1301

FOR DEVELOPMENT USE 7301 BC847BW 3356 6301 SML-310 DEB DEB DGND 3355 +3V3_SW 1K0 DEB

D
B04A
DIF_P

18p

4 2

25.4M

7302 TC90517FG AGND AGND I307 19 I308 18 3 2 RES 5308 1n2 2341 100n DGND 2339 2340 2377 2378 3331 2K7 3332 2K7 AGND 2336 2337 2338 100n 100n 100n 100n 100n 1u0 1u0 I309 I310 I311 I312 I313 30 29 28 27 24 25 26 39 DGND + 3 V 3_S W 40 8 I X O

16 36 56 63

13 35 49 64

32

34 48

22

20

43

DGND 21 58 53 54 55 59 52 61 60 38 9 10 51 I325 3339 20K I323 I324 3358 1 3359 1 I321 I322 3353 3357 1 33R I319 I320 2335 3354 1 1n5 33R 2

DGND

AD_DVDD

AD_AVDD

VDDC

VDDS

DR1VDD

DR2VDD

PLLVDD

B04C
FIL AGND TSO_VALID

1K0 DEB

PBVAL RERR RLOCK

4 3 03 RES

0 XSEL 1 P ADI_AI N P ADQ_AI N P AD_VREF N AD_VREF DTCLK DTMB S_INFO 0 TSMD 1 AGCI CKI AD_DVSS AD_AVSS PLLVSS SCL SDA

DIF_N

4304

RSEORF SBYTE SLOCK SRCK SRDT STSFLG1 AGCCNTI AGCCNTR STSFLG0 SYRSTN SLADRS 0 1

33R 2

TSO_SYNC

33R 2 33R 2

TSO_CLK TSO_DATA0

AGND AGND AGND AGND

IF_AGC

2332

B04C
TUNER_SCL TUNER_SDA

3337 I318

10K

I315

42 6 5 12 14

7 11

AGND +3V3_SW

F300 F301

3351 3352

100R 100R

I316 I317

45 46

TN VSS 4 15 33 37 44 47 50 57 62

SCL SDA

31

23

17

3350

4K7

100n

DGND

3349

10K

I314

1 41

RES
RESET_DEMOD

AGND

AGND DGND

F306

G
4305 4306

DGND

3360

4K7

RES

3335

10K 3336

10K

DGND

DGND 4308

4307

I327 I328 +3V3_SW

4309

4310 5309 I338

4311 5311 30R

H
3344 3343 2K7 2K7

B02A
4300 4301
FE_SCL FE_SDA

30R 5310 30R AGND DGND

F302 F303

10

11
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_502_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 46

SSB: Class-D & Muting

B03
1

Class-D & Muting

2 3 4 5 6 7 8 9 10 11
1402 B10 1403 C10 1735 B11 2400 B5 2401 B5 2402 B6 2403 B6 2404 B4 2405 B4 2406 B4 2407 C4 2408 C4 2409 C4 2411 B6 2412 C6 2413 B8 2414 B8 2415 C8 2416 C8 2417 D7 2418 D7 2419 B11 2420 B10 2421 B11 2422 F4 2423 G4 2424 F6 2425 G6 2426 D9 2427 D10 2430 E9 2431 F9 2432 G3 3400 A3 3401 B4 3405-1 B7 3405-2 B7 3405-3 B7 3405-4 B7 3406-1 D7 3406-2 D6 3406-3 D6 3406-4 D6 3408 F2 3409 F2 3410 F2 3411 E3 3412 E3 3413 E3 3414 F3 3415 F3 3416 F4 3417 G5 3418 E5 3419 F5 3420 F7 3421 G7 3422 C9 3423 D9 3424 D9 3425 D10 3426 F5 3427 G6 3428 F6 3430 E9 3431 E9 3432 E9 3433 E8 3434 F9 3435 F9 3436 D4 3437 G2 3438 G3 3439 G4 4401 E5 5400 A5 5401 A6 5402 C7 5403 C7 5404 C8 5405 C8 5406 B10 6400 E2 6401 F3 6402 F5 6403 H2 7400-1 B5 7400-2 D3 7401 A4 7402-1 E3 7402-2 F3 7403 E5 7404 F6 7405 F5 7406 F7 7407 G7 7408 C10 7409 D10 7410 D11 7411 E9 7412 E10 7413 F10 7414 H3 F400 A4 F401 B2 F402 C2 F404 B11 F405 B11 F406 B11 F408 E2 F409 E5 F410 C10 F411 C2 F412 C2 F413 F3 F414 G2 F415 E7 F416 E4 F417 G2 I401 B5 I403 C4 I405 C4 I406 C4 I407 C4 I410 B3 I411 A5 I412 A6 I413 B6 I414 C6 I415 C7 I416 C7 I417 C7 I418 C7 I419 C8 I420 C8 I421 B4 I422 F2 I423 F2 I424 E3 I425 E3 I429 F5 I430 F5 I431 F7 I432 G7 I433 E4 I434 C9 I435 E8 I436 E9 I437 F9 I438 D10 I440 E5 I441 F6 I442 F9 I443 G3

B03

+24VAUDIO

A
220R 3
+24VAUDIO

A
2 3400 4R7 220u 35V 2401 2400 7401 BC847BW F400 I411 I412 220u 35V 22K 22K 22K 22K 220R 5400 5401 GND-AUDIO 2402 220n LEFT_SPEAKER

220n

2403

1402

2419

2405

2413

220n 2414

220n

220n

I410

22K

I421

10u 35V 2404

10n

3401

V_NOM

1735 F404 F405 F406 1 2 3 4 2041145-4

5406 220R GND-AUDIO 2420 2421 10n 10n

3405-4

3405-2

3405-3

19 20

AOUTR

I401 47n 6

1 3

AVCC

10 12

F401

2406

7400-1 TPA3123D2PWP

R PVCC BSR R OUT L 16 15 22 21 I414 2412 22u 220n I413 2411 I415 220n 22u I416 5403 I418 5402 I417 5404 220R 5405 220R I420 I419 2415 25V 220u 2416 25V 220u LEFT_SPEAKER RIGHT_SPEAKER V_NOM 1403 RIGHT_SPEAKER

R IN L 0 GAIN 1 VCLAMP BYPASS MUTE SD

AOUTL

F402

2407 47n

I403

5 18 17

CLASS-D AUDIO AMP

B04C
MUTE A_STBY

BSL

3405-1

B04C

GND-AUDIO

GND-AUDIO

GND-AUDIO

2408 2409

1u0 I405 1u0 I406 I407

F411 F412

11 7 4 2

C
3422 100K I434 100K 4u7 4u7 7408 BC857BW F410

22K

22K

22K

PGND 3436 4K7 AGND 8 9 L 23 24 R 13 14 GND_HS 25

22K

B04C
DC_PROT

2417

2426

3424

7400-2 TPA3123D2PWP

2427

40 39 38

GND-AUDIO 4 3 2 1 3406-3 3406-4 3406-2 3406-1

220n 2418

220n

3423 100K

I438

7409 BC857BW 7410 BC847BW 100K 3425

D
GND-AUDIO

26 27 28 29

VIA VIA

+3V3STBY

VIA
VIA

VIA

37 36 35 34

GND-AUDIO

D
GND-AUDIO

GND-AUDIO
+12VS

GND-AUDIO

GND-AUDIO

3418

1K0

GND-AUDIO
+12VS +5V_SW F408 1 6 I424 3412 1K0

30 31 32 33

DC-DETECTION

F415
2430 3430

F416

RESERVED
RES
3431 47K 4n7

7403 BC847BW 3 2 F409 I425 3413 1K8 4 I433 470u 16V 4401 1

I435

E
BAS316 RES 6400

I440

7402-1 BC857BS(COL)

47K 1

E
7412 2SD2653K

2 7411 BC857BW 3 I436

3433

10K

3411 3410 4K7 4K7 I423 5

RES
2 2424

3432 1K0

B06A
HP_LOUT

RES

3420

I422

56K RES 3408

6402 BAT54C I429

I430

BC857BS(COL) 7402-2 3

3426 47K 1 3419 10K 2

47K

4n7

RES 3409

2422

HP_ROUT

I442 RES
2431 3434 3428 1K0 I431 7406 2SD2653K 47K 4n7

47K

B06B
AOUTL

F413

6401 BAS316 +3V3STBY RES 3416 100K 7405 BSS84

7404 3 BC857BW

F
7413 2SD2653K

3435 AOUTR 1K0

I437

100K

RES 3414

RES 3415 1R0

I441
2425

RES

3421

SW_MUTE

F414 2423 100n +3V3STBY

3417

10K

3427 1K0

I432 7407 2SD2653K

G
RESET_AUDIO

47K

4n7

3439

F417

3K0 3438 22K 2432 1u0

10K

3437

I443

A_STBY

7414 BC847BW
BAT54C 6403

H 1

H 3 4 5 6 7 8 9 10 11

2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_503_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 47

SSB: MTK Power

B04A
1

MTK Power
2 3 4 5 6 7 8 9 10 11

B04A
2500 C8 2501 C8 2502 C8 2503 C9 2504 C9 2505 C9 2506 C9 2508 D8 2509 D9 2510 D9 2512 D9 2513 D9 2514 B8 2515 B8 2516 B8 2517 B8 2518 B8 2519 B9 2520 B9 2521 B9 2522 B9 2523 F9 2524 F9 2525 F9 2526 F9 2527 F9 2528 F9 2529 F8 2530 F8 2531 F8 2532 F8 2533 F8 2534 F8 2535 F8 2536 F8 2537 F8 2538 F8 2540 F7 2541 F7 2542 F7 2543 F7 2544 F7 2545 F7 2549 F7 2550 F6 2551 F6 2552 B4 2553 B4 2558 B5 2559 B5 2560 B5 2561 B5 2562 B5 2563 B5 2564 B5 2565 B6 2566 B6 2567 B6 2568 C3 2569 E3 2570 E4 2571 C3 2573 C3 2574 C4 2575 C4 2576 C4 2577 C3 2579 E4 2580 C4 2581 C3 2582 C3 2584 C3 2588 C3 2592 D3 2593 E3 2595 E3 2596 E3 2597 D4 2598 C5 2599 D4 3500 B5 5500 B6 5501 B3 5502 D3 5503 D3 5504 D3 5505 E3 5506 A8 7700-7 C5 7700-8 A10 F500 B3 F501 F6 F502 B6 F503 B8 I502 D3 I503 B5 I504 C5 I505 D4 I506 D4 I507 E3

+3V3_SW

A
7700-8 MT5363BHMG
F503

5506

30R

F502

5500 +1V2_SW 100n 100n 100n 100n 100n 100n 100n 100n 30R

2514

4u7

+3V3_SW

2515

2516

2517

2518

2520

2521

2562

2561

2553

2559

2558

2563

2564

2552

2560

2565

2566

B
5501 30R F500

2519

2522

H23 H31 J30 V31 W32 W34 W36 AF13 AF15

POWER-MAIN
VCCIO33 DVSS

VCCIO33-1

DVSS

3500 1R0 7700-7 MT5363BHMG

I503

4u7 +1V8_SW 2598

2588

4u7

I504

2576

2568

2577

2575

2574

POWER-MISC
100n 100n 100n 4u7

2500

2503

2502

2505

2501

100n

100n

2508

2509

2510

2512

2513

AVDD33 AVSS33
5502 5503 30R 30R

100n

100n

100n

AH33 AG30 AP11 N16 P13 AM25 AG32 AF29 AL10 N18

ADCPLL APLL HDMI LVDS MEMPLL RGB SYSPLL TVDPLL USB VPLL

LVDS MEMPLL PLL_1 PLL_2 RGB USB VPLL

P17 T13 AH29 AH31 AN26 AM9 P19

2504

2506

C
100n 100n 100n 100n 2581 2584 2580 2582

AM23

AVDD10_LDO AVDD12 AVSS12

I505 I506

2597

2599

+3V3STBY

2592 2593

1u0 100n

1u0

1u0

5504 30R

I502

5505 30R +3V3STBY 2595 2596 10u 100n

I507

Y31 AF33 T31 AN32 AG34 AK31 AM13 F15 H15 W30 AL30 AM11 AN30 AN24 AK35

AADC ADAC0 ADAC1 CVBS DEMOD1 DIG HDMI LVDS_1 LVDS_2 REF_AADC SIF USB VDAC VGA_STB XTAL_STB

AADC ADAC0 ADAC1 CVBS DEMOD1 DIG HDMI LVDS REF_AADC SIF USB_1 USB_2 USB_3 VDAC VGA_STB XTAL

Y33 AE34 U30 AR32 AG36 AJ30 AN12 J18 Y29 AK29 AP9 AT9 AT11 AR30 AL24 AK37

B1 B13 C2 C12 D3 D13 E4 E12 E14 F5 F13 G6 G14 H7 J14 R2 R4 R6 AC6 AD5 AD7 AE2 AE4 AF1 AF3 R16 U14 V13 Y13 Y15 AA14 AD15 AD17 AD19 AE14 AE16 AE18 AG12 AH7 AJ6 AJ8 AK5 AK7 AL2 AL4 AL6 AL8 AM1 AM3 AM5 AM7 AN2 AN4 N22 N24 T25 V25 W24 Y25 AA24 AB25 AE20 AE22

VCC2IO DVSS

100n

100n

100n

VCC2IO DVSS

VCC2IO DVSS

VCC2IO DVSS

VCC2IO DVSS

DVSS VCCK

DVSS VCCK

DVSS VCCK

B01
SENSE+1V0_MT5363 F501

DVSS VCCK

+1V0_SW
100n 100n 100n 100n 100n 100n 100n 100n 100n 100u 6.3V 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 4u7

DVSS VCCK

2551

2531 2530 2529

2543 2542 2541

2534 2533 2532

2549

2537 2536 2535

2550

2545 2544

2525 2524 2523

2540

2538

2528 2527 2526

DVSS VCCK

DVSS VCCK

C8 D9 E8 F9 G8 G10 J4 J6 L4 L6 N14 P15 R14 R18 T15 T17 T19 U16 U18 V15 V17 V19 W4 W6 W14 W16 W18 Y3 Y17 Y19 AA16 AA18 AB13 AB15 AB17 AB19 AC14 AC16 AC18 AD13 AE8 AF9 B21 D21 E22 G22 N20 P21 P23 P25 R20 R22 R24 T21 T23 U20 U22 U24 V21 V23 W20 W22 Y21 Y23 AA20 AA22 AB21 AB23 AC20 AC22 AC24 AD21 AD23 AD25 AE24

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

2567

4u7

100n

100n

2573 100n

2571 1u0

100n

100n

100n

2569 100n

2570 100n

2579

4u7

10

11
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_504_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 48

SSB: DDR

B04B

DDR
1 2 3 4 5 6 7 8 9 10 11 12
2600 B9 2601 B9 2602 B9 2603 B9 2604 B9 2605 B10 2606 B10 2607 B10 2608 B10 2609 D9 2620 F9 2621 F9 2622 F9 2623 F9 2624 F9 2625 F10 2626 F10 2627 F10 2628 F10 2629 I9 2630 B1 3600-1 C6 3600-2 C6 3600-3 C9 3600-4 C6 3601-1 D6 3601-2 D6 3601-3 C6 3601-4 C6 3602-1 D6 3602-2 C6 3602-3 C6 3602-4 C6 3603-1 B6 3603-2 B6 3603-3 C6 3603-4 C6 3604-1 B9 3604-2 C6 3604-3 D6 3604-4 C6 3605-1 D6 3605-2 B6 3605-3 B6 3605-4 B6 3606-1 G6 3606-2 G6 3606-3 G9 3606-4 H6 3607-1 H6 3607-2 H6 3607-3 H6 3607-4 H6 3608-1 H6 3608-2 H6 3608-3 H6 3608-4 H6 3609-1 H6 3609-2 H6 3609-3 G6 3609-4 G9 3610-1 G6 3610-2 G6 3610-3 G6 3610-4 G6 3611-1 G6 3611-2 G6 3611-3 G6 3611-4 H6 3612 D6 3613 D6 3614 D6 3615 D10 3616 D9 3617 H6 3618 I6 3619 I6 3620 I10 3621 I9 3622 A1 3623 B1 3624 D1 7600 B7 7601 G7 7700-3 A2 F600 D9 F601 I9 F602 A2

B04B

+1V8_SW
3622 1K0 1% 1K0 1% 100n 3623 2630 F602 7700-3 MT5363BHMG

+1V8_SW

A
100n 100n 100n 100n 100n 100n 100n 100n 47u 16V

DRAM

N8 P7

1 RVREF 2 0 1 2 3 4 5 6 RA 7 8 9 10 11 12 13 0 1 RBA 2 RCLK0 RCLK1 RCKE REXTDN RODT RCS RWE RCAS RRAS

RA(0) RA(1) RA(2) RA(3) RA(4) RA(5) RA(6) RA(7) RA(8) RA(9) RA(10) RA(11) RA(12) RA(13) RBA(0) RBA(1) RBA(2) RCLK0 RCLK0# RCLK1 RCLK1# RCKE

N4 H5 M3 G4 M5 F1 M7 F3 P1 D1 G2 N2 E2 M1 H3 J2 H1 B3 A2 AD1 AD3 K1 AB5 N6 P3 K3 L2 P5

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 RDQ 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 0 1 2 3

D7 H11 E6 G12 H13 D5 F11 F7 B5 D11 A4 B11 A12 C4 A10 A6 AB1 U4 AC4 T1 T3 AC2 U2 AB3 Y5 T7 AA6 V7 V5 AA4 T5 Y7 E10 C10 V1 U6 B9 A8 B7 C6 V3 W2 Y1 AA2

RDQ(0) RDQ(1) RDQ(2) RDQ(3) RDQ(4) RDQ(5) RDQ(6) RDQ(7) RDQ(8) RDQ(9) RDQ(10) RDQ(11) RDQ(12) RDQ(13) RDQ(14) RDQ(15) RDQ(16) RDQ(17) RDQ(18) RDQ(19) RDQ(20) RDQ(21) RDQ(22) RDQ(23) RDQ(24) RDQ(25) RDQ(26) RDQ(27) RDQ(28) RDQ(29) RDQ(30) RDQ(31) RDQM(0) RDQM(1) RDQM(2) RDQM(3) RDQS(0) RDQS(0)# RDQS(1) RDQS(1)# RDQS(2) RDQS(2)# RDQS(3) RDQS(3)#

2601

2600

2602

2603

2604

2605

2606

2607

2608

7600 H5PS5162FFR-S6C RODT RCKE RWE# RCS# RRAS# RCAS# RBA(0) RBA(1) RA(0) RA(1) RA(2) RA(3) RA(4) RA(5) RA(6) RA(7) RA(8) RA(9) RA(10) RA(11) RA(12) RCLK0 3612 22R 1% 100R 3614 3605-2 3603-2 3603-1 3605-4 3605-3 3600-1 3603-4 3603-3 3600-2 3604-2 3602-4 3604-4 3602-2 3601-4 3602-3 3601-3 3600-4 3601-1 3604-3 3602-1 3601-2 3605-1 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R K9 K2 K3 L8 K7 L7 L2 L3 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 J8 K8 F7 E8 B7 A8

B
A2 E2 L1 R3 R7 R8 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 F3 J2 F600 1K0 1% 2609 3615 1K0 1% 100n 3604-1 RBA(2) 56R 3600-3 56R

A1 E1 J9 M9 R1

VDD ODT CKE WE CS RAS CAS 0 BA 1 0 1 2 3 4 5 6 A 7 8 9 10 11 12 CK

VDDL

SDRAM
NC

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ

J1

RA(13) RDQ(0) RDQ(1) RDQ(2) RDQ(3) RDQ(4) RDQ(5) RDQ(6) RDQ(7) RDQ(8) RDQ(9) RDQ(10) RDQ(11) RDQ(12) RDQ(13) RDQ(14) RDQ(15) RDQM(1) RDQM(0)

DQ

RODT RCS# RWE# RCAS# RRAS# 100R 3624

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

RDQM

UDM LDM VREF VSSDL

LDQS

RDQS0 RDQS1 RDQS2 RDQS3

+1V8_SW

22R 1%

UDQS VSS

VSSQ A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

RDQS(0) RDQS(0)# RDQS(1) RDQS(1)#

A3 E3 J3 N1 P9

J7

3616

RCLK0#

3613

+1V8_SW

100n

100n

100n

100n

100n

100n

100n

100n

47u 16V

2628

2620

2622

2624

2626

2621

2623

7601 H5PS5162FFR-S6C RODT RCKE RWE# RCS# RRAS# RCAS# RBA(0) RBA(1) RA(0) RA(1) RA(2) RA(3) RA(4) RA(5) RA(6) RA(7) RA(8) RA(9) RA(10) RA(11) RA(12) RCLK1 3617 22R 1% 100R 3619 3611-3 3610-3 3610-4 3611-1 3611-2 3606-1 3610-1 3610-2 3606-2 3609-3 3608-1 3609-1 3608-3 3607-1 3608-2 3607-2 3606-4 3607-4 3609-2 3608-4 3607-3 3611-4 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R 56R K9 K2 K3 L8 K7 L7 L2 L3 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 J8 K8 F7 E8 B7 A8

A1 E1 J9 M9 R1

VDD ODT CKE WE CS RAS CAS 0 BA 1 0 1 2 3 4 5 6 A 7 8 9 10 11 12 CK

VDDL

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

J1

VDDQ

SDRAM
NC

A2 E2 L1 R3 R7 R8 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 F3 J2

3609-4 56R 3606-3 56R

2625

2627

RBA(2)

G
RA(13) RDQ(16) RDQ(17) RDQ(18) RDQ(19) RDQ(20) RDQ(21) RDQ(22) RDQ(23) RDQ(24) RDQ(25) RDQ(26) RDQ(27) RDQ(28) RDQ(29) RDQ(30) RDQ(31) RDQM(3) RDQM(2)

DQ

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

UDM LDM VREF VSSDL

LDQS

F601 1K0 1% 2629

3620 1K0 1% 100n

+1V8_SW

RCLK1#

3618 22R 1%

UDQS VSS A3 E3 J3 N1 P9

3621

RDQS(2) RDQS(2)# RDQS(3) RDQS(3)#

VSSQ A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

J7

10

11

12
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_505_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 49

SSB: Controller

B04C
1 A

Controller
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
1700 E2 1701 H12 1702 E16 1703 F16 1705 H10 1706 H10 1707 G16 1M20 I17 2700 D2 2701 D2 2702 C11 2703 D10 2704 D10 2705 D5 2706 D7 2709 F2 2710 F2 2711 G3 2712 E11 2713 E11 2716 E2 2717 E3 2719 K7 2720 K7 2721 K12 2722 I15 2723 I15 2724 J15 2725 J15 2726 K15 2727 J16 2728 J16 2729 B13 3700 B2 3701 B2 3702 I9 3703 C6 3704 B2 3705 B2 3706 C2 3707 C2 3708 B2 3709 C7 3710 C7 3711 D11 3712 D10 3713 C10 3714 D10 3715 D9 3716 D10 3717 D10 3718 H3 3719 H3 3720 H3 3721 H3 3722 I10 3723 I10 3724 I10 3726 B6 3727 H6 3728 H6 3729 I8 3730 I8 3731 I3 3733 I8 3734 H6 3735 I3 3736 H13 3737 I3 3738 I6 3739 E7 3740 D7 3741 D7 3742 I11 3743 J12 3744 I6 3745 I13 3746 G8 3747 G8 3748 H8 3749 H8 3751 I6 3752 I7 3753 I7 3754 I7 3755 I7 3756 K8 3757 J3 3758 H2 3759 F16 3760 F15 3761 H4 3762 D15 3763-1 E15 3763-2 E14 3763-3 E14 3763-4 E14 3764 J11 3765 E14 3767 J11 3768 F3 3769 G2 3770 K12 3771 K12 3772 F16 3773 F16 3774 G8 3775 G8 3776 E8 3777 E8 3778 E8 3779 G8 3780 E14 3781 J11 3782 E7 3783 H5 3784 K6 3785 K6 3786 C6 3787 I3 3788 H3 3789 J4 3790 I14 3791 I15 3792 I15

B04C
7700-6 MT5363BHMG
TSO_SYNC

A
MISTRT MIVAL H33
TSO_VALID

F37
+3V3_SW PBS_SPI_CLK PBS_SPI_DI PBS_SPI_DO 3700 3701 10K 10K

MOSTRT MOVAL CI MDO0 MCLKO CI

G36 H 37 F33 7700-4 MT5363BHMG

3726

G34
TSO_DATA0

MDI0 MCLKI

H 35
TSO_CLK

F35

10p

D 37 E36

C 36 G32 F31 B33 D 35 B37 C 34 A34 B35 A36

2729

ETMDIO ETMDC

ETCRS ETCOL ETPHYCLK

B06D B05 B02B B06A B02A

USB_PWR_EN USB_OCP EDID_WC RESET_DEMOD HP_DET I707

3704 3705

100R 100R

I700 I701

I710
3708 1K0 HP_DETECT

RF_AGC_SW

3710

4K7

+3 V 3_S W

3703

+ 3 V 3 _S W 3707 4K7

3786

10K

10K

F702 F701

3715 3714

K35 K37 J32 A30 C30 G30 E30 H29 F29 B29 D29 C28 E28 J28 G28 H27 F27 B27 D27 G26 E26 A26 C26

2705

10n

F706

100n RES

PANEL

RES 2701

SDM100n

RES
RES 3740 10K

33R 7703 BC847BW F707 7 6 5 I708 22R 22R

RES

2700

WC SCL

(8K 8) EEPROM 1 2 3

GPIO 0 1 2 3 4 5 6 7 8 9 10 GPIO 11 GPIO 12 13 14 15 16 17 18 19 20 21 22

23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

J26 F25 H25 B25 D25 C24 G24 E24 J24 B23 F23 D23 A22 C22 AF5 AG2 AE6 AF7 AG4 AG6 AH3 AH1

4K7

RES

B04D
F737
4700 BYPASS_MODE LCD-PWR-ONn

D33 D 31

CLK EN ER ETTX D3 D2 D1 D0 ETRX

CLK ER DV D3 D2 D1 D0

3709 +3V3_SW +3V3_SW

100R

F760

LAMP-ON

B01

E34 B31 E32 C 32 A32

+3V3_SW +3V3_SW DDC_RESET POWER-OK DC_PROT 10K 10K

MAC-CI

F759 F738 F739 F740 3796 100R

3706

4K7

B05 B01 B03

F761

5700 30R 3713 10K F705 3712 7702 M24C64-WDW6 4K7 F704 2702 100n

SYS_EEPROM_WE +3V3_SW

3711

I741

SCL-MAIN
3741

F708 3716 F736 3717

BACKLIGHT-BOOST

I711 1K0 2706

SDA-MAIN

ADR SDA
4

0 1 2

D
+3V3_SW +3V3_SW

FOR DEBUGGING ONLY

RES 3782

10K

1R0

+3V3_SW +3V3_SW 330R 4K7 10K +3V3_SW 7708 NAND01GW3B2CN 3776 3777 3778 1G 29 30 31 32 41 42 43 44 I731

3763-4 3763-3 3763-2 3763-1

3780

BOOST_CONTROL

I713

3739 JTRST JTDI JTMS JTCK 1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 25 26 27 28 33 34 35 38 39 40 45 46 47 48 5705 +3V3_SW 220R 100n 100n 2713 2712 JTDO

DEB

1702 1 2 3 4 5 6 7 8 9 10 11 13

12

37

E
2716 10p

1700 2717 54M

10p

F751

3765 33R

DEB

VCC

F745 F746 F747 F748 F749 F750

[FLASH]

3772

3773

7700-1 MT5363BHMG AJ36

BAS316

NC

4K7

4K7

F
2710 2709 4u7 4u7

+3V3STBY

NAND_PDD(0) NAND_PDD(1) NAND_PDD(2) NAND_PDD(3) NAND_PDD(4) NAND_PDD(5) NAND_PDD(6) NAND_PDD(7)

DEB
10K

DEB
3760 3759 10K

F763

12

0 1 2 3 IO 4 5 6 7

502382-1170 +3V3_SW

DEB

+3V3_SW

F
1703 DEB 1 2 3 4 6

XTALI XTALO VCXO

CONTROL
PDD

AJ34 T37

7701 BD45292G

VDD
I725 1 BAS316 100K 3769 6707

ER

VOUT

F721

ORESET

4K7

+3 V 3 _S W

37A1

37A2

RES 3779

JTCK JTDO JTRST JTDI JTMS 10K 4704 3761

AK3 AH5 AK1 AJ2 AJ4

JTCK JTDO JTRST JTDI JTMS

PAALE PACLE POWE POOE U0 RX TX RX TX

AR4 AU4 AT3 AU2 AT21 AP21 R36 T35 J34 J36 T33 AN22 AM21 AM19 AN20 AR20 AU20 AL20 AN14 AN18 AM17 AL14 AL12 AL16 AM15 N36 N34 AP37 AM31 AH37 AH35 M31 M33 I746100R
3734 4707 4708 3738 3744 3751 RES FOR ITV

NAND_PALE NAND_PCLE NAND_POWE NAND_POOE

VSS
13 36

DEB DEB 37A3 37A4 DEB 100R

4K7

4K7

4K7

PARB RES RES

4K7 4K7 4K7 4K7

AT5

NAND_PARB 3774 3775

4K7 4K7

NAND_POCE

I732

SUB GND
2 3

37A5

2711 100n

I756 I757

AL22 L30 K5 K7 M19

ORESET FSRC_WR MEMTN MEMTP TP_VPLL

0 1 2 3 4 5 6 7 0 1

AR2 AP5 AR6 AU6 AP7 AT7 AR8 AU8 AT1 AN6

NAND_PDD(0) NAND_PDD(1) NAND_PDD(2) NAND_PDD(3) NAND_PDD(4) NAND_PDD(5) NAND_PDD(6) NAND_PDD(7)

DEB
SDA-MAIN SCL-MAIN 4701 4702

DEB

6706 1K0

3768

NAND_PCLE NAND_PALE NAND_POCE NAND_POOE NAND_POWE NAND_PARB

I727

I742 I743

I726

16 17 9 8 18 19 7

RES

POCE

CLE ALE CE RE WE WP R B

DEB SDA-MAIN1 DEB SCL-MAIN1

I718

F752
F723

B4B-PH-SM4-TBT(LF) +3V3_SW

G
DEB F764 F765 F766
1 2 3 4 6 1707

+3V3STBY

DEB 100R

U1RX

3746 4K7

3747 4K7 3748 33R 33R F717 F718 F719 2 3 1 1701

U1TX

I744 I745

SCL-MAIN SCL-DISP

3718 3719 3720 3721

100R 100R

3727 3728

F741

RES

BZX384-C6V8

F742

4703

RES

1705

6700

6701

1706

0 1 OSDA 2

BZX384-C6V8

B04D
SDA-MAIN SDA-DISP

AP3 R34 P31 AP1 R32 P33

0 1 OSCL 2

F770 F771
U1RX

B4B-PH-SM4-TBT(LF)

U1

3749

0 OPWM 1 2 OIRI

U1TX

3783

4K7

MSJ-035-29D PPO UART (SERVICE)

+3V3_SW

H
+3V3_SW

I749
+3V3_SW +3V3_SW +5V_SW +5V_SW +3V3STBY +3V3STBY +3V3STBY 3702 4K7

3729

10K

LED-2
LED-1

3753 4K7

10K 10K 10K

I747

3755 1K0

3752 1K0

3754 4K7

3735 3737

100R 100R

I733

2722

RES 37A6 RES 37A7

3733

RES

680R

3724

3742

1R0

B06D

3731 10K +3V3STBY

RES

USB_DP USB_DM

AU10 AR10 AN10

I735

3730 10K

I755

1R0 3723

RES

DP DM USB VRT

5K1 1%

PWR5V CLK TUNER DATA BYPASS BYPASS0 ADCINP ADCINN AGC IF RF

RES 3757

3789

10K

POWER_DOWN SDA-LCD SCL-LCD SW_MUTE I752

MUTE STANDBYn HDMI_CEC

2723

B02 B03

1R0 3722

RES

1n0

CEC SDA1 HDMI SCL1 SDA2 SCL2

RC2

+3V3_SW

PWM DIMMING
RC

1n0 RES

OPWRSB

I750100R

7710 BC847BW

B01
STANDBY

I714

I734 100R I739 100R

BACKLIGHT_CONTROL

100K RES

3790

LIGHT-SENSOR KEYBOARD RESET_AUDIO

3788 3787

RES

100R I754 100R I753

AL32 AK33 AM35 AL34 AM37 AL36

0 1 2 ADIN_SRV 3 4 5

0 1 OPCTRL 2 3 4

RES RES

4K7

3758

10K

LIGHT-SENSOR

3791 100R RES

I
1M20 F753 F754 1 2 3 4 5 6 7 8 2041145-8 2727 100p 2728 100n

RES FRONT CONTROL

RC1 RC

3792 100R

7705 BC847BW I716 3745 4K7 RES 3743 1K0

LED-2

3793 2724 1n0 100R

+3V3STBY

J
TRAP0 ICE mode + Serial Boot ICE mode +ROM mode AOLRCK 0 0 AOBCK 0 0 ASPDIF 0 1

DEMOD

BZX384-C3V3

1K0 I737 2

3784 3785

10K 10K

VIP_ATV VIN_ATV IF_AGC RF_AGC

3767 15K 3 7709-2 BC847BS 5 I738 3770 1K0 220n 2721 3771 1K0 F724 6709 +12VS

6K8

POWER_DOWN

3798

4705 4706

HDMI_SDA2 HDMI_SCL2 SIDE_HDMI_SDA1 SIDE_HDMI_SCL1 F743 PWR5V_2 F744 PWR5V_1 TUNER_SCL TUNER_SDA

BACKLIGHT-PWM

F716

3781 100R

I715

+3V3STBY

F755 F756

B05

F757
+3V3STBY F725 3764

+5V

LED-1

3794 2725 1n0 100R

F758

6708

B2B

KEYBOARD

3795 2726 100n 10R

1 7709-1 BC847BS 4

BZX384-C8V2

+5V_SW

TRAP2 XTAL 54MHZ

AOSDATA0 1

OPWM1 0

3756

4K7

TRAP1 PDWNC Normal

OPCTRL3(0) 0

3793 J15 3794 J15 3795 K15 3796 C5 3798 J14 37A1 G15 37A2 G15 37A3 G15 37A4 H14 37A5 G3 37A6 I8 37A7 I8 37A8 K5 4700 B6 4701 F14 4702 F14 4703 H3 4704 H3 4705 J8 4706 J8 4707 H6 4708 I6 5700 C11 5705 E11 6700 H10 6701 H10 6706 F3 6707 G2 6708 K10 6709 K12 7700-1 F4 7700-4 B4 7700-6 A12 7701 F2 7702 D11 7703 D10 7705 I12 7708 E10 7709-1 K11 7709-2 K11 7710 I9 F701 D3 F702 C2 F704 C11 F705 D10 F706 D10 F707 D10 F708 D10 F716 J10 F717 H10 F718 H10 F719 H11 F721 G3 F723 F16 F724 K12 F725 J10 F736 D10 F737 B5 F738 C5 F739 C5 F740 C5 F741 H2 F742 H2 F743 J9 F744 J9 F745 E16 F746 E16 F747 E16 F748 E16 F749 E16 F750 E16 F751 E14 F752 F16 F753 I16 F754 J16 F755 J16 F756 J16 F757 J15 F758 J16 F759 C7 F760 C7 F761 D8 F763 E16 F764 G16 F765 G16 F766 H16 F770 H7 F771 H6 I700 B3 I701 B3 I707 B2 I708 D10 I710 B3 I711 D7 I713 E6 I714 I13 I715 J11 I716 I12 I718 G16 I725 G2 I726 G8 I727 G8 I731 E10 I732 G8 I733 I4 I734 I5 I735 I4 I737 K11 I738 K11 I739 I5 I741 D12 I742 F9 I743 F9 I744 H5 I745 H5 I746 H5 I747 I4 I749 H6 I750 I5 I752 J9 I753 I4 I754 H4 I755 I8 I756 G4 I757 G4

2703

10p 2704

1u0

10p

10K 10K 10K 10K 10K

DEB DEB DEB

DEB DEB

37A8

2719

2720

2K2

47n

47n

10

11

12

3736

13

14

15

3762

1K0

16

17
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_506_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 50

SSB: LVDS Display

B04D

LVDS Display

B04D
2 3 4 5 6 7 8 9
LVDS#1 RES 1G51
60 58 56 54 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 61 59 57 55 53 F801

A
NC NC NC NC

PX1APX1A+

PX1BPX1B+ PX1CPX1C+ PX1CLKPX1CLK+ PX1DPX1D+ PX1EPX1E+

RES 2803 10n

F805 F806 F807 F808 F809 F810 F811 F812 F813 F814 F815 F816 F831 F817 F818 F819 F820 F821 F822 F823 F824 F825 F826 F827 F828

C
PX2APX2A+
+5V_SW +12VDISP

PX2BPX2B+ PX2CPX2C+

PX2CLKPX2CLK+
4806 RES 4807 RES 4808 RES 3 2 1 8 7 6 5 I801

D
I800

PX2DPX2D+
5800 30R 5801 30R 5802 30R 7800 SI4835DDY +VDISP-INT

PX2EPX2E+

+VDISP-INT

F829

3802 47K 6800 BZX384-C6V8 3803 47R I802 2806

FX16S-51S-0.5SH

E
3804 I805 47K RES +3V3STBY I804

3805

47K

1u0

RES
7801 PDTC114ET

F800

LCD-PWR-ONn

B04C

I806

7803 BC857BW 3808 10K

3807 10K

I807

6
I808

7802-1 BC847BS 1

3
I809

F
5 220n 2807 1K0 3112 3809 1K0

7802-2 BC847BS 4

1G51 A9 2803 C8 2804 E9 2805 E9 2806 E1 2807 F3 3802 E1 3803 E1 3804 E2 3805 E2 3806 F2 3807 F1 3808 F1 3809 F3 3900 F3 4800 D1 4801 D1 4802 D1 4803 D1 4804 D1 4805 D1 4806 D2 4807 D2 4808 D2 5800 D3 5801 D3 5802 D3 6800 E1 7800 E2 7801 E3 7802 F2 7802 F2 7803 F1 F800 E4 F801 A9 F805 B8 F806 B8 F807 B8 F808 B8 F809 B8 F810 B8 F811 B8 F812 B8 F813 B8 F814 C8 F815 C8 F816 C8 F817 C8 F818 C8 F819 C8 F820 C8 F821 C8 F822 C8 F823 C8 F824 C8 F825 D8 F826 D8 F827 D8 F828 D8 F829 D9 F831 C8 I800 D1 I801 D2 I802 E1 I804 E3 I805 E2 I806 F1 I807 F2 I808 F2 I809 F3

RES 4800 RES 4801 RES 4802

4803 4804 4805

100u 16V 2805

3806

15K

2804

100n

9
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_507_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 51

SSB: HDMI & Multiplexer

B05
1

HDMI & Multiplexer

2 3 4 5 6 7 8 9 10 11 12 13
1901 B11 1902 F10 2900 B11 2901 F11 3111 C6 3900 B13 3901 C13 3902 C12 3903 F13 3904 G12 3905 H12 3906 B8 3907 C8 3908 C7 3910 C7 3911 B6 3912 C7 3913 D7 3914 D6 3915 G9 3916 G8 3917 G8 3918 G7 3919 G8 3920 H8 3921 H7 3922 G7 3923 H12 3924 C12 4900 C7 4901 D7 4902 H8 4903 H8 4904 C9 6900 D12 6901 I12 6902 B7 6903 C10 6904 D9 6905 D9 6906 D8 6907 D8 6909 H10 6910 H9 6911 H9 6912 H9 6913 A3 6914 B3 6915 C3 6916 E3 6917 G9 7700-5 F4 7900 B12 7901 F12 7902 C13 7903 G13 7904 B7 7905 D7 7906 G8 7907 H8 7908 B9 F900 D6 F901 B13 F902 B13 F903 C13 F904 C12 F905 C12 F906 F13 F907 G13 F908 G13 F909 G12 F911 I12 F912 H7 F913 D12 I900 B7 I901 B6 I902 C8 I903 F8 I904 G7 I905 H8 I906 B8 I907 C8

B05

A
M_RX1_1B

A
6913 IP4281CZ10 1 3 8 5 6 7 9 10 RES 2
M_RX1_1

HDMI_PLUGPWR1 4
M_RX1_2B

M_RX1_2

HDMI PORT 1 (SIDE)

+3V3STBY 6902 BAT54 COL 3906 I906 +3V3STBY 27K
M_RX1_2 M_RX1_2B M_RX1_1

M_RX1_2 M_RX1_2B

M_RX1_1B M_RX1_1

1901 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 7900 M24C02-WMN6 2900 100n

3900

100R RES

M_RX1_CB

6914 IP4281CZ10 1 3 8 5 6 7

RES 2
M_RX1_C

B04C
DDC_RESET

I900 3911 2K2 RES I901 7904 BC847BW 100K 3111 3910 RES

HDMI_PLUGPWR1

7908 BSH111 RES

M_RX1_1B M_RX1_0 M_RX1_0B M_RX1_C

1 2 3

(256 8) EEPROM
0 1 2 ADR

WC SCL

7 6 5

F901 F902
SIDE_HDMI_SCL1

F903
SIDE_HDMI_SDA1

3908

4K7 3907

4K7

SDA 4

M_RX1_0

4 9 10

M_RX1_0B

RES

I907

HDMI_CEC

4904

HDMI_CEC_A

M_RX1_CB

F904

M_RX1_0 M_RX1_0B

M_RX1_CB M_RX1_C

SIDE_HDMI_SCL1 SIDE_HDMI_SDA1

10K

PWR5V_1 3912 1K0 2

EDID_WC

F905

10K 3901

C
7902 MMBT3904

L : WP

DEB 3924

CDS2C05HDMI2 5.6V

CDS2C05HDMI2 5.6V

CDS2C05HDMI2 5.6V

CDS2C05HDMI2 5.6V

M_RX2_1B

6915 IP4281CZ10 1 3 8 5 6 7

4900 2
M_RX2_1
SIDE_HDMI_HPD1

I902 6907

6903

RES 2

CDS2C05HDMI2 5.6V

10029449-001RLF

6906

6905

6904

HDMI_PLUGPWR1 +5V_SW 1

F900

4901 RES 3914

7905 MMBT3904 RES 100K 3913

M_RX2_2

4 9 10

M_RX2_2B

RES

RES

RES

RES

HDMI_PLUGPWR1 F913 3

BAT54C

RES
M_RX2_2 M_RX2_2B M_RX2_1B M_RX2_1

4K7

4K7

H : WRITE

68K 3902

21 23

D
6900

M_RX2_CB

6916 IP4281CZ10 1 3 8 5 6 7

M_RX2_C

RES

B04C
PWR5V_1

M_RX2_0

4 9 10

M_RX2_0B

E
M_RX2_0 M_RX2_0B

E
M_RX2_CB M_RX2_C

HDMI_PLUGPWR2

HDMI PORT 2

F
M_RX2_0 M_RX2_0B M_RX2_1 M_RX2_1B M_RX2_2 M_RX2_2B M_RX2_C M_RX2_CB HDMI_HPD2

7700-5 MT5363BHMG
M_RX2_2

1902

6917

100R RES

DDC_RESET

3918 2K2 RES RES

I904 100K 3922

CDS2C05HDMI2 5.6V

AP17 AT17 AR18 AU18 AP19 AT19 AR16 AU16 AL18

3917

3916

4K7 3915

4K7

HDMI_HPD1

RES

0 0B 1 1B RX1 2 2B C CB

HDMI_CEC_A

B04C

100n

2901

M_RX2_2B M_RX2_1 M_RX2_1B M_RX2_0 M_RX2_0B M_RX2_C M_RX2_CB HDMI_CEC_A

3903

HDMI-LVDS

0P 0N 1P 1N 2P 2N AE 3P 3N 4P 4N CKP CKN

G16 E16 H17 F17 G18 E18 G20 E20 H21 F21 H19 F19 D15 B15 C16 A16 D17 B17 D19 B19 C20 A20 C18 A18

PX2A+ PX2APX2B+ PX2BPX2C+ PX2CPX2D+ PX2DPX2E+ PX2EPX2CLK+ PX2CLKPX1A+ PX1APX1B+ PX1BPX1C+ PX1CPX1D+ PX1DPX1E+ PX1EPX1CLK+ PX1CLK-

I903 7906 BC847BW RES

HDMI_PLUGPWR2

CDS2C05HDMI2 5.6V

CDS2C05HDMI2 5.6V

4902 F912 RES 4903 RES 3921 4K7

I905 2 6912

CDS2C05HDMI2 5.6V

CDS2C05HDMI2 5.6V

M_RX1_0 M_RX1_0B M_RX1_1 M_RX1_1B M_RX1_2 M_RX1_2B M_RX1_C M_RX1_CB SIDE_HDMI_HPD1

AP13 AT13 AR14 AU14 AP15 AT15 AR12 AU12 AN16

0 0B 1 1B RX2 2 2B C CB HDMI_HPD2

0P 0N 1P 1N 2P 2N AO 3P 3N 4P 4N CKP CKN

HDMI_SCL2 HDMI_SDA2

PWR5V_2 3919 1K0

DEB 3923

68K 3905

10029449-001RLF

HDMI_PLUGPWR2

6911

HDMI_HPD2

7907 MMBT3904 100K 3920

6910

6909

4K7

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22

F
(256 8) EEPROM
0 1 2 ADR SDA

WC SCL

7 6 5 F907 F908
HDMI_SCL2

F906

1 2 3

HDMI_SDA2

F909

10K

7901 M24C02-WMN6

G
3904 10K 7903 MMBT3904

EDID_WC

21 23

H
RES

RES

RES

RES

RES

+5V_SW 1

HDMI_PLUGPWR2 F911 3

BAT54C

6901

B04C
PWR5V_2

10

11

12

13
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_508_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 52

SSB: Analog I/O - Headphone

B06A
1 A

Analog I/O - Headphone

2 3 4 5 6 7 8 9 10 11

B06A
A
1A01 C7 1A02 C6 1A03 D5 2A00 B5 2A01 C5 2A02 D4 2A04 E7 2A05 E7 2A06 F8 2A07 F4 2A08 F4 2A09 G8 2A10 F7 2A11 G6 3A00 C6 3A01 B4 3A02 B5 3A03 C5 3A04 D5 3A09 E7 3A10 E7 3A11 F9 3A12 F9 3A13 G9 3A14 G9 3A15 F4 3A16 F5 3A17 G4 4A00 C5 4A01 D5 4A02 F3 4A03 G3 6A00 C5 6A01 D5 7A00 F7 FA00 C6 FA01 C6 FA02 C6 FA03 C6 FA04 C7 FA06 F3 FA07 F3 FA08 F10 FA09 G10 IA00 F8 IA01 F8 IA02 F5 IA03 F5 IA04 F5 IA05 F4 IA08 E7 IA09 E7 IA10 G6

RESERVED

B
HP_DET

RES
3A01 1R0

B
3A02
RES 2A00

22K

1n0

RES RES
+3V3_SW HP_ROUT 3A03 1R0 RES 2A01 1n0 PESD5V0S1BA 1A02

HEADPHONE
RES 2K0 RIGHT LEFT FA00
FA01 FA02 FA03 FA04 5 4 3 2 1

3A00

1A01

RES 4A00
6A00

LGM1019-0100F

RES

RES

RES

HP_LOUT

3A04 1R0

4A01

RES 2A02

1n0

RES

PESD5V0S1BA 1A03

RES
6A01

D
RC2 RC1

RES

RES

RES

2A04

IA08

47p RES 3A09 RES 22K 3A10 22K 2A05 47p +3V3_SW IA09

RES

B06B
2A10

1u0

PBS_HPL 4A02

RES
HPOUTL HPOUTR RESET_AUDIO PBS_HPR 4A03

FA06 FA07

RES

2A07 1u0 RES 2A08 1u0

IA05

RES

3A15 10K RES 3A16 10K

IA02 2 IA03 6 IA04 5 RES 2A11 1u0 IA10 3 1 2

AMPLIFIER
INVO

VDD RES 1 1 2A06 IA00 RES

RES 7A00 TPA6111A2DGN

RES RES 3A11 33R 3A12 33R IA01 RES 3A13 33R 3A14 33R
FA09 HP_ROUT FA08 HP_LOUT

B03

4V 100u RES 2 7 10 11 2A09

RES 3A17 10K

SHUTDOWN BYPASS 4

4V 100u

RES

RES

VIA GND GND_HS 9

B04C

10

11
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_509_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 53

SSB: Analog I/O - Audio

B06B
A

Analog I/O - Audio

1 2 3 4 5
7700-2 MT5363BHMG

B06B
6 7 8 9 10 11 12 13
1B01 C13 1B02 B13 1B03 B12 1B04 C12 1B05 D12 2B00 C2 2B01 C2 2B02 C2 2B03 B2 2B05 B2 2B06 C4 2B07 B4 2B08 C4 2B09 B4 2B11 B4 2B12 C4 2B14 D4 2B15 C3 2B16 A8 2B17 A8 2B19 D12 2B20 D11 2B24 D7 2B25 D7 2B30 B9 2B31 A9 2B32 A9 2B33 A9 2B34 B11 2B35 B11 2B36 B12 2B37 B11 2B38 C11 2B39 C12 2B40 C9 2B41 C8 2B42 C7 2B43 E8 2B44 E8 2B50 F3 2B51 F2 2B52 F2 2B53 G4 2B54 G2 2B55 H2 2B56 H2 2B57 H3 2B58 F4 2B59 H4 3110 D5 3B00 C1 3B01 C1 3B02 C1 3B03 B1 3B05 B1 3B06 C3 3B07 B3 3B08 C3 3B09 B3 3B11 B3 3B12 C3 3B14 D3 3B15 C11 3B16 D11 3B27 B8 3B28 A8 3B29 A8 3B30 A8 3B31 B10 3B32 B11 3B33 B11 3B34 B10 3B35 C7 3B36 C7 3B37 C8 3B38 C7 3B39 D7 3B40 F3 3B41 F2 3B42 G4 3B43 G2 3B44 G2 3B45 H2 3B46 H3 3B47 D5 3B48 E9 3B49 E10 3B50 F3 3B51 F5 3B52 H3 3B53 H5 6B00 B12 6B01 C12 7700-2 A6 7B01-1 F3 7B01-2 G3 FB00 B12 FB01 C12 FB02 A7 FB03 C9 FB04 C12 FB06 B13 FB07 D13 FB08 C2 IB00 B11 IB01 B11 IB02 B10 IB03 B10 IB04 A8 IB05 A8 IB06 A8 IB07 B8 IB08 B11 IB09 B11 IB10 A7 IB12 A7 IB13 B7 IB14 C7 IB15 C7 IB16 C7 IB17 C7 IB18 D7 IB19 D8 IB20 D7 IB21 D8 IB22 D7 IB23 B2 IB24 B2 IB25 B2 IB26 B2 IB27 B2 IB28 B2 IB29 B2 IB30 B2 IB31 B2 IB32 C2 IB33 C2 IB34 C2 IB35 C2 IB36 C2 IB37 C2 IB38 B4 IB39 B4 IB40 B4 IB41 B4 IB42 B4 IB43 B4 IB44 C4 IB45 C4 IB46 C4 IB47 C4 IB48 F2 IB49 F3 IB50 G3 IB51 G3 IB52 H3 IB53 H2 IB59 C2 IB61 C4 IB62 C4 IB63 D4 IB64 A7 IB65 A7 IB66 A2 IB67 A2

AUDIO-VIDEO

AF

AM33 AN34 AN36 AD33 AC34 AB31 AC32 AD35 AB35 AC36 AB37 AA32 AB33 AA34 Y35 AA36 Y37 AA30 IB64 IB65 IB10 FB02 IB12 IB13
AIN0_L AIN0_R AIN1_L AIN1_R 2B16 2B17 10n 10n 3B30 3B29 3B28 3B27 30K 30K 30K 30K SIF_OUT SIF_OUT_GND

A
IB04 IB05 IB06 IB07
2B33 2B32 2B31 2B30 10u 10u 10u 10u

P MPX N
HSYNC VSYNC SOG RP GP BP

IB66 IB67 IB23 IB24 IB25 IB26 IB27

3B11 3B05 3B03 3B01 68R 68R 68R 68R 68R

AR22 AU22 AP23 AT25 AU24 AT23 AR24 IB382B11

10n

HSYNC VSYNC SOG RP GP BP COM 0P PR 1P 0P PB 1P 0P Y 1P 0 COM 1 0 SOY 1 0 SY 1 0 SC 1 0N 0P 1P CVBS 2P 3P OUT1 VDAC OUT2 FS_VDAC

30K

10u

1R0

PESD5V0S1BA

B03

GN

SPR0P
SPR1P

IB39 IB41 IB43

IB28 2B05 IB30 2B03

2B01

10n IB29 10n IB31 10n IB33 3B09 3B07

PR0PAU30

AP27 IB402B09 10n IB422B07 10n IB442B08 10n IB462B06

PB0PAP29

SPB0P
SPB1P

0_L 0_R 1_L 1_R 2_L 2_R 3_L AIN_AADC 3_R 4_L 4_R 5_L 5_R 6_L 6_R VMID_AADC

AIN0_L-AV1 AIN0_R-AV1 AIN1_L-AV2 AIN1_R-AV2

IB02 3B31 IB01 2B34 IB00 3B32 FB00

DVI_AUL_IN DVI_AUR_IN

AUDIO IN
MSJ-035-10A B AG PPO

6B00 RES

5 4 2 3 7 8 1

2B36 RES

2B35

1B03

RES

B
1B02

1n0

SAV_L_IN SAV_R_IN IB03 2B37 10u

1n0

FB06
3B34 30K

AT27
Y0PAR28

SY0P

IB09

IB08

3B33

2B41

SY0N
SY1N 3B02

2B39 RES

C
B02A B06C

SOY1-AV2 SOY0-AV1

3B00

1R0 IB36

2B00

1n5 IB37

3B06

1R0

1n5

IB47

SOY0AU28

AP25 AP33 AR34 AT33 AU34

1u0 100R 100R 2B15 3B12 3B14

AOBCK AOLRCK AOMCLK 0 1 AOSDATA 2 3 4 ASPDIF ALIN 0 1 2 3

1n0

1n0

2B02

AR26

L34 M37 M35 L36 P3 5 P37 K31 N32 K33 L32 AF37 U32 V35 V37 AE36 V33 U34 U36 AF35

IB14 IB15

1B04

2B38 RES

100R IB34

10n IB35

3B08

100R

Y0NAT29

3B35 3B36 3B37 4K7 3B38 4K7 IB17 2B42 100n 3B39

4K7 4K7

6B01 RES

IB45

2B40

100n

1u0

B06C

SY1P

PESD5V0S1BA

68R IB32

AU26

1R0

FB01

IB16

+3V3_SW

C
SPDIF
FB03 3B15 3B16 2B20 HPOUTL PREAMPL 240R 100R FB04 1 CON_JACK 1B01

+3V3_SW

FB08
GND_CVBS

CVBS_RF CVBS_AV3

IB59

47n 47n

2B12 2B14

IB61 IB62 IB63

1B05

AR36 AT37 AU36 AP35 AT35 AP31 AT31

ASPDIF_OUT

FB07 2
YKB11-0946V

2B19

4K7 RES IB18

2B25 10u

AL

DEB
AM29 DEB 560R 3B47 3110 75R

IB19

33p

33p

0 1 AR 2 3 AVICM

IB20 IB22

2B24

10u

IB21

HPOUTR PREAMPR

3B49

3B48

2B43

2B44

100n

1u0

47K

47K

3B40 22K 2B50

B03
220p

PREAMPL

IB48

2B51 10u

3B41 2B52 820p 10K

3B50 IB49 5K1 2

F
2B58 1
+12VS AOUTL

10u 3B51 47K

+12VS

LM833 7B01-1

3B42 2B53

3B43

47K

IB50

2B54

3B44

1u0

IB51 47K 10u

30R

7B01-2 LM833 5 2B55

PREAMPR

IB53

3B45 2B56 10K

IB52 820p

3B52 5K1 2B57

7 6 4

2B59 10u 3B53 47K

AOUTR

10u

220p

3B46 22K

10

11

12

13

2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_510_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 54

SSB: Analog I/O - Video

B06C
1

Analog I/O - Video

2 3 4 5 6 7 8 9 10 11 12
1C00 A5 1C01 C6 1C02 C12 1C03-1 I1 1C03-2 H1 1C03-3 G1 1C05 G2 1C06 H2 1C07 I2 1C08 E11 1C09 D11 1C10 D11 1C14 A11 1C15 C11 1C16 C5 1C17 D5 1C18 D5 1C19 E5 2C00 A4 2C01 A5 2C02 C4 2C03 C5 2C04 D4 2C05 D4 2C06 E4 2C07 G4 2C08 G3 2C09 H4 2C10 H4 2C11 H3 2C12 I3 2C13 I4 2C14 I4 2C15 E9 2C16 D9 2C17 D10 2C18 C10 2C19 C10 2C20 A10 2C21 A10 3C00 A4 3C01 C4 3C02 D4 3C04 D4 3C05 E4 3C06 E4 3C07 G4 3C08 G3 3C09 H4 3C10 H4 3C11 I4 3C12 A10 3C13 B10 3C14 D10 3C16 D10 3C17 E10 3C18 E9 3C19 I4 3C20 C4 3C21 C10 3C22 E4 3C23 E10 3C24 E10 3C25 E4 5C00 C5 5C01 E5 5C02 E5 5C03 C10 5C04 E10 5C05 E10 6C00 A5 6C01 C5 6C02 D5 6C03 D5 6C04 E5 6C05 G3 6C06 H3 6C07 I3 6C08 D11 6C09 D11 6C10 E11 6C19 A11 6C20 C11 FC00 I2 FC01 I2 FC02 H2 FC03 G2 FC04 D6 FC05 D6 FC06 D6 FC07 D6 FC08 C6 FC09 C6 FC10 C12 FC11 C12 FC12 D11 FC13 D11 FC14 D11 FC15 B11 IC01 A4 IC02 C4 IC03 C4 IC04 G4 IC05 H4 IC06 H4 IC07 I4 IC08 I4 IC09 A10 IC10 B10 IC11 C9 IC13 E9 IC14 E9

B06C
B06B

A
IC01
AIN1_R-AV2

IC09
AIN0_R-AV1

3C12

A
PESD5V0S1BA 1C14
RES 2C21 1n0

3C00 RES 2C20 1R0 PESD5V0S1BA 1C00 1n0

1R0

RES 2C00

RES 2C01

RES 6C00

0001

1n0

1n0

RES

6C19

B
3C13

B
FC15 PESD5V0S1BA 1C15

AIN0_L-AV1

IC10

IC02
AIN1_L-AV2

3C01 RES 2C18 PESD5V0S1BA 1n0 1R0 RES 2C03

1R0

RES 2C02

RES 6C01

1C16

1n0

1n0

AV2
FC09 FC08

RES 6C20

RES 2C19

1n0

AV1 C
FC10

C
IC03 SPR1P

1C01 MSP-636V1-01 1 2 3 SPR0P 4

2C17 56R 15p

1C02 1 MSP-636H1-01 2 3 4

3C20 18R

5C00 60R PESD5V0S1BA 1C17 FC07

IC11

3C21 18R
3C14

5C03 60R PESD5V0S1BA 1C10

FC11

5 6
FC12 SC1_CVBS_OUT

2C04

15p 3C02

56R

5 6
PR1P_SC2 FC04 FC05

RES 6C02

RES 6C08

7 8

D
15p 3C04 RES 6C03 2C05 56R

7 8

PB1P_SC2 PESD5V0S1BA 1C18

FC13 PESD5V0S1BA 1C09

SC1_B

9 10 11 12

9
2C16 FC06

SY1P_SC2

SPB1P

3C22 18R

5C01 60R

10 11 12 SPB0P
IC13
SOY0-AV1

3C16

6C09

RES

56R

15p

FC14

SC1_G

3C23 18R
IC14

5C04 60R 5C05

SOY1-AV2

2C15

3C17

2C06

15p 3C05

RES 6C04

56R

SY1N

3C06 1R0

SY0N

3C18 1R0

RES 6C10

56R

15p

18R

PESD5V0S1BA 1C19

60R

18R

PESD5V0S1BA 1C08

SY1P

3C25

5C02

SY0P

3C24

60R

F AV3
CVBS 1C03-3 RIGHT YELLOW2
1 MSP-305H-BBB-432-03 NI

F B06B
FC03 PESD5V0S1BA 3C07 1R0 3C08 RES 2C08 2C07 75R 15p 47p IC04 CVBS_AV3 SAV_L_IN SAV_R_IN
GND_CVBS

(YELLOW)

1C05

RES 6C05

LEFT 1C03-2
WHITE 4 3 MSP-305H-BBB-432-03 NI

FC02 PESD5V0S1BA

3C09 1R0 RES 2C11

IC05

2C09 10u

IC06

3C10 30K

(WHITE)

RES 6C06

RES 2C10

1n0

1C06

1n0

1C03-1 RED 6 5 MSP-305H-BBB-432-03 NI

FC01 PESD5V0S1BA

3C11 1R0 RES 2C12

IC07

2C14 10u

IC08

3C19 30K

(RED)

1C07

RES 6C07

RES 2C13

1n0

1n0

FC00

10

11

12
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_511_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 55

SSB: USB

B06D
1

USB

B06D
2 3 4 5 6 7 8
1D00 C3 1D01 C2 1D02 C3 1D03 C3 2D11 C4 2D12 C5 2D14 C6 2D15 D5 2D16 D6 3D09 D5 3D10 D6 5D00 C4 6D00 C3 6D01 C4 6D02 C3 7D00 B5 FD00 C2 FD01 C3 FD02 C3 FD03 C3 FD04 B5 FD05 C5 FD06 C5 ID04 C4

B
7D00 TPS2041BD 6

B
B04C
EN_ 4 2 3 2D14 100u 16V FD04 USB_PWR_EN

1 2 OUT

USB
1D01 1 5V 2 USB_DM 3 USB_DP FD00 4 5 1D03 FD01 FD02 FD03 6D02 BZX384-C6V8 5D00 30R ID04

7 8 5

1 IN 2
GND

+5V_SW

3
OC_

2D12 100n

C
USB_OCP

6D00

10u

FD06 FD05

NUP1301ML3

NUP1301ML3

6D01

USB-01-PBT-B-30-CU2

1D00

1D02

2D11

USB_DM

USB_DP

4p7

2D15

2D16

4p7

3D10

15K RES

3D09

RES

RES

15K RES

2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_512_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 56

SSB: VGA

B06E
A

VGA
1 2 3 4 5 6 7 8 9 10 11

B06E
A
6E06 IE00

+5V_SW

B04C
EDID_WC FE00 3E25 10K 7E01 BC847BW

3E26 10K

BAS316

3E27

B
DC_5V

RES

B06B
2E00 RP 10n

IE01

3E00 68R

VGA_Rp

5E00 60R 2E07 3E16 6E00 75R

VGA_R PESD5V0S1BA

FE01

RES

GP

2E02 10n 2E03

IE02

3E02 68R

VGA_Gp

5E01 60R 2E08 3E15 6E01 75R 5p6 PESD5V0S1BA

1E00

VGA_G

FE02

1E05

SOG 1n5 2E04 10n

1R0

IE04

0001

IE03

3E03

GN

3E04 100R

VGA_Gn

3E10 1R0

RES

FE11
RES 3E24 DC_5V

DC_5V

BP

2E05 10n

IE05

3E05 68R

VGA_Bp

5E02 60R 3E14 6E02 2E09 75R 5p6 PESD5V0S1BA

VGA_B 4E04 1E02 0001

6K2 1% 2E16 100n

3E21

3E23

3E22

RES

33R

10K

10K

7E00 M24C02-WMN6 8 FE10 7 6 5

1E01

WC SCL

(256x8) EEPROM 1 2 3

5E03 DC_5V 60R

6E05 BAS316 2E10

3E13 150R 2E11 100n 1n0 FE03

FE04 HSYNC 5E04 30R 5p6 3E17 2E12 6E03 2K2 PESD5V0S1BA H_SYNC FE05 FE06

F
VSYNC

RES

RES

16 17
FE07

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

IE06 4E02 4E03

SCL_VGA SDA_VGA

FE08 FE09

ADR SDA
4

0 1 2

FE12

MDS-15P-V-05-B-8.5-U4-ZN

5E05 30R 2E13 6E04 5p6 3E18 2K2

VSYNC PESD5V0S1BA

RES

RES

1E00 C7 1E01 E8 1E02 E7 1E03 F6 1E04 G6 1E05 D7 2E00 C3 2E02 C3 2E03 D3 2E04 D3 2E05 D3 2E07 C5 2E08 D5 2E09 E5 2E10 E5 2E11 E6 2E12 F5 2E13 G5 2E14 E9 2E15 E9 2E16 D11 3E00 C3 3E02 C3 3E03 D3 3E04 D3 3E05 D3 3E10 D5 3E13 E5 3E14 E5 3E15 D5 3E16 C5 3E17 F5 3E18 G5 3E19 E9 3E20 E9 3E21 E9 3E22 E9 3E23 E9 3E24 D11 3E25 B8 3E26 B10 3E27 B7 4E02 E9 4E03 E9 4E04 D10 5E00 C6 5E01 C6 5E02 D6 5E03 E4 5E04 F5 5E05 F5 6E00 C6 6E01 D6 6E02 E6 6E03 F5 6E04 G5 6E05 E5 6E06 A10 7E00 E10 7E01 B9 FE00 B8 FE01 C7 FE02 D7 FE03 E7 FE04 F7 FE05 F7 FE06 F7 FE07 F8 FE08 E10 FE09 E10 FE10 E10 FE11 D10 FE12 E11 IE00 B9 IE01 C3 IE02 C3 IE03 D3 IE04 D3 IE05 D3 IE06 E8

5p6

68K

1%

2E14

RES 3E20

RES 3E19

2E15

330p

330p

1E04

1E03

6K2

6K2

1%

10

11

2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_513_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 57

SSB: Hospitality

B07

Hospitality

B07
1 2 3 4 5 6 7
1F00 B1 1F01 B5 1F02 C1 2F00 B6 2F01 B6 3F00 B2 3F01 B2 3F02 C2 3F03 C2 5F00 B2 5F01 B2 FF00 B2 FF01 B2 FF02 B2 FF03 B2 FF04 B1 FF05 C2 FF06 C2 FF07 C2 FF08 C2 FF09 D2 FF10 D2 FF11 B5 FF12 B5 FF13 B5

DMMC1
1F00

B04C
SDA_CLOCK SCL_CLOCK FF00 FF01 FF02 FF03 FF04 5F00 3F00 3F01 5F01 30R 100R 100R 30R

DMMC3
1F01 1 2 3 5 FF11

B06A
FF12 FF13
PBS_HPL PBS_HPR

B
6

1 2 3 4 5 7

+3V3STBY
SDA-LCD SCL-LCD 4

+5V_SW

502382-0370

2F00

1n0 2F01

502382-0570

DMMC2
1F02 1 2 3 4 5 6 7 8 10 FF05 FF06 FF07 FF08 FF09 FF10

1n0

C
+12VS
PBS_SPI_DI PBS_SPI_CLK

3F02 3F03

22R 22R

SDA-MAIN1 SCL-MAIN1
RC1 RC2

502382-0870

2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_514_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 58

SSB: TCON Control

B08A
1 A

TCON Control
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A
DDR2VDD 2H32 100n 2H33 100n 2H34 100n 2H35 100n 2H36 100n 2H37 100n 2H38 100n 2H39 100n 100n

B08A
VDD1V8 VDD1V8PLL VDD3V3LVRS VDD3V3IO

100n 2H02

2H25

100n 2H07

100n 2H09

2H01

100n 2H06

100n 2H13

100n 2H26

100n 2H03

100n 2H04

100n 2H29

100n 2H05

100n 2H08

100n 2H10

100n 2H27

2H28

2H30

2H40

10p

2H41

D
VCC1V8 5H00 60R 2H43 10u

E
2H44 10u VDD1V8PLL 5H01 60R VCC_3V3 5H02 2H45 VDD3V3LVRS

C5 C9 D15 E3 E6 E7 E10 E11 F5 F8 F9 F12 F13 G5 G8 G9 G12 G13 H6 H7 H10 H11 J3 J6 J7 J10 J11 K5 K8 K9 K12 K13 L3 L5 L8 L9 L12 L13 M6 M7 M10 M11 N3 N6 N7 N10 N11 P15 R5 R8 R11 C7 C10 C12 G3 C8 C11 C13 E15 J15 N15 R13 C6 R6 R9 R12

POWER

VDD18

VSS

VDD18

VSS

VDD18

VSS

VDD18

VSS

VDD18

VSS

VDD18

VSS

VDD18

VSS

VDD18

VSS

VDD18PLL

VSS

10u

60R

VSS VDD33LVML

VDD3V3IO 2H46 10u

VSS VDD33IO

5H03 60R

VSS

C3 C4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 E2 E4 E5 E8 E9 E12 E13 E14 F6 F7 F10 F11 G4 G6 G7 G10 G11 H5 H8 H9 H12 H13 J1 J2 J4 J5 J8 J9 J12 J13 J14 J16 K6 K7 K10 K11 L4 L6 L7 L10 L11 M5 M8 M9 M12 M13 N4 N5 N8 N9 N12 N13 N14 P5 P6 P8 P9 P10 P11 P12 P13 P14 U4

100n 2H31

100n

100n

100n

7H01-5 VPP1501BFG VDD1V8

B
1H00 DSX321G 2 NC 1 27M 7H01-4 VPP1501BFG
OSCOUT TA0 TA1 TA2 TA3 TA4 TA5 TA6 TA7 TA8 TA9 TA10 TA11 TA12

4 3

3H01 560R 3H02

OSCIN GSP1

3H21 33R VCC_3V3 VCC_3V3 7H02-1 74LVC2G04 1

GSP2

RES 3H22 2K2

1 2

VGH_35V

3H03

150K

RESET

7H03 74LVC1G74DC 7 S 1 C1 2 1D 6 R

7H05 74LVC1G86GW 2 Q Q 5 3 1

P4 R2 P3 T1 R4 T2 R3 U1 T4 U2 R1 T3 U3 N2 M3 N1 M2 L2 L1 M1 M4 P1 P2 3H00 1K0 E1

DRAM
0 1 2 3 4 5 6 A 7 8 9 10 11 12 CS RAS CAS WE CK UDQS CKE ODT 0 BA 1 RESIMP 0 1 2 3 4 5 6 DQ 7 8 9 10 11 12 13 14 15 LDQS

4H05

REV

TCS# TRAS# TCAS# TWE# TCK TCK#

H3 H2 K3 K2 K1 K4 H1 H4 D3 D2 F3 F2 F1 F4 D1 D4 G2 G1 C2 C1

TDQ0 TDQ1 TDQ2 TDQ3 TDQ4 TDQ5 TDQ6 TDQ7 TDQ8 TDQ9 TDQ10 TDQ11 TDQ12 TDQ13 TDQ14 TDQ15 TLDQS TLDQS# TUDQS TUDQS#

4H04

RESET U_D

7H02-2 74LVC2G04 3

VCC_3V3

1 2

U_D_INV

2H54 7H04 74LVC1G74DC 7 S 1 C1 2 1D 6 R 1u0

3H04

2H42

TCKE TODT TBA0 TBA1

GCK

3H23 100R

Q Q

5 3

E
VCC1V8 5H04 2H52 100n 2H53 100n 60R 7H01-3 VPP1501BFG

RES

ASIC_CS1 ASIC_CS3 ASIC_CS5 ASIC_CS7 ASIC_CS9 ASIC_CS11

M16 M17 N16 N17 P16 P17 R14 R15 R16 R17 T14 T15 3H05 J17 U15 U14 H15 H14

LCD
1 2 3 4 5 6 CS 7 8 9 10 11 12 RESPI F1 STH F2 B1 STH B2 POL TP CPV OE STVU STVD SLOPE GP01 GP02 L|R_ U|D_ SELLVOS 0P 0N 1P 1N 2P 2N 3P 3N RLV 4P 4N 5P 5N 6P 6N 7P 7N RLV CKP CKN

FH00
LDIO1 LDIO2 RDIO1 RDIO2 REV

2K4

F16 F17 G14 G15 G16 G17 H16 H17 K14 K15 K16 K17 L14 L15 L16 L17 M14 M15

LLV6+ LLV6LLV5+ LLV5LLV4+ LLV4LLV3+ LLV3LLV2+ LLV2LLV1+ LLV1LLV0+ LLV0LLV7+ LLV7LCK+ LCKTODT TCKE TWE# TCS# TRAS# TCAS# TBA0 TBA1 TA0 TA1 TA2 TA3 TA4 TA5 TA6 TA7 TA8 TA9 TA10 TA11 TA12 TCK TCK# TLDQS TLDQS# TUDQS TUDQS#

F
VCC1V8 DDR2VDD VCC1V8 DDR2VDD 5H05 60R 2H50 10u 5H06 60R 2H51 10u

G
7H00 H5PS5162FFR-S6C K9 K2 K3 L8 K7 L7 L2 L3 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 J8 K8 F7 E8 B7 A8 A1 E1 J9 M9 R1 VDD ODT CKE WE CS RAS CAS 0 BA 1 0 1 2 3 4 5 6 A 7 8 9 10 11 12 CK VDDL J1 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ

FH35

3H06 1K0

RES

T13 U13 T11 U11 T12 U12 T16 U16 U17

7H01-1 VPP1501BFG

LS GCK

OSCIN OSCOUT RESET SCL-TCON SDA-TCON

A1 B1 FH01 RES 1R0 RES 1R0 3H25 3H26 FH02 FH03 FH04 T9 P7 R7 T7 U9

MISC
IN OSC OUT TESTAGN RST SCL DB SDA ATTN TESTSE RTC50_60 TESTMOD 0 1 2 3 EE SCL SDA

T8 U8 R10 U5 T5 U6 T6 U7

FH06 FH05 1R0 1R0 RES

ROM_SCL ROM_SDA 3H27 SCL-TCON 3H28 SDA-TCON

GOE GSP2 GSP1 GSLOP

RES

50Hz_60Hz

R_L U_D SELLVDS

T10 U10 T17

0P 0N 1P 1N 2P 2N 3P 3N LLV 4P 4N 5P 5N 6P 6N 7P 7N LLV CKP CKN

A14 A15 A16 A17 B14 B15 B16 B17 C14 C15 C16 C17 D16 D17 E16 E17 F14 F15

RLV6+ RLV6RLV5+ RLV5RLV4+ RLV4RLV3+ RLV3RLV2+ RLV2RLV1+ RLV1RLV0+ RLV0RLV7+ RLV7RCK+ RCK-

SDRAM
NC

A2 E2 L1 R3 R7 R8 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 F3 J2 100n 2H48 2H47 FH34 100n 3H19 100R 3H20 100R

TDQ0 TDQ1 TDQ2 TDQ3 TDQ4 TDQ5 TDQ6 TDQ7 TDQ8 TDQ9 TDQ10 TDQ11 TDQ12 TDQ13 TDQ14 TDQ15

DQ

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

I
DDR2VDD

UDM LDM VREF VSSDL

LDQS

UDQS VSS A3 E3 J3 N1 P9

100R

100R

100R

100R

100R

100R

100R

100R

100R

100R

100R

100R

VSSQ A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

RES

7H01-2 VPP1501BFG

J
PX2A+ PX2APX2B+ PX2BPX2C+ PX2CPX2D+ PX2DPX2E+ PX2EPX2CLK+ PX2CLK-

B7 A7 B6 A6 B5 A5 B3 A3 B2 A2 B4 A4

LVDS
0P 0N 1P 1N 2P RXE 2N 3P 3N 4P 4N CLKP RXE CLKN 0P 0N 1P 1N 2P RXO 2N 3P 3N 4P 4N RXO CLKP CLKN

J
PX1A+ PX1APX1B+ PX1BPX1C+ PX1CPX1D+ PX1DPX1E+ PX1EPX1CLK+ PX1CLK-

B13 A13 B12 A12 B11 A11 B9 A9 B8 A8 B10 A10

1H00 B5 2H01 A5 2H02 A5 2H03 A5 2H04 A5 2H05 A6 2H06 A6 2H07 A6 2H08 A6 2H09 A6 2H10 A7 2H13 A7 2H25 A10 2H26 A10 2H27 A10 2H28 A11 2H29 A11 2H30 A11 2H31 A12 2H32 A12 2H33 A13 2H34 A13 2H35 A13 2H36 A13 2H37 A13 2H38 A14 2H39 A14 2H40 C5 2H41 C5 2H42 D5 2H43 E2 2H44 E2 2H45 F2 2H46 F2 2H47 J15 2H48 J15 2H50 G13 2H51 G14 2H52 F13 2H53 F13 2H54 D10 3H00 E13 3H01 C6 3H02 C6 3H03 D5 3H04 D5 3H05 G8 3H06 H8 3H07 J4 3H08 J4 3H09 J5 3H10 J5 3H11 J5 3H12 J5 3H13 J8 3H14 J8 3H15 J8 3H16 J8 3H17 J9 3H18 J9 3H19 J16 3H20 I16 3H21 C7 3H22 C7 3H23 E8 3H25 H4 3H26 H4 3H27 H6 3H28 H6 4H04 D5 4H05 D11 5H00 D2 5H01 E2 5H02 F2 5H03 G2 5H04 E13 5H05 F13 5H06 F14 7H00 G13 7H01-1 H4 7H01-2 J6 7H01-3 F9 7H01-4 B14 7H01-5 A3 7H02-1 C8 7H02-2 D8 7H03 D9 7H04 D10 7H05 C11 FH00 G4 FH01 H4 FH02 H4 FH03 H4 FH04 I4 FH05 H5 FH06 H6 FH34 I16 FH35 H8

10p

1M0

100n

16K

3H11

3H13

3H14

3H07

3H08

3H09

3H10

3H12

3H15

3H16

3H17

3H18

10

11

12

13

J7

14

15

16
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_515_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 59

SSB: TCON DC/DC

B08B
1 A

TCON DC/DC
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

B08B
RES RES RES RES +VDISP RES 2u2 2J45 2J44 RES 10u 2J46 RES 10u 2J47 RES 47u 25V 10u 2J48 2J49 10u 1 2 3 4 4J00-1 4J00-2 4J00-3 4J00-4 7J01 FDS9435A 8 3 7 2 6 1 5 100n 3J00 2u2 2J01 2J00 10u 2J02 2J03 2K2 2u2 8 7 6 5 1 2 3 4 4J01-1 4J01-2 4J01-3 4J01-4 8 7 6 5

A
FJ01 VLS_15V6 47u 25V 2J07 RES 2J08 10u 2J09 10u RES 2J10 2u2

+VDISP

VLS_15V6_B

6J06 6u8

5J06 SS34 2J04 10u 2J05

FJ00

RES 7J02 FDS9435A 8 7 3 6 2 5 1 RES 2J06 RES 3J02 39K 10n

RES

B
3J01 100K RES 3J05 10K 3J03 RES 2J11 39K 1n0

VLS_15V6 FJ02 VGL_-6V

C
7J00-1 ISL97653AIRZ

SGND1 SUPP

SGND1

PVIN LX 1 2 FBB

2J15 4n7

3J07 10K

30 27 26 36 15 16 17 18 24 25 9 7

COMP HVS EN PROT P C1 N P C2 N CTL CDEL VL CM2 GND_HS

34 35 29 28 21 20 23 22 10 11 13 2 3 4 8 40 39 31 SS24 20K RES 2J36 6J05 3J24 1n0 2J38 22u RES 2J39 RES 7J03 KTA1663 3 1 2u2 3J11 3J12 10K 13K VCC_3V3 RES 3J06 SGND1 2K2 FJ03 RES 3J09 VLS_15V6 2K2 RES 2J16 100n SGND1 2J32 3J10 RES 2J33 2J34 220n 39K 820p 220n 2J35 1u0 FJ11 16V 22u 100n 2J41 3J27 3J29 2K2 2J50 2K2 5J00 4u5 FJ13 VCC_3V3 FJ14 VGL_-6V

RSET POUT FBP DRN COM VREF FBN NOUT CB 1 LXL 2 FBL LDO-CTL LDO-FB TEMP

SGND1

VCC_3V3

2J17 2J18 FJ04 RES 3J08 2K2 2J19 2J20

100n 100n

SGND1 2J40 3J26 100p 240K 6J01 RB550EA 1 2 3

GSLOP

220n 4u7 4n7

5 4

E
SGND1

2J21

PGND 32 33 5 6 14

4J03

RES 3J13

2K2 2J22

2u2

FJ10 2 RES 2J24 FJ05 VCC1V8 3J25 12K RES 2J37 22u 16V 2J25 1n0

cK00

VLS_15V6_B

+VDISP

3J14

27K

SGND1

SGND1

SGND1 SGND1

SGND1

7J00-2 ISL97653AIRZ 42 43 44 45

VIA

VIA
VIA

VIA

53 52 51 50

RES

RES

120p

3J15

2J26

2K2

VIA

DISPLAY INTERFACING - VDISP

1J00 RES 3.0A T RES 5J07 +VDISP-INT 120p 3J16 2J27 2K2 RES 2J42 2J43 RES RES 30R RES 5J08 30R 3.0A T 10u FOR DEBUG ONLY 3J28 2K2 1 2 3 4 4J04-1 4J04-2 4J04-3 4J04-4 8 7 6 5 6J07 LTST-C190KGKT RES 1J01 FJ55 +VDISP

SGND1

H
100n 3J17 RES 2J28 RES 3J19 RES 3J20 27K SGND1 2K2 2K2

FJ06

6J02 RB550EA 1 2 3

1 2 3 4 FJ07 100n 2J30 4u7 RES 2J31 RES 3J21

4J02-1 4J02-2 4J02-3 4J02-4

8 7 6 5

I
PMEG1030EJ VGH_35V 3J22 10K RES 6J00

5 4

RES 7J04 2SB1767 2 3 2K2

1 RES 4J05 FJ09 RES 3J23

SGND1

RES 7J05 2N7002 2 3

1 GSLOP

1J00 G15 1J01 G15 2J00 B7 2J01 B7 2J02 B7 2J03 B8 2J04 B9 2J05 B9 2J06 B10 2J07 B11 2J08 B11 2J09 B11 2J10 B12 2J11 B10 2J12 C10 2J13 C7 2J14 C6 2J15 D5 2J16 D8 2J17 D5 2J18 D5 2J19 E5 2J20 E5 2J21 E5 2J22 F6 2J23 E7 2J24 F8 2J25 F9 2J26 G9 2J27 G9 2J28 H8 2J29 I8 2J30 I10 2J31 I10 2J32 D9 2J33 E9 2J34 E9 2J35 E11 2J36 E13 2J37 F13 2J38 E13 2J39 E13 2J40 E13 2J41 E14 2J42 G14 2J43 G15 2J44 B5 2J45 B5 2J46 B5 2J47 B5 2J48 B5 2J49 B6 2J50 E15 3J00 B7 3J01 B7 3J02 B10 3J03 B10 3J04 C10 3J05 B10 3J06 D8 3J07 D5 3J08 E5 3J09 D10 3J10 E9 3J11 E8 3J12 E8 3J13 F6 3J14 F7 3J15 G8 3J16 G8 3J17 H7 3J18 I7 3J19 H10 3J20 H10 3J21 I11 3J22 I12 3J23 J11 3J24 E12 3J25 F12 3J26 E13 3J27 E14 3J28 G16 3J29 E14 4J00-1 A8 4J00-2 A8 4J00-3 A8 4J00-4 A8 4J01-1 A11 4J01-2 A11 4J01-3 A11 4J01-4 A11 4J02-1 I11 4J02-2 I11 4J02-3 I11 4J02-4 I11 4J03 F5 4J04-1 H15 4J04-2 H15 4J04-3 H15 4J04-4 H15 4J05 J7 5J00 E12 5J06 A9 5J07 G14 5J08 G14 6J00 I11 6J01 E14 6J02 I5 6J05 E12 6J06 A8 6J07 G16 7J00-1 C6 7J00-2 G6 7J01 A8 7J02 A11 7J03 E8 7J04 I11 7J05 J11 FJ00 A9 FJ01 A12 FJ02 C10 FJ03 D10 FJ04 E3 FJ05 F9 FJ06 I8 FJ07 I10 FJ09 J11 FJ10 F12 FJ11 E12 FJ13 E13 FJ14 E14 FJ55 G16 cK00 F6

2J13

10u

2J14

3J04

RES 2J12

3K3

4u7

2u2

12

37

AGND

SUPN

41

38 1

2J23

10n

46 47 48 49

57 56 55 54

2u2

1n0

750K

100p

3J18

2J29

10

11

3K6

12

13

14

22u

15

16

17
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_516_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 60

SSB: P Gamma, VCOM & NVM

B08C
1 A

P Gamma, VCOM & NVM

2 3 4 5 6 7 8 9 10 11 12 13 14 15
U3 F5 1K00 J14 2K00 B2 2K01 B2 2K02 B3 2K03 B4 2K04 B4 2K05 B5 2K06 D7 2K07 D7 2K08 D8 2K09 D8 2K10 E7 2K11 E7 2K12 E8 2K13 E8 2K14 G7 2K15 G7 2K16 G8 2K17 G8 2K18 G5 2K19 G4 2K20 G3 2K21 G4 2K24 C13 2K25 C13 2K26 C14 2K27 D13 2K28 G12 2K30 C12 3K00 B2 3K01 B2 3K02 C2 3K03 B3 3K04 C3 3K05 B5 3K06 D3 3K07 D5 3K08 D3 3K10 E3 3K11-1 C8 3K11-2 C8 3K11-3 C7 3K11-4 C7 3K12-1 E7 3K12-2 E7 3K12-3 E8 3K12-4 E8 3K13-1 G7 3K13-2 G7 3K13-3 G8 3K13-4 G8 3K14 G4 3K15 G4 3K16 G5 3K17 G5 3K34 G8 3K35 J13 3K36 K13 3K40 B11 3K41 B11 3K44 B13 3K45 B13 3K46 B14 3K49 C13 3K50 C14 3K51 C13 3K52 G13 3K53 G13 3K54 G14 3K55 H14 3K56 H14 3K60 B12

B08C
A
3K61 C12 3K62 H12 4K00 C9 4K01 C9 4K02 D9 4K03 E9 4K04 F9 4K05 F9 4K06-1 F4 4K06-2 F4 4K06-3 F4 4K06-4 F4 4K07 C9 4K08 C9 4K09 C9 4K10 C9 4K11 D9 4K12 D9 4K13 D9 4K14 E9 4K15 E9 4K16 E9 4K17 F9 4K18 F9 4K19 F9 4K20 F9 4K21 F9 4K22 C9 6K00 G12 7K00 B4 7K01 G4 7K02 H4 7K03 D13 7K04 G12 7K05 E13 7K06 F13 FK00 B2 FK01 C2 FK02 B3 FK03 B4 FK04 D3 FK05 D3 FK06 D3 FK07 F4 FK08 G4 FK10 C10 FK11 C10 FK14 D10 FK15 D10 FK16 D10 FK18 E10 FK19 F10 FK20 F10 FK22 F10 FK23 F10 FK24 F10 FK27 B15 FK28 B15 FK29 B15 FK33 J13 FK35 G12 FK36 H12 FK37 H13 FK38 B15 FK40 C10 FK42 C10 FK44 C10 FK46 D10 FK47 E10 FK51 F10 FK52 F10 FK53 H12

VCC_3V3

ASIC OPTIONS

3K40

3K41

RES 3K60

RES 3K44

RES 3K45

RES 3K46

10K

10K

10K

6K8

6K8

100K 0.5%

FK00

22K 0.5%

10K

VREF_15V2

VLS_15V6

VCC_3V3

VLS_15V6

VLS_15V6

VLS_15V6

2K2 0.5%

2K02

3K05

2K00

2K03

2K04

3K03

3K00

2K05

2K01

100n

100n

100n

SDA-TCON SCL-TCON 10u

1u0

1u0

6K2 0.5%

FK02 18K 0.5% 7K00 ISL24837IRZ-T13 29

FK03 5 21

3K01

FK38 FK27 FK28 FK29 3K61 10K RES 2K24 10K RES 2K26 3K49 10K RES 2K30 1n0 3K51 10K RES 2K25 1n0 3K50 1n0 1n0

50Hz_60Hz

SELLVDS R_L U_D

3K04

FK01 10K 0.5%

AVDD VSD OUT1 OUT2 INPCOM|DVR_OUT OUT3

2 3 4 7 8 5 6 7 10R 3K11-3 3K11-4 10R 3K11-2 10R 3K11-1 8 10R 9 10 11 100n 2K07 100n 2K09 2K06 100n 2K08 3K07 4K00 RES 4K22 RES 4K07 RES 4K08 RES 4K09 4K01 RES 4K10

FK10 FK40 FK11 FK42

VH255 VH191 VH127 VH31 VH159 VH127 VH63 VH247 VH95

3K02

27

C I2C SWITCH (VGA VCOM) VCC_3V3

2K27 RES 100n

REFIN_INN

OUT4 OUT5

32 3K06 3K3 0.5%

SCL-TCON SDA-TCON

REFIN INN5

FK44

SET

OUT6 INN6

1 100n

28

FK04 FK05 VCC_3V3

NC

13 12

SCL SDA

2K2

OUT7 INN7

16 15 18 17 19 22 23 24

RES

30

SET_COMP OUT8

7K03 PCA9540B

3 VDD SC0 NC 5 SC1 8 SCL-TCON

D
I2 C -BUS CTRL

10K

NC

31

V_THERM

INN8 OUT9

RES 4K11 RES 4K12 RES 4K13 4K02

FK14 FK15 FK16 FK46 FK47

VH127 VH95 VH31 VH63 VH0 VL0

SCL_VGA

RES 3K08

1 2

SCL SDA
INP FIL

SD0 NC 4 SD1 7 SDA-TCON

FK06 3K10

14

BANKSEL OUT10

10R 3K12-3

3K12-1

10R 3K12-2

10R 3K12-4

10R

34 35 36 37 38 39 40 41

OUT11 OUT12 VIA

VSS 6 RES 4K14 RES 4K15 RES 4K16 4K03 FK18

VL127 VL95 VL31 VL63 SDA_VGA

10K

VCC_3V3

OUTCOM INNCOM GND 6 20 GND_HS 33

25 26

OUTCOM INNCOM

E
BSH111 7K05 2

3 100n 2K11 2K10 100n 2K12 100n 2K13 100n

FK07

RES 4K17 RES 4K18 4K04 RES 4K19

FK19 FK20

VCOM BUFFER

+VDISP RES 4K20 RES 4K21 4K05 U3 FK22 FK23 FK24 FK51 INNCOM 6 8 2K18 7 5 FK52 8 7 6 5

VL127 VL63 VL247 VL95 VL31 VL159 VL127 VL191 CS_L

1 BSH111 7K06 3 2

F SSB-TCON EEPROM
VCC_3V3

1 2 3 4

4K06-1 4K06-2 4K06-3 4K06-4

68p

10R 3K13-2

3K13-1

10R 3K13-3

10R 3K13-4

3K34

10R

7K01 PBSS4540X 2K19 10u

0R51

3K17

100n 2K15

2K14

3K14

100n 2K16

100n 2K17

100n

G
VCOM

5K1 0.5%

MSS1P4

6K00

OUTCOM

2K2

G
3K52 3K53 3K54 2K0 6K8 6K8

2K28 100n

FK35

FK08 22u 16V

3K16 8 750R 0.5% 7K04 M24C64-WDW6

RES 2K21

0R51

2K20

3K15

100n

FK36 7K02 PBSS5330X 1 2 3 0 1 2

(8K 8) EEPROM
ADR

WC SCL

7 6 5

FK37 3K55 3K56 2K0 2K0

WP_TCON
ROM_SCL ROM_SDA

H
100R 3K62

SDA 4

FK53

I
VCC_3V3

3K35

10K

DEB VCC_3V3

DEB 1K00 1 2 3 4 5 6 7 8 9 10 11 13

ROM_SCL ROM_SDA

WP_TCON
BYPASS_MODE

FK33

RESET

SCL-TCON SDA-TCON

12

DEB 3K36

10K

BM11B-SRSS-TBT

K 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_517_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 61

SSB: MPD

B08D
1

MPD
2 3 4 5 6 7 8 9 10 11
2L00 G3 2L01 G3 2L02 G3 2L03 G3 2L04 G4 2L05 G4 2L06 G4 2L07 G4 2L08 G5 2L09 G5 2L10 G5 2L11 G5 2L12 D9 2L13 C11 2L14 C8 2L15 C8 2L16 B11 3L00-1 F3 3L00-2 F3 3L00-3 F3 3L00-4 F3 3L01-1 F4 3L01-2 F4 3L01-3 F4 3L01-4 F4 3L02-1 F5 3L02-2 F5 3L02-3 F5 3L02-4 F5 3L12 C10 3L13 C10 3L14 B10 3L15 B9 3L16 B9 3L17 B8 4L00-1 D2 4L00-2 C2 4L00-3 C2 4L00-4 C2 4L01-1 E2 4L01-2 E2 4L01-3 D2 4L01-4 D2 4L02-1 F2 4L02-2 F2 4L02-3 E2 4L02-4 E2 7L00 C8 7L01 B10 7L02 B8 FL00 C5 FL01 C5 FL02 C5 FL03 D5 FL04 D5 FL05 D5 FL06 E5 FL07 E5 FL08 E5 FL09 E5 FL10 F5 FL11 F5 FL12 C10 FL13 B10 FL14 A9 FL15 B8

B08D

A
+VDISP FL14 2 7L02 2SC5886A 3 1 VREF_15V2

3L14

+VDISP 3L17 1R0 7L01 NJM2125F 4

FL15 22u 16V

3L16 33R 0.5%

3L15

1 3

FL13

4L00-4 RES

FL00

CS1

C
3 2

7L00 ISL24016IRTZ 1 2 3 IN 4 5 6 7 REFH REFL INA + + 32 31 30 29 27 26 25 10 11 13 14 15 16 34 35 36 37 38 39 40 41 42

ASIC_CS1 ASIC_CS3 ASIC_CS5 ASIC_CS7 ASIC_CS9 ASIC_CS11

FL12

10K 0.5%

33R 0.5% 2

2L14

100n 2L15

3L13

100n

82K 0.5% 2L16

FL01

CS2

RES 7

4L00-2 RES

FL02

CS3

4L00-1 RES

FL03

CS4

CS5

RES
VCOM

NC NC

OUT7 INB OUTA OUTB NC

4L01-3 RES

18 FL05
CS6

17 2 7
NC

4L01-2 RES

FL06

CS7

VIA

4L01-1 RES

FL07

CS8

4L02-4 RES

FL08

CS9

4L02-3 RES

FL09

CS10

4L02-2 RES

FL10

CS11

FOR 32" / 40"

F

4L02-1 RES

FL11

CS12

1 3L00-1 8

4 3L01-4 5

10R 3L00-2

10R 3L00-4

10R 3L01-3

3L00-3

3L02-1

3L02-2

10R 3L02-3

3L01-1

10R 3L01-2

3L02-4

10R

10R

10R

10R

10R

10R

2L00

100n 2L07

100n

100n 2L09

100n 2L03

100n 2L10

100n 2L11

2L04

100n 2L05

100n 2L01

100n 2L02

100n

100n 2L06

100n

2L08

10R

33

12

1n0

4L01-4

FL04

2L12

CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9 CS10 CS11 CS12

OUT1 OUT2 OUT3 OUT4 OUT5 OUT6

CS_L

62K

4L00-3

1 2 3 4 5 6 7 8 19 20 21 22 23 24

3L12

100n

2L13

AVDD

28

GND_HS

GND

10

11
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_518_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 62

SSB: Mini LVDS

B08E
1

Mini LVDS
2 3 4 5 6 7 8 9 10 11 12
1KA1 B10 1KA2 B5 2M01 E11 2M02 E6 2M03 H9 2M04 H5 3M00 B9 3M01 B9 3M02 B4 3M03 B9 3M07 B4 3M08 B9 3M09 B4 3M10 C4 3M13 E7 3M14 E7 3M15 E2 3M16 F2 3M17 H10 3M18 H5 4M00-1 E4 4M00-2 E4 4M00-3 E4 4M00-4 E4 4M04-1 E4 4M04-2 E4 4M04-3 E4 4M04-4 E4 4M08-1 F9 4M08-2 F9 4M08-3 F9 4M08-4 F9 4M11 F4 4M13-1 F9 4M13-2 F9 4M13-3 F9 4M13-4 F9 FM00 B5 FM01 B5 FM02 B5 FM03 B5 FM04 B5 FM05 B5 FM06 C5 FM30 E5 FM31 E5 FM32 E5 FM33 E5 FM34 E5 FM35 E5 FM36 E5 FM38 F5 FM40 F5 FM41 F5 FM42 F5 FM43 F5 FM44 F5 FM45 F5 FM46 F5 FM47 F5 FM48 F5 FM49 G5 FM50 G5 FM51 G5 FM52 G5 FM53 G5 FM54 G5 FM65 H5 FM69 B10 FM70 B10 FM71 B10 FM72 B10 FM73 D10 FM74 D10 FM75 D10 FM76 D10 FM77 D10 FM78 D10 FM79 E10 FM80 E10 FM81 E10 FM82 E10 FM83 E10 FM84 E10 FM85 E10 FM86 E10 FM87 E10 FM89 F10 FM90 F10 FM91 F10 FM92 F10 FM93 F10 FM94 F10 FM95 F10 FM96 F10 FM97 C5 FM98 B10

B08E

FM98 81

1KA1 82

B
GSP2 GSP1 GCK GOE U_D_INV CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9 CS10 CS11 CS12 VCOM VH255 VH247 VH191 VH159 VH127 VH95 VH63 VH31 VH0

1KA2 FM00 VGL_-6V VGH_35V FM01 FM02 FM03 FM04 FM05 FM06 FM97 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 82
GSP2 GSP1 GCK GOE U_D CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9 CS10 CS11 CS12 VCOM VH255 VH247 VH191 VH159 VH127 VH95 VH63 VH31 VH0 LLV5+ LLV5LLV4+ LLV4LLV3+ LLV3LCK+ LCKLLV2+ LLV2LLV1+ LLV1LLV0+ LLV0-

3M02 3M07 3M09 3M10

68R 68R 68R 68R

3M00 3M01 3M03 3M08

68R 68R 68R 68R

VGL_-6V VGH_35V FM69 FM70 FM71 FM72

FM73 FM74 FM75 FM76 FM77 FM78 FM79 FM80 FM81 FM82 FM83 FM84 FM85 FM86 RES 3M13 3M14 68R 68R 1 4M08-1 2 4M08-2 3 4M08-3 4 4M08-4 1 4M13-1 2 4M13-2 3 4M13-3 4 4M13-4 8 7 6 5 8 RES 7 RES 6 RES 5 RES VCC_3V3 FM87 FM89 FM90 FM91 FM92 FM93 FM94 FM95 FM96

RLV7+ RLV7RLV6+ RLV6RDIO2 R_L RDIO1

1 2 3 4 4 1 2 3 RES 3M15 3M16 68R 68R

4M00-1 4M00-2 4M00-3 4M00-4 4M04-4 4M04-1 4M04-2 4M04-3

8 7 6 5 5 8 7 6

RES RES RES RES

FM30 FM31 FM32 FM33 FM34 FM35 FM36

VCC_3V3 FM38 FM40 4M11 FM41 FM42 FM43 FM44 FM45 FM46 FM47 FM48 FM49 FM50 FM51 FM52 FM53 FM54 VLS_15V6

2M02 RES 100n

GSP2 GSP1 REV LS RLV5+ RLV5RLV4+ RLV4RLV3+ RLV3RCK+ RCKRLV2+ RLV2RLV1+ RLV1RLV0+ RLV0-

GSP2 GSP1 REV LS LDIO2 R_L LDIO1 LLV6+ LLV6LLV7+ LLV7-

VLS_15V6
VL0 VL31 VL63 VL95 VL127 VL159 VL191 VL247

G
VL0 VL31 VL63 VL95 VL127 VL159 VL191 VL247

3M17

FM65 3M18

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 196250-80041

E
2M01 RES 100n

20R

2M03

196250-80041

20R

2M04

10u

RES

10u RES

10

11

12
1 2010-01-22

BR-M-50 PCB SB SSB DIGITIAL

3140 123 6483

18980_519_100329.eps 100329

2010-Apr-06

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 63

Layout Small Signal Board (Top Side)

2J08

3J07 2J15

2J23

3J04 2J12

1M20
2725 2727 2724 2728 2726 2723 3791 2722

2J05 2J04

2J16

3J06

3J09

3J08

2J11

3J03

2J19

3J19

1KA2
4M00 4M04

1KA1
7H02
4H05

5J06

1K00

3794

3793

3795

3792

3790

6J06
2J03
3J01

3J16 3J15

2J27 2J26

CK00

4K08

4K11

4K13 4K22

4K09

2J34 2J22

4K19 4K17 4K05 4K21

3K12 3K07 2K03 2K04

3K34

7J00
2J35

2K12

2K13

2K11

2K10

4K12 4K02

2J18 2J17

7K04

2J14

4K18

4K04

2140 5J00

7J01

2J13

4J04

3K10

3K05

2J49

7K03

7800

7K02

2J43

2J46

2J44

3K00 3K01 3K02

6J07

2807 3112

2K01

U3

2J01

2J00

3K16

7K01

7803

6800
2806

7801

3K14 3K15
3806

6122

2197

3H02

5115
7116

2K19

3808 3807 3809

4K06
3H14 3H18 3H17 3H11 3H07 3H08 3H01 2H41

3805

3H13

3H15

3H16

3H12

3H10

3H09

1H00
2H40

2628 2608

2186

2187

3615

2609

1M99

2190

6103

5104 5116
7117

2191

2185
5120 5121

1F00

2514 5506

7600
3600 3602 3614 3612 3613 3607 3609 3606 3608 3610

3782 2729

3741 2706

3605

4308 5310
3784 2720 3785 2719 37A8 2303

2159

3611

6124

5103

2164

2181

2182

2196

2302 2307 2376

2195 2151

5307 5304 5306 2320

2150

1M95

5119

2551

2286 2291

2288

2301

2314

2717

1700

2285

7301

3619

3617 3618

2287

3356

5303 5305 2313 2316

2311 2317

2308 2312

2158

6125

6123

3788 3735 3798 3758 3787

6301

3355

2162

3B05 2B05

3B09 2B09

3B08 2B08

3B06 2B06

2E05 2E02

2B00

2B02

3B11 2B11

2422

3711 4701 4702 3411

3E05 3E02

5213

3B12

1735

1211

3B44 3B43

6401

2B54

2405

7400

2411

3B49

C400

2424 2425 3420 3421

2412

3427

2400

2B50 3B50 3B40

3428

7406

7411 7404

1F01

3B41

2B51

3B48

6701

5403
1C08

6403

6700

2B52

3748

3749

2C14

3C19

2C09

3C10

2C08 3C08

6C07

6C06

6C05
3A00

2F00 2F01

2416
1C14

5405

2B58

3436

2401

3767

3770

2407

3B51 3B53

7403

2B59

2404

7407

7412 7413

2406

7709

2B56 3B45 3B46 2B57 3B52

7216
4306

2B55

2409

7405

2408

3415

2415 5402

2403

7402
3414

2402

1403

6402

2D14

3C07

2C07

2296

1C05 1C07
1705

1D01
3923
3905 3904

1A01

1706

2A00

3A02

2A09

1C15

1C02
3C13 2C18 3C14 2C17

1701
3C17 3C24 3C23 2C16 3C16

1C03
6B01
3901 3902 4900 4901

1C10

1C09

1A02

6A00
4A00 2A01 3A03

4307
2901

2213

2B37

3B34

6E06

2B39

2E16

4E04 3E23 3E26

3E24

6B00

2B20

2B19

3B16

3B15

7902

2B31

5C01

3B28

2B36

3C05

3C22

3C04

2C05

3C25

2C06

3C06

3C02

2C04

3B31 2B34

3C00

2C01

6C00 1C00

2C00

2B30 3B27

6C01

6C02

5C00

3C20

6C03

3924
3900 2900

3B32

2B35

2B33

3B30

6C08

5C03

6C09

3C21

5C04

6C10 6C04
5C02

5C05

2C15

3C18

3B33 2B38

2A06

6C19

6C20

2B32

3B29

3C12

2C21

2C20

2C19

3914

2E13 3E18

3C01

2C03

2C02

6E05

2E08 3E14 5E02 2E12 5E04 3E15 5E01

7219

4E02

6900

6914 6913

5E05 2E11

3267

3A10 2A05

2A07

2A10 3A15

7218
3268 3269

3E20 2E14 2E15 3E19 3E22 3E21

6916 6915

2A04

3A09

7E01

3E27

3E25

1A03

1201

3270 2293

2A11

6E04

6E02 6E03 6E01

7217

6917

1C16

1C17

1C18

1C19

1B05

1B01

1C01

1901

1B02

1E01

3104 313 6483.1

18980_550_100329.eps 100329

2010-Apr-06

7D00

3717

2E04

2E00

2B01

3E00

3B00

3B01

3B03

3E04

3B02

2B03

2704

3B07 2B07

3110 2B12

5117

5118 2173

5700

2174

7107

2549 3796 3715 3709 2703 3716 3719 3718

2716

2702

2B14 3B14 2B15

3350

2175

3360

2304

2315

2289

5230 5227

5229 5226

5228

2148 2147

2170

2124

2310 5302

2309

2B44

2B43

2168

2123

2290

3353

2375 2297 4209

7601

2B41

2321

2B40

7700

2306

5324

2B25

2322

2B24

2318

2319

4309

2305 5301

1402

5404

1703
2374 2372

1702

2803

1F02 1707

1J01 1J00 2J42

3J28

2J38

2J39

2K18 3K06 3K17

2K00

3H05

7802

2K02

5H02

2H45

2K05

4L00

2K14

3K08

5H03

4J00

6J05

3J00

2J02

2K15

4L01

3J13 4J03

4L02

2H46

2804

2K17 3K13 2K16

7H01

2701

7H00
3707

2700

7H05
3706

4M08 4M13

1902

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 64

Layout Small Signal Board (Bottom Side)

FK20 FM98 FM95 FM96 FM93 3M17 3H22 3H21

FM92

FM89

FM86

FM84

FM78

FM74 FK14

FK42

FL09 3M18 FM97

FM52

FM49

FM47

FM45

FM35

FM34

FM33 FL08

FL06 FL03

FM06 FM00

2J10

FJ02 FJ01

FM85

3J05

FK15 FM82 FM77 FM79 FM73 FK16 FK11

FM94 FM91

2M01
FM83 FM90

FM65

2M04

FM54

FM44 FM51 FM48 FM46 FM50

FM42 FM36 FM31

FM32 FL07

FL05 FL02

FM81

FL10

FM53 FM76 FM80 FM75 FM71

FM43

FM41

FM01 FJ09 FL00 FM03

2M03

FJ03

2M02
FM30

FL01

7H04

7H03

2H54

3K60 3K46 2K30 3K50

3K61 2K26

3M13 3M15 3H25 3H26 3H28 FM72 3M08 FH06 3M16 FK29 FH35 3H27

FL11 3M03 3M01 3M00 FM38 FM69

FL04 3M07 FM04 3M09 3M10 FM05

FM02

FJ04

3J22 7J05

3M02

2J09 2J07
FJ06

7J02
4J01
3J11

2J06
3J02
FJ00

6K00

3J23 2J30
4J02

3H23

2J31 3J20

F753 F754 F755 F757 F758

FK38

3M14 FM87

FH05

FH02

FM70

4K03 4K20

4K16

3K40

3K45

2K25

3K51

4K10 4K00 4K07 4K01

3K41

FK19

FK47

FK40

FK44

FK37

4M11

FM40

3K56 3K52
FK04

3K36 3K35

FH03

2L12

FK51

4K15
FK18

FH00 3H06 2H34 2H29

FK05 FK06 FK46

FK53 FK35

FK36

2J32
2J40 3J10 2J33

3K62

FJ07

3J26

2L08

2L09

2H28

2H53

2H52

FL12

2H04

2H27

2H05

2H06

3L02

2H09 2H02 2H25

3J24 3J25

FK52 FL14

2J36 2J37

2H37

2H13 2H39

2H01

2H32

2K24 3K44
FL15 FK27

2H08

FK10 FK01 FK08 I809 FK02 FK00

2K09
2K27

5802 5801 5800

3K49

5J08 5J07

2J50

3J29

2H36

3H19

3H20

FH34

2H10

2H07

2L10 2L11

3K11

2H48

2H03

3L00

7L00
2L14 3L14 3L13
FL13

2K07 2K08

F829

FJ10

2J41

FJ14 FJ13

2J47 2J45

7K06

2L03

2K06

3J27

2H47

FJ55

2L05 2L04 2L02 2L01 2L00 3L15 3L16 3L17

2H50

FK03

3L01

6J01

FK23

7K00

2805

2J20

2L07 2L06

3J14 3J12

2J24

2L13 3L12

FK22

FK24

3K54

2K28

FH04

FH01

4H04

3H03

6J00

3J21

4K14

FK28

3K55 3K53

7J04

3J18
2J29 3J17

2J28

6J02

2H42

3H04

FJ05

2J21 4J05
FJ11

7J03 2J25
2J48

2H26

2H30

F766 2H38 2H33

3H00

2H31

2H35

2H44

3K04

2H43

5H00

5H01

3K03
F800

4808 4807 4806

7L01

37A3

F770

I804 I806 I805

5H04

5H05

5H06

37A1

F764

2H51
F771

2L16

2L15

3804 3802 3803

I802

37A4

37A2

I808

F765

I123

2139
I119

3143

F831

4802 4801 4800

7L02

7K05
I801 I800

2K21
I807

FK07

2K20

4805 4804 4803

3145

I118

2165

I117

F748

F746

F131

I718

2135
I104

3760

3105 3106

F801

3773

F816 F702

F815 F806 F810 F809 F805

2602
2600

F763

2188 2189

1G51
3759

3119 3139

2193 2166

3765

37 80

F749

3762

F747

2192
I120

I122

F750

2126 2125

F102

3763
F751

F103

3616

F600

3109

2607
FF04

F752

3F02 3F03

F124 I107

F760

FF07 F701 F821 F817 F814 F813

2601

F125

2134 3126 2127 2133 3127 2128 2132 3128 2131 2198 2129 2130

F104

3772

3726 4700

F723

FK33 FF08 FF09

F828 F737

F827 F826 F825 F822

F819

F808 F820 F818 F812 F811

F807

FF00

5F00
FF01

2167

F105

I136

2604
3774

3F00
3776 3777

F824

F823

3701 3705
FF06

2603

3779

3778

3775

3700 3704
3740
FF05

2605

2606 3604 3603 3601

5705
2712
I742 I731

3F01
FF02

F107

FF03 I727

I713

2567

I711

37 39

5F01

F756

F108

4311

5311

2566

I743

FB03

3B38

3B39

2B42

IB17 F110

2334

F205

2332

1301

3B37
3337 3336
I318 I314 F742

IB16

3B35

IB14

F503

5500
F502

I726

I732

F109

F111

4301

4300

I707 3708
I701

F242

3335

2333

3339

3349

3753 3752

I315

I328

37 81

3721 4704
F741

I700 I710

2505

F716

2521

3344 3343
F303 F302

3720 4703 4706

3755 3754

2502 2501

2506

F112

I325

2524 2565

2523 2564

I307

I308

I327

3B36

3783

I715

2581

4705
37 36 3743
IB18

2522 2515
IB15

2503 2584
I757

2504

F133 I756

2623

3742

2513 2630

3621

I337 F305

I300

2335
I319

2516

7315

I324

3359
2569

2336 2337 2338 23 78 2377

I301 I311

I312 I313

I321

IB22

2532

2558

2562 2563

I310 I309

2508

I304

F500

I505

2579

3B47 2538 2534 2528 2529 2530

2340 2339

2559

2541

I302

I507

2580
2596

2519 2520 2582

2531

2574

2510
3142
F134

3107

2509

F120 I131

5505 2595

2341
I336

I305 I338 I306 F306 F301 I317 I733 I316 I754

3144

2176

2561
2560

2540

2542

2575

2576

2545

53 08
3331 4304 43 03 3332

2573
IB64

2543 2544
CXXX

F135

2713

3134
I137

3130

3703

F132

F739

F119

I126

37 89

23 73

7702

2571 2588 5501

2568

2143
2421
FC15 IC09 FC08

5323

IB63 IB29 IB35 IB31 IB62 IB41

IB37 IB27

2149

2B17 2B16

3500

IB61

IB25

I735

F761

3714 3710
F740

7703

F705

2144

5309 4310

3352 3351

F300

IB65

2550
2705
F738

F745

3761

3133
I139 I138

I134

I753

I504

3786

2156

2152 3135

I125

2145

F118

F121

F706

F122

F704

FD05

IB33

IB24

2598

IB26

I503

4708

37A6 37A7

FD04

IB45 IB39 IB59 F216 IB38

IB43

IB47

IB28 IB34 IB36 IE04

6706
IE05

4707
F736

F708

I708

2142

I741

6400
I422 F408

IB44

IB42

IB46

IB40 IB30 IB32 IE01 IE02

3768
F721

3408 3409

7701

2711

3747 3728 3764 3734

ID04

5D00

2D11

I502

3413

I750

I424

3723
3E03
IB23 I749

I433

FD01

3727

3722 3724

2593 2592 2E03

FD06 2D15 3D09 2D16 3D10

I744

I423

3751
I752

I906

3412
F416 F413

I425

I739

6707

3746

5401

4904 3906

3738

I755

FF10

6708

3769

IB50

2423

6D01

6D02

6D00

2426

3733

I429 IB19 I432

7B01

5400

2D12

5212
A213

2427

2709 2710

3425

A210

A211

3756

F411

7710

3417

I405

F410 I415

3424

IB52

2419

7908

IB53

F414

I406

7408

3423

F405

F401

I401

I413 F400

2420

3416

F404 I438

5406
F406

A214

5504

I725

3744

IE03

3730

I734

F725

3729 3702

2B53 3B42
I412

2414 2413

I417

I746

I907

3410

3405

I745

I419

6902

3430 2431

2430 3434

I440 I437

6709

3435

3418
3433
F409

7410 7409
I434

3422

3771

3737

3731

FD00

A212

2721

3431

2279 2278 2281 2277

2282

3262

4401
I441

3400 3401

I737

7401

3263

I738

F402

I403

I407

I414

3757

FF11

I421 I410

I442

I416

3426 3419

F724

2246 2245
2263 2262 3261 2243

I244 I242

I747

I436

3432

I435

I411

I431

2280

2247
I234

F213 F415

F246

1D03 1D00 1D02

FD03

F215

7213

2294
F909

2237

I235

I228 3C09 2C11 FC02 IC04 FB08 U1 FC01 IC07 2C10 2C13 3C11 2C12

F718

F717

3437

I443

F208

3406

2258

F209

2236
I240

I238

3231 2228

IC06

IC05

IB21

5225 5207

IB49 I243 F243

F236

2244
IC08

3439

7414

3438

F412

3238

I245

IB48

IB51

2432

2233

I430

2418 2417
I418

I420

I231

I233

FD02

7901

F207

4211 4210
F244

I237

2235 32 34
I239

I255 IC11

2250 2252
3247 3246

I249

3236

I247

3254

32 30 2226
F206

3235

F227

F214 F240 I232

2240 3255
3224

3A01
IB67 FA02

FA01

F241

3223

2230

2229
I230

3232

FC00

IA01

3A13

3A14

F237

IB66

FA09

F908

F907

F417

F906 F911

A225

FE00 FA07

7903

3A17 4A03
FA06

F204 F905 F743

7E00

6901
4208

3A16 2A08

1213
FE09

FE12

4A02
IA04 FF12

3903

FF13

IA03

IA08 IE00

I222

7A00
IA09 IA02 IA05 FA03

F719 IA10 IB03 IB09 FA04 IC14 FC14 FC13 FC12 FC10 FC11

F203

IC13

3228 2225

2231

2251
F245

7212

2232
FA00

3244 3241

IC03 FC03

I251

1C06

IB05

F202

3A04

FE11

2295
2292 3266
F201

7905

2283

FE08

3918 3922

3915 3916

6911

6909 3919
I905

3917

I903

2284

7906
I904

4305

FE10

7907

I221

3A12

3A11

3264
3265

F235

4E03

5222

3E16 5E00

3E10 3E17 2E09

6A01
FA08 IB02

IB00

FB00

F759

3911 3111

6910

2E07

2E10 3E13
FE04

5E03

4A01 2A02

IB10 F900 IB08 FB01 F903 IB04 IC10 FB02

FC09

I254

6912

3921 4903

I220

FE01

FE02

FE05

FE06

FE07

IA00

1B03

6E00

IE06

IB01

7904

FE03

3912 3913 6906 6907

F913

I902

1B04

FB06

I901

F901

7900
F904 FB07

IB13 FC06 FB04 IB12 FC05 FC04 IB06 IC02 FC07 IB07 IC01

3920 4902

F912

1E03 1E00 1E05

1E02 1E04

I900

F744

6903

F902

3104 313 6483.1

18980_551_100329.eps 100326

2010-Apr-06

3910 3907 6905

3908 6904

F123

3713 3712

F707

2141

F115

2500

I130

2597

2535

F116

5502

2577

2527

3140 2163 2161 2155 2154 3138 3125 3122

7302

I322 I320

3357 3354 2517

2518

2526 2537

3131

I135

2157
I132

I129

3136
I127

2180

I323

3622 2552 2553

2533

2512

3358

3745

IB20 I714

3623

F602

2629 3620

2622 2621 2620 2625

2136 3129 2137

F113

F114

2153

I128 F117

2626
F501

3624

2160

2146

I716

2627

7705

37A5 2599 2570 2536 2525

2624

I303

5503

I506

F601

7708

F106

2138

I105

3108

I106

Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 65

SSB: SRP List Explanation

Example
Net Name Diagram

Personal Notes:

1.1.

Introduction
SRP (Service Reference Protocol) is a software tool that creates a list with all references to signal lines. The list contains references to the signals within all schematics of a PWB. It replaces the text references currently printed next to the signal names in the schematics. These printed references are created manually and are therefore not guaranteed to be 100% correct. In addition, in the current crowded schematics there is often none or very little place for these references. Either there will be an SRP reference list for a schematic, or there will be printed references in the schematic.

+12-15V AP1 (4x) +12-15V AP4 (4x) +12-15V AP5 (12x) +12-15V AP6 (4x) +12-15V AP7 (8x) +12V AP1 (4x) +12V_NF AP1 (2x) +12VAL AP1 (2x) +25VLP AP1 (4x) +25VLP AP2 (1x) +3V3-STANDBY AP5 (3x) +400V-F AP1 (2x) +400V-F AP2 (2x) +400V-F AP3 (2x) +5V2 AP1 (6x) +5V2 AP2 (1x) +5V2-NF AP1 (1x) +5V2-NF AP2 (1x) +5V-SW AP1 (6x) +5V-SW AP2 (1x) +8V6 AP1 (3x) +AUX AP1 (2x) +AUX AP2 (1x) +DC-F AP1 (2x) +DC-F AP3 (2x) +SUB-SPEAKER AP5 (1x) +SUB-SPEAKER AP6 (2x) -12-15V AP1 (4x) -12-15V AP4 (6x) -12-15V AP5 (14x) -12-15V AP6 (6x) -12-15V AP7 (8x) AL-OFF AP1 (2x) AUDIO-L AP4 (1x) AUDIO-L AP5 (1x) AUDIO-PROT AP5 (3x) AUDIO-R AP4 (1x) AUDIO-R AP5 (1x) AUDIO-SW AP5 (1x) AUDIO-SW AP7 (1x) BOOST AP1 (2x) CPROT AP4 (2x) CPROT AP5 (1x) CPROT-SW AP5 (1x) CPROT-SW AP6 (2x) -DC-F AP1 (2x) -DC-F AP3 (2x) DC-PROT AP1 (1x) DC-PROT AP5 (2x) DIM-CONTROL AP1 (2x) FEEDBACK+SW AP6 (2x) FEEDBACK-L AP4 (2x) FEEDBACK-R AP4 (2x) FEEDBACK-SW AP6 (2x) GND-AL AP1 (2x) GNDHA AP1 (40x) GNDHA AP2 (20x) GNDHA AP3 (2x) GNDHOT AP3 (2x) GND-L AP1 (2x) GND-L AP4 (4x) GND-L AP5 (34x) GND-LL AP4 (7x) GND-LL AP5 (1x) GND-LR AP4 (7x) GND-LR AP5 (1x) GND-LSW AP5 (1x) GND-LSW AP6 (15x) GND-S AP1 (11x) GND-SA AP4 (8x) GND-SA AP5 (2x) GND-SA AP6 (8x) GND-SA AP7 (6x) GNDscrew AP3 (2x) GNDscrew AP5 (2x) GND-SSB AP5 (3x) GND-SSP AP1 (51x) GND-SSP AP2 (15x) IN+SW AP6 (2x) IN-L AP4 (2x) IN-R AP4 (2x) IN-SW AP6 (2x) INV-MUTE AP4 (1x) INV-MUTE AP5 (1x) INV-MUTE AP6 (1x) LEFT-SPEAKER AP4 (1x) LEFT-SPEAKER AP5 (1x) MUTE AP4 (2x) MUTE AP5 (1x) MUTE AP6 (2x) ON-OFF AP1 (3x) OUT AP6 (1x) OUT AP7 (2x) OUTN AP6 (1x) OUTN AP7 (1x) POWER-GOOD AP1 (2x) POWER-OK-PLATFORM AP1 (2x) RIGHT-SPEAKER AP4 (1x) RIGHT-SPEAKER AP5 (1x) SOUND-ENABLE AP5 (3x) STANDBY AP1 (5x) STANDBY AP2 (1x) -SUB-SPEAKER AP5 (1x) -SUB-SPEAKER AP6 (2x) V-CLAMP AP1 (1x) V-CLAMP AP3 (2x)

1.2.

Non-SRP Schematics
There are several different signals available in a schematic:

1.2.1.

Power Supply Lines All power supply lines are available in the supply line overview (see chapter 9). In the schematics (see chapter 10) is not indicated where supplies are coming from or going to. It is however indicated if a supply is incoming (created elsewhere), or outgoing (created or adapted in the current schematic).
+5V +5V

Outgoing 1.2.2. Normal Signals

Incoming

For normal signals, a schematic reference (e.g. B14b) is placed next to the signals.
B14b signal_name

1.2.3.

Grounds For normal and special grounds (e.g. GNDHOT or GND3V3 etc.), nothing is indicated.

1.3.

SRP Schematics
SRP is a tool, which automatically creates a list with signal references, indicating on which schematic the signals are used. A reference is created for all signals indicated with an SRP symbol, these symbols are:
+5V +5V

Power supply line.

name

name

Stand alone signal or switching line (used as less as possible).

name

name

Signal line into a wire tree.

name name

Switching line into a wire tree.

name

Bi-directional line (e.g. SDA) into a wire tree.

name

Signal line into a wire tree, its direction depends on the circuit (e.g. ingoing for PDP, outgoing for LCD sets). Remarks: When there is a black dot on the signal direction arrow it is an SRP symbol, so there will be a reference to the signal name in the SRP list. All references to normal grounds (Ground symbols without additional text) are not listed in the reference list, this to keep it concise. Signals that are not used in multiple schematics, but only once or several times in the same schematic, are included in the SRP reference list, but only with one reference. Additional Tip: When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the schematics. In Adobe PDF reader: Select the signal name you want to search for, with the Select text tool. Copy and paste the signal name in the Search PDF tool. Search for all occurrences of the signal name. Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to zoom in to e.g. 150% to see clearly, which text is selected. Then you can zoom out, to get an overview of the complete schematic. PS. It is recommended to use at least Adobe PDF (reader) version 6.x, due to better search possibilities in this version.
10000_031_090121.eps 100323

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Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 66

SSB: SRP List

Netname
+12VDISP +12VDISP +12VS +12VS +12VS +12VS +12VS +12VS_1 +1V0_SW +1V0_SW +1V2_SW +1V2_SW +1V2_SW +1V8_SW +1V8_SW +1V8_SW +24VAUDIO +24VAUDIO +2V5_SW +3V3_SW +3V3_SW +3V3_SW +3V3_SW +3V3_SW +3V3_SW +3V3STBY +3V3STBY +3V3STBY +3V3STBY +3V3STBY +3V3STBY +3V3STBY +5V +5V_SW +5V_SW +5V_SW +5V_SW +5V_SW +5V_SW +5V_SW +5V_SW +5V_SW +5V_SW +5V5_TUN +5V5_TUN +5VIF +5VS +5VTUN_DIGITAL +VDISP +VDISP +VDISP +VDISP-INT +VDISP-INT 50Hz_60Hz 50Hz_60Hz 5V A_STBY AGND AGND AIN0_L AIN0_L-AV1 AIN0_L-AV1 AIN0_R AIN0_R-AV1 AIN0_R-AV1 AIN1_L AIN1_L-AV2 AIN1_L-AV2 AIN1_R AIN1_R-AV2 AIN1_R-AV2 AOUTL AOUTL AOUTR AOUTR ASIC_CS1 ASIC_CS1 ASIC_CS11

Diagram
B02A B05 B02A B04A B04D B06C B08A B02A B02A B04B B02A B03 B04B B02A B04B B04C B02A B04A B03 B02A B03 B04B B04D B06B B06C B02A B04A B04B B04D B05 B06A B08A B04D B02A B02B B03 B04A B04D B05 B06A B06E B07 B08A B02A B02B B02B B02B B02B B08C B08D B08E B05 B08C B08B B08D B06E B04A B02B B03 B06C B06C B06D B06C B06C B06D B06C B06C B06D B06C B06C B06D B04A B06C B04A B06C B08B B08E B08B (1 ) (1 ) (3 ) (2 ) (1 ) (2 ) (1 ) (2 ) (1 ) (1 ) (1 ) (2 ) (2 ) (1 ) (1 ) (5 ) (1 ) (2 ) (3 ) (1 ) (5 ) (3 ) (25 ) (2 ) (2 ) (1 ) (3 ) (2 ) (10 ) (1 ) (2 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (6 ) (1 ) (2 ) (1 ) (1 ) (1 ) (1 ) (1 ) (4 ) (2 ) (2 ) (4 ) (1 ) (2 ) (2 ) (1 ) (1 ) (1 ) (1 ) (1 ) (46 ) (17 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (2 ) (1 ) (2 ) (1 ) (1 ) (1 ) (1 )

ASIC_CS11 ASIC_CS3 ASIC_CS3 ASIC_CS5 ASIC_CS5 ASIC_CS7 ASIC_CS7 ASIC_CS9 ASIC_CS9 ASPDIF_OUT BACKLIGHT-BOOST BACKLIGHT-BOOST BACKLIGHT-PWM BACKLIGHT-PWM BP BP BYPASS_MODE BYPASS_MODE CS_L CS_L CS1 CS10 CS11 CS12 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9 CVBS_AV3 CVBS_AV3 CVBS_RF CVBS_RF DC_5V DC_PROT DC_PROT DDC_RESET DDC_RESET DDR2VDD DGND DIF_N DIF_N DIF_P DIF_P DVI_AUL_IN DVI_AUR_IN EDID_WC EDID_WC EDID_WC FE_SCL FE_SCL FE_SDA FE_SDA GCK GN GN GND_CVBS GND_CVBS GND-AUDIO GND-AUDIO GOE GP GP GSLOP GSLOP GSP1 GSP2 HDMI_CEC HDMI_CEC HDMI_PLUGPWR1 HDMI_PLUGPWR2 HP_DET HP_DET HP_DETECT HP_LOUT HP_LOUT HP_ROUT

B08E B08B B08E B08B B08E B08B B08E B08B B08E B06C B02A B04D B02A B04D B06C B07 B04D B08D B08D B08E B08E B08E B08E B08E B08E B08E B08E B08E B08E B08E B08E B08E B06C B06D B02B B06C B07 B04A B04D B04D B06A B08B B03 B02B B03 B02B B03 B06C B06C B04D B06A B07 B02B B03 B02B B03 B08B B06C B07 B06C B06D B02A B04A B08B B06C B07 B08B B08C B08B B08B B04D B06A B06A B06A B04D B06B B04D B04A B06B B04A

(1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (2 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (2 ) (2 ) (2 ) (2 ) (2 ) (2 ) (2 ) (2 ) (2 ) (2 ) (2 ) (2 ) (1 ) (1 ) (1 ) (1 ) (4 ) (1 ) (1 ) (1 ) (1 ) (4 ) (32 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (4 ) (13 ) (1 ) (1 ) (1 ) (1 ) (2 ) (1 ) (1 ) (1 ) (1 ) (4 ) (4 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 )

HP_ROUT HPOUTL HPOUTL HPOUTR HPOUTR HSYNC HSYNC IF_AGC IF_AGC IF_AGC IF_ATV INNCOM JTCK JTDI JTDO JTMS JTRST KEYBOARD LAMP-ON LAMP-ON LCD-PWR-ONn LCD-PWR-ONn LED-1 LED-2 LEFT_SPEAKER LIGHT-SENSOR LS MUTE MUTE NAND_PALE NAND_PARB NAND_PCLE NAND_PDD(0) NAND_PDD(1) NAND_PDD(2) NAND_PDD(3) NAND_PDD(4) NAND_PDD(5) NAND_PDD(6) NAND_PDD(7) NAND_POCE NAND_POOE NAND_POWE OUTCOM PB0P PBS_HPL PBS_HPL PBS_HPR PBS_HPR PBS_SPI_CLK PBS_SPI_CLK PBS_SPI_DI PBS_SPI_DI POWER_DOWN POWER-OK POWER-OK PR0P PREAMPL PREAMPR PWR5V_1 PWR5V_2 PX1APX1APX1APX1A+ PX1A+ PX1A+ PX1BPX1BPX1BPX1B+ PX1B+ PX1B+ PX1CPX1CPX1CPX1C+ PX1C+ PX1C+ PX1CLK-

B06B B06B B06C B06B B06C B06C B07 B02B B03 B04D B02B B08D B04D B04D B04D B04D B04D B04D B02A B04D B04D B05 B04D B04D B04A B04D B08B B04A B04D B04D B04D B04D B04D B04D B04D B04D B04D B04D B04D B04D B04D B04D B04D B08D B06C B06B B08A B06B B08A B04D B08A B04D B08A B04D B02A B04D B06C B06C B06C B06A B06A B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05

(1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (2 ) (2 ) (2 ) (2 ) (2 ) (2 ) (2 ) (2 ) (1 ) (1 ) (1 ) (1 ) (2 ) (1 ) (2 ) (2 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (2 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 )

PX1CLKPX1CLKPX1CLK+ PX1CLK+ PX1CLK+ PX1DPX1DPX1DPX1D+ PX1D+ PX1D+ PX1EPX1EPX1EPX1E+ PX1E+ PX1E+ PX2APX2APX2APX2A+ PX2A+ PX2A+ PX2BPX2BPX2BPX2B+ PX2B+ PX2B+ PX2CPX2CPX2CPX2C+ PX2C+ PX2C+ PX2CLKPX2CLKPX2CLKPX2CLK+ PX2CLK+ PX2CLK+ PX2DPX2DPX2DPX2D+ PX2D+ PX2D+ PX2EPX2EPX2EPX2E+ PX2E+ PX2E+ R_L R_L RC RC1 RC1 RC1 RC2 RC2 RC2 RESET_DEMOD RESET_DEMOD REV RF_AGC RF_AGC RF_AGC_SW RF_AGC_SW RIGHT_SPEAKER ROM_SCL ROM_SCL ROM_SDA ROM_SDA RP RP SAV_L_IN SAV_L_IN SAV_R_IN SAV_R_IN

B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B05 B06A B08B B08B B08D B04D B04D B06B B08A B04D B06B B08A B03 B04D B08B B02B B04D B02B B04D B04A B08B B08D B08B B08D B06C B07 B06C B06D B06C B06D

(1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (2 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (2 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (2 ) (1 ) (1 ) (1 ) (2 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 ) (1 )

SCL_VGA SCL_VGA SCL-DISP SCL-LCD SCL-LCD SCL-MAIN SCL-MAIN1 SCL-MAIN1 SCL-TCON SCL-TCON SDA_VGA SDA_VGA SDA-DISP SDA-LCD SDA-LCD SDA-MAIN SDA-MAIN1 SDA-MAIN1 SDA-TCON SDA-TCON SELLVDS SELLVDS SENSE+1V0_MT5363 SENSE+1V0_MT5363 SGND1 SIF_OUT SIF_OUT SIF_OUT_GND SIF_OUT_GND SOG SOG SOY0 SPB0P SPB0P SPB1P SPB1P SPR0P SPR0P SPR1P SPR1P STANDBY STANDBY STANDBYn SW_MUTE SW_MUTE SY0N SY0N SY0P SY0P SY1N SY1N SY1P SY1P TSO_CLK TSO_CLK TSO_DATA0 TSO_DATA0 TSO_SYNC TSO_SYNC TSO_VALID TSO_VALID TUNER_SCL TUNER_SCL TUNER_SCL TUNER_SDA TUNER_SDA TUNER_SDA U_D U_D U_D_INV UART_RX UART_TX USB_DM USB_DM USB_DP USB_DP USB_OCP USB_OCP USB_PWR_EN USB_PWR_EN

B07 (1 ) B08D (1 ) B04D (1 ) B04D (1 ) B08A (1 ) B04D (4 ) B04D (1 ) B08A (1 ) B08B (1 ) B08D (4 ) B07 (1 ) B08D (1 ) B04D (1 ) B04D (1 ) B08A (1 ) B04D (4 ) B04D (1 ) B08A (1 ) B08B (1 ) B08D (4 ) B08B (1 ) B08D (1 ) B02A (1 ) B04B (1 ) B08C (15 ) B02B (1 ) B06C (1 ) B02B (1 ) B06C (1 ) B06C (1 ) B07 (1 ) B06C (1 ) B06C (1 ) B06D (1 ) B06C (1 ) B06D (1 ) B06C (1 ) B06D (1 ) B06C (1 ) B06D (1 ) B02A (1 ) B04D (1 ) B04D (1 ) B04A (1 ) B04D (1 ) B06C (1 ) B06D (1 ) B06C (1 ) B06D (1 ) B06C (1 ) B06D (1 ) B06C (1 ) B06D (1 ) B03 (1 ) B04D (1 ) B03 (1 ) B04D (1 ) B03 (1 ) B04D (1 ) B03 (1 ) B04D (1 ) B02B (1 ) B03 (1 ) B04D (1 ) B02B (1 ) B03 (1 ) B04D (1 ) B08B (1 ) B08D (1 ) B08B (1 ) B04D (2 ) B04D (2 ) B04D (1 ) B06E (1 ) B04D (1 ) B06E (1 ) B04D (1 ) B06E (1 ) B04D (1 ) B06E (1 )

VCC_3V3 VCC_3V3 VCC_3V3 VCC1V8 VCC1V8 VCOM VCOM VDD1V8 VDD1V8PLL VDD3V3IO VDD3V3LVRS VGH_35V VGH_35V VGL_-6V VH0 VH127 VH159 VH191 VH247 VH255 VH31 VH63 VH95 VIF1 VIF2 VL0 VL127 VL159 VL191 VL247 VL31 VL63 VL95 VLS_15V6 VLS_15V6 VLS_15V6_B VREF_15V2 VREF_15V2 VSYNC VSYNC WP_TCON Y0N Y0P

B08B (4 ) B08C (3 ) B08D (8 ) B08B (4 ) B08C (1 ) B08D (1 ) B08E (1 ) B08B (2 ) B08B (2 ) B08B (2 ) B08B (2 ) B08B (1 ) B08C (1 ) B08C (2 ) B08D (1 ) B08D (3 ) B08D (1 ) B08D (1 ) B08D (1 ) B08D (1 ) B08D (2 ) B08D (2 ) B08D (2 ) B02B (2 ) B02B (2 ) B08D (1 ) B08D (3 ) B08D (1 ) B08D (1 ) B08D (1 ) B08D (2 ) B08D (2 ) B08D (2 ) B08C (3 ) B08D (4 ) B08C (2 ) B08D (1 ) B08E (1 ) B06C (1 ) B07 (1 ) B08D (1 ) B06C (1 ) B06C (1 )

2010-01-22

SRP LIST PART 1

3139 123 6483

18980_520_100329.eps 100329

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Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 67

IR/LED Board

IR/LED board

+3.3V R12 47 J1 8 7 6 5 4 3 2 1 2.0- 8pin +5V Keyb oard LED1 +3.3V LED2 IR VSS LIGHT +3.3V VSS R3 100 IR C1 R4 6.8k 10F RED 1 U1 R9 LED2 10k R10 10k VSS C 4 3 2 J2 3 2 1 2.0- 3pin +3.3V Keyb oard VSS 1 VDD OUT GND GND IRM-H636 VSS 3 D2

R6 0

Q2* B E BC847 2

2009-12-09

IR/LED

YKJ2035
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Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 68

Layout IR/LED Board

Layout IR/LED Board (Top Side)

Layout IR/LED Board (Bottom Side)

12NC XXXXXX-X0001
1 2009-12-09

IR/LED

YKJ2035
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Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 69

Keyboard Control Board

Keyboard Control Board

+3. 3 V J1 3 2 1 CON3 VSS C2 103 R4 1.5k R5 3 .9k R6 5.6k R7 1 8k R8 8 .2k

VSS

VSS CH+

VSS CH

VSS HOME

VSS VOL+

VSS VOL

VSS POWER

2009-09-10

SIDE CONTROL

SF2035/SF2037
18980_540_100329.eps 100329

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Circuit Diagrams and PWB Layouts

LC10.1L LA

10.

EN 70

Layout Keyboard Control Board

Layout Keyboard Control Board

2009-09-10

SIDE CONTROL

SF2035/SF2037
18970_541_100323.eps 100323

2010-Apr-06

Styling Sheets

LC10.1L LA

11.

EN 71

11. Styling Sheets

Styling Sheet Dali 32" - 40"

DALI 32"- 40"

0045 0021 0024

0012

0260

Pos No. 0004 0012 0021 0024 0045 0260 1085

Description Front Cabinet Back Cover I/O Bracket Side I/O Bracket Bottom Speaker bracket Stand Remote Control

Remarks

Not displayed

0004

FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9

18980_800_100329.eps 100329

2010-Apr-06