The document provides information on the IR2110(S)/IR2113(S) high and low side gate driver ICs.
The gate drivers have the following key features:
- Independent high and low side referenced output channels
- Operate at voltages up to 500V or 600V
- Propagation delays matched between channels
- Inputs compatible with 3.3V - 20V logic levels
The document includes specifications, typical connections, electrical characteristics and test data on parameters like propagation delays, input thresholds and output currents.
The document provides information on the IR2110(S)/IR2113(S) high and low side gate driver ICs.
The gate drivers have the following key features:
- Independent high and low side referenced output channels
- Operate at voltages up to 500V or 600V
- Propagation delays matched between channels
- Inputs compatible with 3.3V - 20V logic levels
The document includes specifications, typical connections, electrical characteristics and test data on parameters like propagation delays, input thresholds and output currents.
The document provides information on the IR2110(S)/IR2113(S) high and low side gate driver ICs.
The gate drivers have the following key features:
- Independent high and low side referenced output channels
- Operate at voltages up to 500V or 600V
- Propagation delays matched between channels
- Inputs compatible with 3.3V - 20V logic levels
The document includes specifications, typical connections, electrical characteristics and test data on parameters like propagation delays, input thresholds and output currents.
The document provides information on the IR2110(S)/IR2113(S) high and low side gate driver ICs.
The gate drivers have the following key features:
- Independent high and low side referenced output channels
- Operate at voltages up to 500V or 600V
- Propagation delays matched between channels
- Inputs compatible with 3.3V - 20V logic levels
The document includes specifications, typical connections, electrical characteristics and test data on parameters like propagation delays, input thresholds and output currents.
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Data Sheet No. PD60147 Rev.
IR2110(S)/IR2113(S) & (PbF)
HIGH AND LOW SIDE DRIVER Features Floating channel designed for bootstrap operation Fully operational to +500V or +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for both channels 3.3V logic compatible Separate logic supply range from 3.3V to 20V Logic and power ground 5V offset CMOS Schmitt-triggered inputs with pull-down Cycle by cycle edge-triggered shutdown logic Matched propagation delay for both channels Outputs in phase with inputs Also available LEAD-FREE
Description The IR2110/IR2113 are high voltage, high speed power MOSFET and IGBT drivers with independent high and low side referenced output 16-Lead SOIC 14-Lead PDIP channels. Proprietary HVIC and latch immune CMOS technologies IR2110S/IR2113S IR2110/IR2113 enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 500 or 600 volts.
Typical Connection HO VDD HIN SD LIN V SS VCC VDD HIN SD LIN VSS VCC COM LO VB VS
up to 500V or 600V
TO LOAD
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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IR2110(S)/IR2113(S) & (PbF)
Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 28 through 35.
Symbol VB VS VHO VCC VLO VDD VSS VIN dVs/dt PD RTHJA TJ TS TL
Definition High side floating supply voltage (IR2110) (IR2113) High side floating supply offset voltage High side floating output voltage Low side fixed supply voltage Low side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage (HIN, LIN & SD) Allowable offset supply voltage transient (figure 2) Package power dissipation @ TA +25C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (14 lead DIP) (16 lead SOIC) (14 lead DIP) (16 lead SOIC)
Min. -0.3 -0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 VCC - 25 VSS - 0.3 -55
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in figures 36 and 37.
Symbol VB VS VHO VCC VLO VDD VSS VIN TA
Definition High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side fixed supply voltage Low side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage (HIN, LIN & SD) Ambient temperature (IR2110) (IR2113)
Min. VS + 10 Note 1 Note 1 VS 10 0 VSS + 3 -5 (Note 2) VSS -40
Max. VS + 20 500 600 VB 20 VCC VSS + 20 5 VDD 125
Units
Note 1: Logic operational for VS of -4 to +500V. Logic state held for VS of -4V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Note 2: When VDD < 5V, the minimum VSS offset is limited to -VDD.
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IR2110(S)/IR2113(S) & (PbF)
Dynamic Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15V, CL = 1000 pF, TA = 25C and VSS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3.
Symbol ton toff tsd tr tf MT
Definition Turn-on propagation delay Turn-off propagation delay Shutdown propagation delay Turn-on rise time Turn-off fall time Delay matching, HS & LS turn-on/off (IR2110) (IR2113)
Figure Min. Typ. Max. Units Test Conditions
7 8 9 10 11 120 94 110 25 17 150 125 140 35 25 10 20 VS = 0V VS = 500V/600V VS = 500V/600V
ns
Static Electrical Characteristics
VBIAS (VCC, VBS, VDD) = 15V, TA = 25C and VSS = COM unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol VIH VIL VOH VOL ILK IQBS IQCC IQDD IIN+ IINVBSUV+ VBSUVVCCUV+ VCCUVIO+ IO-
Definition Logic 1 input voltage Logic 0 input voltage High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Quiescent VDD supply current Logic 1 input bias current Logic 0 input bias current VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold Output high short circuit pulsed current Output low short circuit pulsed current
Figure Min. Typ. Max. Units Test Conditions
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 9.5 7.5 7.0 7.4 7.0 2.0 2.0 125 180 15 20 8.6 8.2 8.5 8.2 2.5 2.5 6.0 1.2 0.1 50 230 340 30 40 1.0 9.7 9.4 9.6 V 9.4 A VO = 0V, VIN = VDD PW 10 s VO = 15V, VIN = 0V PW 10 s A V IO = 0A IO = 0A VB=VS = 500V/600V VIN = 0V or VDD VIN = 0V or VDD VIN = 0V or VDD VIN = VDD VIN = 0V
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IR2110(S)/IR2113(S) & (PbF)
Functional Block Diagram VB VDD R Q S HIN HV LEVEL SHIFT
UV DETECT PULSE FILTER
R R S
Q HO
VDD /VCC LEVEL SHIFT
PULSE GEN
VS
SD UV DETECT
VCC VDD /VCC LEVEL SHIFT
LIN R Q VSS S
LO DELAY COM
Lead Definitions Symbol Description VDD HIN SD LIN VSS VB HO VS VCC LO COM Logic supply Logic input for high side gate driver output (HO), in phase Logic input for shutdown Logic input for low side gate driver output (LO), in phase Logic ground High side floating supply High side gate drive output High side floating supply return Low side supply Low side gate drive output Low side return
Lead Assignments
14 Lead PDIP
16 Lead SOIC (Wide Body)
IR2110/IR2113
IR2110S/IR2113S
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IR2110(S)/IR2113(S) & (PbF)
Vcc =15V 10KF6 10 F 0.1 F 9 10 11 12 2 IRF820 3 6 5 7 1 OUTPUT 10KF6 MONITOR 0.1 F 200 H + 10KF6 100F HV = 10 to 500V/600V
HO
dVS >50 V/ns dt
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Figure 1. Input/Output Timing Diagram
Figure 2. Floating Supply Voltage Transient Test Circuit
Vcc =15V VB + 10 15V F V S (0 to 500V/600V) 10 F
10 F
0.1 F 9 3 6 5 7 1 CL 13 2 CL 10 11 12
0.1 F HO LO
HIN LIN ton
50%
50%
tr 90%
toff 90%
tf
HIN SD LIN
HO LO
10%
10%
Figure 3. Switching Time Test Circuit
Figure 4. Switching Time Waveform Definition
HIN LIN 50%
50%
50%
SD tsd
LO
HO 10%
HO LO
90% MT 90% MT
LO Figure 5. Shutdown Waveform Definitions
HO
Figure 6. Delay Matching Waveform Definitions
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IR2110(S)/IR2113(S) & (PbF)
250
250
200 Turn-On Delay Time (ns) Turn-On Delay Time (ns)
200 Max.
150 Max.
150
Typ.
100
Typ.
100
50
50
0 -50 -25 0 25 50 75 100 125 Temperature (C)
0 10 12 14 16 18 20
VCC/VBS Supply Voltage (V)
Figure 7A. Turn-On Time vs. Temperature
Figure 7B. Turn-On Time vs. VCC/VBS Supply Voltage
250
250 200 Turn-On Delay Time (ns)
Max. 200
150 100 50 0 0
Typ.
Turn-Off Delay Time (ns)
150
Max.
100 Typ.
50
10 12 14 16 18 20
-50
-25
25
50
75
100
125
VDD Supply Voltage (V)
Temperature (C)
Figure 7C. Turn-On Time vs. VDD Supply Voltage
250
Figure 8A. Turn-Off Time vs. Temperature
250 200
200 Max.
Turn-Off Delay Time (ns)
Turn-Off Delay Time (ns)
Max.
150 Typ.
150 100 50 0
100
Typ
50
0 10 12 14 16 18 20
10 12 14 16 18 20
VCC/VBS Supply Voltage (V)
VDD Supply Voltage (V)
Figure 8B. Turn-Off Time vs. VCC/VBS Supply Voltage
Figure 8C. Turn-Off Time vs. VDD Supply Voltage
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IR2110(S)/IR2113(S) & (PbF)
250
250
200 Shutdown Delay Time (ns) Shutdown Delay time (ns)
200 Max.
150 Max.
150
Typ.
100
Typ.
100
50
50
0 -50 -25 0 25 50 75 100 125 Temperature (C)
0 10 12 14 16 18 20
VCC/VBS Supply Voltage (V)
Figure 9A. Shutdown Time vs. Temperature
250 Shutdown Delay Time (ns) 200 150 100 Typ 50
Figure 9B. Shutdown Time vs. VCC/VBS Supply Voltage
Figure 37. Maximum VSS Positive Offset vs. VCC Supply Voltage
14
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IR2110(S)/IR2113(S) & (PbF)
Case Outlines
14-Lead PDIP
01-6010 01-3002 03 (MS-001AC)
16-Lead SOIC (wide body)
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01 6015 01-3014 03 (MS-013AA)
15
IR2110(S)/IR2113(S) & (PbF)
LEADFREE PART MARKING INFORMATION
Part number
IRxxxxxx YWW? ?XXXX
Lot Code (Prod mode - 4 digit SPN code) IR logo
Date code
Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released
Assembly site code Per SCOP 200-002
ORDER INFORMATION Basic Part (Non-Lead Free) 14-Lead IR2110 order IR2110 14-Lead IR2113 order IR2113 16-Lead IR2110S order IR2110S 16-Lead IR2113S order IR2113S Leadfree Part 14-Lead IR2110 order IR2110PbF 14-Lead IR2113 order IR2113PbF 16-Lead IR2110S order IR2110SPbF 16-Lead IR2113S order IR2113SPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 3/23/2004
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