Lab 1 SPICE Netlist Simulation
Lab 1 SPICE Netlist Simulation
Lab 1: SPICE_Netlist_Simulation
Student Name: Mark Lennon Lecturer Name: Mark Norton Date: 11/12/08
Objective: To convert the following schematic into a netlist using SPICE commands.
This was done using the following netlist: T-Spice Netlist Simulation .MODEL NMOS NMOS VTO=-2 NSUB=1.0E15 UO=550 M1 N1 N2 GND GND NMOS L=4u W=6u VGS N2 GND 0 V0 N3 N1 0 VDS N3 GND 0 .END
Part 2: Plot the output characteristics of the MOSFET by sweeping the drain-source voltage from 0-10V and the gate-source voltage from 0-5V.
This can be done by adding a line which controls the voltage levels: .dc VGS 0 5 1 VDS 0 10 1
.print dc i(v0)
.END
600
500
Current (uA)
400
300
200
100
0.0
0.5
1. 0
1. 5
2. 0
2.5
3.0
3.5
4.0
4.5
5.0
Voltage (V)
NOTE: The zero voltage source was included in series with the drain to allow us to measure the current through it.