EC2308: MICROPROCESSORS &

MICROCONTROLLERS LAB MANUAL

V SEM ECE

1. INTRODUCTION TO 8085
INTEL 8085 is one of the most popular 8-bit microprocessor capable of
addressing 64 KB of memory and its architecture is simple. The device has 40 pins,
requires +5 V power supply and can operate with 3MHz single phase clock.
ALU (Arithmetic Logic Unit):
The 8085A has a simple 8-bit ALU and it works in coordination with the
accumulator, temporary registers, 5 flags and arithmetic and logic circuits. ALU has
the capability of performing several mathematical and logical operations. The
temporary registers are used to hold the data during an arithmetic and logic operation.
The result is stored in the accumulator and the flags are set or reset according to the
result of the operation. The flags are affected by the arithmetic and logic operation.
They are as follows:

Sign flag
After the execution of the arithmetic - logic operation if the bit D7
of the result is 1, the sign flag is set. This flag is used with signed
numbers. If it is 1, it is a negative number and if it is 0, it is a positive
number.

Zero flag
The zero flag is set if the ALU operation results in zero. This flag
is modified by the result in the accumulator as well as in other registers.

Auxillary carry flag

In an arithmetic operation when a carry is generated by digit D3
and passed on to D4, the auxillary flag is set.

Parity flag
After arithmetic logic operation, if the result has an even number
of 1s the flag is set. If it has odd number of 1s it is reset.

Carry flag
If an arithmetic operation results in a carry, the carry flag is set.
The carry flag also serves as a borrow flag for subtraction.

Timing and control unit

This unit synchronizes all the microprocessor operation with a clock and
generates

the

control

signals

necessary for

communication

between

the

microprocessor and peripherals. The control signals RD (read) and WR (write)

indicate the availability of data on the data bus.
Instruction register and decoder
The instruction register and decoder are part of the ALU. When an instruction is
fetched from memory it is loaded in the instruction register. The decoder decodes the
instruction and establishes the sequence of events to follow.
Register array
The 8085 has six general purpose registers to store 8-bit data during program
execution. These registers are identified as B, C, D, E, H and L. they can be combined
as BC, DE and HL to perform 16-bit operation.
Accumulator
Accumulator is an 8-bit register that is part of the ALU. This register is used to
store 8-bit data and to perform arithmetic and logic operation. The result of an
operation is stored in the accumulator.
Program counter
The program counter is a 16-bit register used to point to the memory address of
the next instruction to be executed.
Stack pointer
It is a 16-bit register which points to the memory location in R/W memory, called
the Stack.

Communication lines
8085 microprocessor performs data transfer operations using three communication
lines called buses. They are address bus, data bus and control bus.

Address bus it is a group of 16-bit lines generally identified as A 0 A15.

The address bus is unidirectional i.e., the bits flow in one direction from
microprocessor to the peripheral devices. It is capable of addressing 2 16
memory locations.

Data bus it is a group of 8 lines used for data flow and it is bidirectional.
The data ranges from 00 FF.

Control bus it consist of various single lines that carry synchronizing

signals. The microprocessor uses such signals for timing purpose.

2(A). 8 BIT DATA ADDITION

AIM:
To add two 8 bit numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.

Initialize memory pointer to data location.

Get the first number from memory in accumulator.
Get the second number and add it to the accumulator.
Store the answer at another memory location.

RESULT:
Thus the 8 bit numbers stored at 4500 &4501 are added and the result stored at 4502 &
4503.

FLOW CHART:
START

[C]

00H

[HL]

4500H

[A]

[M]

[HL][HL]+1

[A][A]+[M]

NO
Is there a
Carry ?YES

[C][C]+1

[HL][HL]+1

[M]

[A]

[HL][HL]+1

[M]

[C]

STOP

PROGRAM:
ADDRESS OPCODE LABEL
4100
START
4101
4102
4103
4104
4105

MNEMONICS OPERAND
MVI
C, 00

COMMENT
Clear C reg.

LXI

H, 4500

Initialize HL reg. to
4500

MOV

A, M

4106

INX

4107

ADD

4108
4109
410A

JNC

L1

Transfer first data to

accumulator
Increment HL reg. to
point next memory
Location.
Add first number to
acc. Content.
Jump to location if
result does not yield
carry.

INR
INX

C
H

410D

MOV

M, A

410E

INX

410F
4110

MOV
HLT

M, C

410B
410C

L1

Increment C reg.
Increment HL reg. to
point next memory
Location.
Transfer the result from
acc. to memory.
Increment HL reg. to
point next memory
Location.
Move carry to memory
Stop the program

OBSERVATION:
INPUT
4500
4501

OUTPUT
4502
4503

2(B). 8 BIT DATA SUBTRACTION

AIM:
To Subtract two 8 bit numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.

Initialize memory pointer to data location.

Get the first number from memory in accumulator.
Get the second number and subtract from the accumulator.
If the result yields a borrow, the content of the acc. is complemented and 01H is
added to it (2s complement). A register is cleared and the content of that reg. is
incremented in case there is a borrow. If there is no borrow the content of the acc.
is directly taken as the result.
5. Store the answer at next memory location.
RESULT:
Thus the 8 bit numbers stored at 4500 &4501 are subtracted and the result stored at 4502
& 4503.

FLOW CHART:
START

[C]

00H

[HL] 4500H

[A]

[M]

[HL][HL]+1

[A][A]-[M]

Is there a

NO

Borrow ?

YES
Complement [A]
Add 01H to [A]
[C][C]+1

[HL][HL]+1

[M]

[A]

[HL][HL]+1

[M]

[C]

STOP

PROGRAM:
ADDRESS OPCODE LABEL
4100
START
4102
4102
4103
4104
4105

MNEMONICS OPERAND
MVI
C, 00

COMMENT
Clear C reg.

LXI

H, 4500

Initialize HL reg. to
4500

MOV

A, M

4106

INX

4107

SUB

4108
4109
410A

JNC

L1

Transfer first data to

accumulator
Increment HL reg. to
point next mem.
Location.
Subtract first number
from acc. Content.
Jump to location if
result does not yield
borrow.

410B
410C

INR
CMA

410D
410E
410F

ADI

01H

INX

4110

MOV

M, A

4111

INX

4112
4113

MOV
HLT

M, C

L1

Increment C reg.
Complement the Acc.
content
Add 01H to content of
acc.
Increment HL reg. to
point next mem.
Location.
Transfer the result from
acc. to memory.
Increment HL reg. to
point next mem.
Location.
Move carry to mem.
Stop the program

OBSERVATION:
INPUT
4500
4501

OUTPUT
4502
4503

10

3(A). 8 BIT DATA MULTIPLICATION

AIM:
To multiply two 8 bit numbers stored at consecutive memory locations and store
the result in memory.
ALGORITHM:
LOGIC: Multiplication can be done by repeated addition.
1.
2.
3.
4.
5.
6.
7.
8.

Initialize memory pointer to data location.

Move multiplicand to a register.
Move the multiplier to another register.
Clear the accumulator.
Add multiplicand to accumulator
Decrement multiplier
Repeat step 5 till multiplier comes to zero.
The result, which is in the accumulator, is stored in a memory location.

RESULT:
Thus the 8-bit multiplication was done in 8085p using repeated addition method.

11

FLOW CHART:
START

[HL] 4500
B M
[HL] [HL]+1

A 00

C 00
[A] [A] +[M]

Is there
any
carry

NO

YES
C C+1
B B-1

NO

IS
B=0
YES
A

12

A
[HL][HL]+1

[M]

[A]

[HL][HL]+1

[M]

[C]

STOP

13

PROGRAM:
ADDRESS OPCODE LABEL
4100
START
4101
4102
4103

MNEMONICS
LXI

OPERAND
H, 4500

COMMENT
Initialize HL reg. to
4500

MOV

B, M

4104

INX

4105
4106
4107
4108

MVI

A, 00H

Transfer first data to

reg. B
Increment HL reg. to
point next mem.
Location.
Clear the acc.

MVI

C, 00H

Clear C reg for carry

ADD

410A

JNC

NEXT

410B
410C
410D
410E
410F
4110
4111
4112

Add multiplicand
multiplier times.
Jump to NEXT if there
is no carry

INR
DCR
JNZ

C
B
L1

Increment C reg
Decrement B reg
Jump to L1 if B is not
zero.

INX

4113

MOV

M, A

4114

INX

4115

MOV

M, C

4116

HLT

Increment HL reg. to
point next mem.
Location.
Transfer the result from
acc. to memory.
Increment HL reg. to
point next mem.
Location.
Transfer the result from
C reg. to memory.
Stop the program

4109

L1

NEXT

OBSERVATION:
INPUT
4500
4501

OUTPUT
4502
4503
14

3(B). 8 BIT DIVISION

AIM:
To divide two 8-bit numbers and store the result in memory.
ALGORITHM:
LOGIC: Division is done using the method Repeated subtraction.
1. Load Divisor and Dividend
2. Subtract divisor from dividend
3. Count the number of times of subtraction which equals the quotient
4. Stop subtraction when the dividend is less than the divisor .The dividend now
becomes the remainder. Otherwise go to step 2.
5. stop the program execution.
RESULT:
Thus an ALP was written for 8-bit division using repeated subtraction method and
executed using 8085 p kits

15

FLOWCHART:
START

B 00
[HL] 4500
A M
[HL] [HL]+1
M A-M

[B] [B] +1

IS A<0

NO

YES
A A+ M

B B-1

[HL][HL]+1

[M]

[A]

[HL][HL]+1

[M]

[B]

STOP

16

PROGRAM:
ADDRESS

OPCODE LABEL

MNEMO
NICS
MVI

OPERA
ND
B,00

LXI

H,4500

MOV
INX

A,M
H

SUB
INR
JNC

M
B
LOOP

ADD
DCR
INX

M
B
H

410F

MOV

M,A

4110

INX

4111

MOV

M,B

4112

HLT

4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
410A
410B
410C
410D
410E

LOOP

COMMENTS
Clear B reg for quotient
Initialize HL reg. to
4500H
Transfer dividend to acc.
Increment HL reg. to point
next mem. Location.
Subtract divisor from dividend
Increment B reg
Jump to LOOP if result does
not yield borrow
Add divisor to acc.
Decrement B reg
Increment HL reg. to point
next mem. Location.
Transfer the remainder from
acc. to memory.
Increment HL reg. to point
next mem. Location.
Transfer the quotient from B
reg. to memory.
Stop the program

OBSERVATION:
S.NO
1
2

ADDRESS
4500
4501
4500
4501

INPUT
DATA

ADDRESS
4502
4503
4502
4503

OUTPUT
DATA

17

4(A). 16 BIT DATA ADDITION

AIM:
To add two 16-bit numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.

Initialize memory pointer to data location.

Get the first number from memory and store in Register pair.
Get the second number in memory and add it to the Register pair.
Store the sum & carry in separate memory locations.

RESULT:
Thus an ALP program for 16-bit addition was written and executed in 8085p
using special instructions.

18

FLOW CHART:
START

[L]
[H]

[8050 H]
[8051 H]

[DE]

[HL]

[L]
[H]

[8052H]
[8053H]

[A]00H

[HL][HL]+[DE]

Is there a
Carry?

NO

YES
[A][A]+1

[8054][ L]

[8055] [H]

[8056]

[A]

STOP

19

PROGRAM:
ADDRESS OPCODE LABEL
8000
START
8001
8002
8003
8004
8005
8006
8007
8008
8009

MNEMONICS OPERAND
LHLD
8050H

800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014

LOOP

COMMENT
Load the augend in DE
pair through HL pair.

XCHG
LHLD

8052H

Load the addend in HL

pair.

MVI

A, 00H

DAD

JNC

LOOP

INR

SHLD

8054H

STA

8056H

Initialize reg. A for

carry
Add the contents of HL
Pair with that of DE
pair.
If there is no carry, go
to the instruction
labeled LOOP.
Otherwise increment
reg. A
Store the content of HL
Pair in 8054H(LSB of
sum)
Store the carry in
8056H through Acc.
(MSB of sum).
Stop the program.

HLT

OBSERVATION:

ADDRESS
8050H
8051H
8052H
8053H

INPUT
DATA

ADDRESS
8054H
8055H
8056H

OUTPUT
DATA

20

4(B). 16 BIT DATA SUBTRACTION

AIM:
To subtract two 16-bit numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.
5.

Initialize memory pointer to data location.

Get the subtrahend from memory and transfer it to register pair.
Get the minuend from memory and store it in another register pair.
Subtract subtrahend from minuend.
Store the difference and borrow in different memory locations.

RESULT:
Thus an ALP program for subtracting two 16-bit numbers was written and
executed.

21

FLOW CHART:
START

[L]
[H]

[8050 H]
[8051 H]

[DE]

[HL]

[L]
[H]

[8052H]
[8053H]

[HL][HL]-[DE]

Is there a
borrow?

NO

YES
[C][C]+1

[8054][ L]

[8055] [H]

[8056]

[C]

STOP

22

PROGRAM:
ADDRESS OPCODE LABEL

MNEMO
NICS
MVI

OPER COMMENTS
AND
C, 00
Initialize C reg.

LHLD

8050H

Load the subtrahend in DE

reg. Pair through HL reg.
pair.

XCHG
LHLD

8052H

Load the minuend in HL reg.

Pair.

MOV

A, L

800A

SUB

800B

MOV

L, A

800C

MOV

A, H

800D

SBB

800E

MOV

H, A

800F
8010
8011
8012
8013
8014
8015
8016

SHLD

8054H

Move the content of reg. L to

Acc.
Subtract the content of reg.
E from that of acc.
Move the content of Acc. to
reg. L
Move the content of reg. H to
Acc.
Subtract content of reg. D
with that of Acc.
Transfer content of acc. to
reg. H
Store the content of HL pair
in memory location 8504H.

JNC

NEXT

If there is borrow, go to the

instruction labeled NEXT.

INR
MOV

C
A, C

STA

8056H

Increment reg. C
Transfer the content of reg. C
to Acc.
Store the content of acc. to
the memory location 8506H

8000
8001
8002
8003
8004
8005
8006
8007
8008
8009

START

NEXT

8017
8018
8019
801A

HLT

Stop the program execution.

OBSERVATION:
ADDRESS
8050H
8051H
8052H
8053H

INPUT
DATA

ADDRESS
8054H
8055H
8056H

OUTPUT
DATA

23

5(A). 16 BIT MULTIPLICATION

AIM:
To multiply two 16 bit numbers and store the result in memory.
ALGORITHM:
1.
2.
3.
4.

Get the multiplier and multiplicand.

Initialize a register to store partial product.
Add multiplicand, multiplier times.
Store the result in consecutive memory locations.

RESULT:
Thus the 16-bit multiplication was done in 8085p using repeated addition
method.

24

FLOWCHART:
START
L
H

[8050]
[8051]

SP HL

L
H

[8052]
[8053]

DE

HL

HL0000
BC0000

HLHL+SP

NO

Is Carry
flag set?

BCBC+1

DEDE+1

Is Zero
flag set?

25

YES

NO
YES
A

[8054]
[8055]

L
H

[8056]
[8057]

C
B

STOP

26

ADDRESS OPCODE LABEL MNEM

8000
8001
8002
8003
8004
8005
8006
8007
8008
8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014
8015
8016
8017
8018
8019
801A
801B
801C
801D
801E
801F
8020
8021
8022
8023
8024
OBSERVATION:
INPUT

START

OPERAN COMMENTS
O
D
N
I
C
S
LHLD
8050
Load the first No. in stack pointer
through HL reg. pair
SPHL
LHLD

8052

XCHG
LXI

H, 0000H

Load the second No. in HL reg.

pair
& Exchange with DE reg. pair.

Clear HL & DE reg. pairs.

LOOP

NEXT

LXI

B, 0000H

DAD
JNC

SP
NEXT

Add SP with HL pair.

If there is no carry, go to the
instruction labeled NEXT

INX
DCX
MOV
ORA
JNZ

B
D
A,E
D
LOOP

Increment BC reg. pair

Decrement DE reg. pair.
Move the content of reg. E to Acc.
OR Acc. with D reg.
If there is no zero, go to instruction
labeled LOOP

SHLD

8054

MOV
STA

A, C
8056

Store the content of HL pair in

memory locations 8054 &
8055.
Move the content of reg. C to Acc.
Store the content of Acc. in
memory location 8056.

MOV
STA

A, B
8057

HLT

Move the content of reg. B to Acc.

Store the content of Acc. in
memory location 8056.
Stop program execution

OUTPUT

27

ADDRESS

DATA

ADDRESS

8050
8051
8052

8054
8055
8056

8053

8057

DATA

5(B). 16- BIT DIVISION

AIM:
To divide two 16-bit numbers and store the result in memory using 8085
mnemonics.
ALGORITHM:
1.
2.
3.
4.
5.

Get the dividend and divisor.

Initialize the register for quotient.
Repeatedly subtract divisor from dividend till dividend becomes less than divisor.
Count the number of subtraction which equals the quotient.
Store the result in memory.

RESULT:
Thus the 16-bit Division was done in 8085p using repeated subtraction method.

28

FLOWCHART:
START
L
[8051]
H [8052]

HL

DE

L [8050]
H [8051]

BC 0000H

L; AA- E
LA

AH
AA- H- Borrow
HA

BCBC+ 1

NO

Is Carry
flag set ?

YES
A

29

BCBC- 1
HLHL+DE

L[8054]
H[8055]

AC

[8056] A

AB

[8057] A

STOP

30

PROGRAM:
ADDRESS OPCODE LABEL
8000
8001
8002
8003
8004
8005
8006
8007
8008
8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014
8015
8016
8017
8018
8019
801A
801B
801C
801D
801E
801F
8020
8021
OBSERVATION:
INPUT
ADDRESS DATA
8050
8051
8052
8053

START

MNEM
ONICS
LHLD

OPERA
ND
8052

COMMENTS

XCHG
LHLD

8050

Load the second No. in HL reg. pair

& Exchange with DE reg. pair.

LXI

B, 0000H

Load the first No. in stack pointer

through HL reg. pair

Clear BC reg. pair.

LOOP

MOV
SUB
MOV
MOV
SBB
MOV
INX
JNC

A, L
E
L, A
A, H
D
H, A
B
LOOP

Move the content of reg. L to Acc.

Subtract reg. E from that of Acc.
Move the content of Acc to L.
Move the content of reg. H Acc.
Subtract reg. D from that of Acc.
Move the content of Acc to H.
Increment reg. Pair BC
If there is no carry, go to the location
labeled LOOP.

DCX
DAD
SHLD

B
D
8054

Decrement BC reg. pair.

Add content of HL and DE reg. pairs.
Store the content of HL pair in 8054 &
8055.

MOV
STA

A, C
8056

Move the content of reg. C to Acc.

Store the content of Acc. in memory
8056

MOV
STA

A, B
8057

Move the content of reg. B to Acc.

Store the content of Acc. in memory
8057.

HLT

Stop the program execution.

OUTPUT
ADDRESS DATA
8054
8055
8056
8057
31

6(A). LARGEST ELEMENT IN AN ARRAY

AIM:
To find the largest element in an array.
ALGORITHM:
1. Place all the elements of an array in the consecutive memory locations.
2. Fetch the first element from the memory location and load it in the accumulator.
3. Initialize a counter (register) with the total number of elements in an array.
4. Decrement the counter by 1.
5. Increment the memory pointer to point to the next element.
6. Compare the accumulator content with the memory content (next
element).
7. If the accumulator content is smaller, then move the memory content
(largest element) to the accumulator. Else continue.
8. Decrement the counter by 1.
9. Repeat steps 5 to 8 until the counter reaches zero
10. Store the result (accumulator content) in the specified memory location.
RESULT:
Thus the largest number in the given array is found out.

32

FLOW CHART:
START
[HL] [8100H]

[B] 04H
[A] [HL]
[HL [HL] + 1

NO

IS
[A] <
[HL]?

YES

[A] [HL]
[B] [B]-1

IS
[B] =
0?
YES

NO

[8105] [A]
STOP

33

PROGRAM:
ADDRE
SS
8001
8002
8003
8004
8005
8006
8007

OPCO
DE

8008
8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014

LABEL

LOOP1

LOOP

MNEM
ONICS
LXI

OPER
AND
H,8100

MVI

B,04

MOV
INX

A,M
H

CMP
JNC

M
LOOP

MOV
DCR
JNZ

A,M
B
LOOP1

STA

8105

HLT

COMMENTS
Initialize HL reg. to
8100H
Initialize B reg with no. of
comparisons(n-1)
Transfer first data to acc.
Increment HL reg. to point
next memory location
Compare M & A
If A is greater than M then go
to loop
Transfer data from M to A reg
Decrement B reg
If B is not Zero go to loop1
Store the result in a memory
location.
Stop the program

OBSERVATION:
INPUT
ADDRESS DATA
8100
8101
8102
8103
8104

OUTPUT
ADDRESS DATA
8105

34

6(B). SMALLEST ELEMENT IN AN ARRAY

AIM:
To find the smallest element in an array.
ALGORITHM:
1. Place all the elements of an array in the consecutive memory locations.
2. Fetch the first element from the memory location and load it in the accumulator.
3. Initialize a counter (register) with the total number of elements in an array.
4. Decrement the counter by 1.
5. Increment the memory pointer to point to the next element.
6. Compare the accumulator content with the memory content (next
element).
7. If the accumulator content is smaller, then move the memory content
(largest element) to the accumulator. Else continue.
8. Decrement the counter by 1.
9. Repeat steps 5 to 8 until the counter reaches zero
10. Store the result (accumulator content) in the specified memory location.
RESULT:
Thus the smallest number in the given array is found out.

35

FLOW CHART:
START
[HL] [8100H]

[B] 04H
[A] [HL]
[HL [HL] + 1

YES

IS
[A] <
[HL]?

NO

[A] [HL]
[B] [B]-1

IS
[B] =
0?
YES

NO

[8105] [A]
STOP

36

PROGRAM:
ADDRE
SS
8001
8002
8003
8004
8005
8006
8007

OPCO
DE

8008
8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014

LABEL

LOOP1

LOOP

MNEM
ONICS
LXI

OPER
AND
H,8100

MVI

B,04

MOV
INX

A,M
H

CMP
JC

M
LOOP

MOV
DCR
JNZ

A,M
B
LOOP1

STA

8105

HLT

COMMENTS
Initialize HL reg. to
8100H
Initialize B reg with no. of
comparisons(n-1)
Transfer first data to acc.
Increment HL reg. to point
next memory location
Compare M & A
If A is lesser than M then go to
loop
Transfer data from M to A reg
Decrement B reg
If B is not Zero go to loop1
Store the result in a memory
location.
Stop the program

OBSERVATION:
INPUT
ADDRESS DATA
8100
8101
8102
8103
8104

OUTPUT
ADDRESS DATA
8105

37

7(A).ASCENDING ORDER
AIM:
To sort the given number in the ascending order using 8085 microprocessor.
ALGORITHM:
1. Get the numbers to be sorted from the memory locations.
2. Compare the first two numbers and if the first number is larger than second then I
interchange the number.
3. If the first number is smaller, go to step 4
4. Repeat steps 2 and 3 until the numbers are in required order
RESULT:
Thus the ascending order program is executed and thus the numbers are arranged
in ascending order.

38

FLOWCHART:

START
[B] 04H
[HL] [8100H]

[C] 04H
[A] [HL]
[HL [HL] + 1

YES

IS
[A] <
[HL]?
NO
[D] [HL]

[HL] [A]

[HL] [HL] - 1

[HL] [D]
[HL] [HL] + 1
[C] [C] 01 H

39

IS
[C] =
0?

NO
YES

[B] [B]-1

IS
[B] =
0?

NO
YES

STOP

PROGRAM:
40

ADDR
E
SS
8000
8001
8002
8003
8004
8005
8006
8007
8008

OPCO
DE

LABEL

LOOP 3

LOOP2

8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014
8015
8016
8017
8018
8019
801A

LOOP1

MNEM
ONICS

OPER
AND

MVI

B,04

LXI

H,8100

MVI

C,04

MOV
INX

A,M
H

CMP
JC

M
LOOP1

MOV
MOV
DCX
MOV
INX
DCR
JNZ

D,M
M,A
H
M,D
H
C
LOOP2

Transfer data from M to D reg

Transfer data from acc to M
Decrement HL pair
Transfer data from D to M
Increment HL pair
Decrement C reg
If C is not zero go to loop2

DCR
JNZ

B
LOOP3

Decrement B reg
If B is not Zero go to loop3

HLT

COMMENTS
Initialize B reg with number
of comparisons (n-1)
Initialize HL reg. to
8100H
Initialize C reg with no. of
comparisons(n-1)
Transfer first data to acc.
Increment HL reg. to point
next memory location
Compare M & A
If A is less than M then go to
loop1

Stop the program

OBSERVATION:
INPUT
MEMORY
LOCATION
8100
8101
8102
8103
8104

OUTPUT
DATA

MEMORY
LOCATION
8100
8101
8102
8103
8104

DATA

41

7(B). DESCENDING ORDER

AIM:
To sort the given number in the descending order using 8085 microprocessor.
ALGORITHM:
1. Get the numbers to be sorted from the memory locations.
2. Compare the first two numbers and if the first number is smaller than second then I
interchange the number.
3. If the first number is larger, go to step 4
4. Repeat steps 2 and 3 until the numbers are in required order
RESULT:
Thus the descending order program is executed and thus the numbers are arranged
in descending order.

42

FLOWCHART:

START
[B] 04H
[HL] [8100H]

[C] 04H
[A] [HL]
[HL [HL] + 1

NO

IS
[A] <
[HL]?
YES
[D] [HL]

[HL] [A]

[HL] [HL] - 1

[HL] [D]
[HL] [HL] + 1
[C] [C] 01 H

43

IS
[C] =
0?

NO
YES

[B] [B]-1

IS
[B] =
0?

NO
YES

STOP

PROGRAM:
44

ADDRE
SS
8000
8001
8002
8003
8004
8005
8006
8007
8008

OPCO
DE

LABEL

MNEM
ONICS
MVI

OPER
AND
B,04

LXI

H,8100

MVI

C,04

MOV
INX

A,M
H

CMP
JNC

M
LOOP1

MOV
MOV
DCX
MOV
INX
DCR
JNZ

D,M
M,A
H
M,D
H
C
LOOP2

Transfer data from M to D reg

Transfer data from acc to M
Decrement HL pair
Transfer data from D to M
Increment HL pair
Decrement C reg
If C is not zero go to loop2

DCR
JNZ

B
LOOP3

Decrement B reg
If B is not Zero go to loop3

LOOP 3

LOOP2

8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014
8015
8016
8017
8018
8019
801A

LOOP1

HLT

COMMENTS
Initialize B reg with number
of comparisons (n-1)
Initialize HL reg. to
8100H
Initialize C reg with no. of
comparisons(n-1)
Transfer first data to acc.
Increment HL reg. to point
next memory location
Compare M & A
If A is greater than M then go
to loop1

Stop the program

OBSERVATION:
INPUT
MEMORY
LOCATION
8100
8101
8102
8103
8104

OUTPUT
DATA

MEMORY
LOCATION
8100
8101
8102
8103
8104

DATA

8(A). CODE CONVERSION DECIMAL TO HEX

45

AIM:
To convert a given decimal number to hexadecimal.
ALGORITHM:
1.
2.
3.
4.
5.
6.

Initialize the memory location to the data pointer.

Increment B register.
Increment accumulator by 1 and adjust it to decimal every time.
Compare the given decimal number with accumulator value.
When both matches, the equivalent hexadecimal value is in B register.
Store the resultant in memory location.

RESULT:
Thus an ALP program for conversion of decimal to hexadecimal was written and
executed.

46

FLOWCHART:

START
HL

4500H

A 00

00H

B+1

A +1

Decimal adjust
accumulator

NO

Is
A=M?

YES
A

8101 A

Stop

47

PROGRAM:
ADDRE
SS
8000
8001
8002
8003
8004
8005
8006
8007
8008
8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013

OPCO
DE

LABEL

LOOP

MNEM
ONICS
LXI

OPER
AND
H,8100

MVI

A,00

Initialize A register.

MVI

B,00

Initialize B register..

INR
ADI

B
01

DAA
CMP
JNZ

M
LOOP

MOV
STA

A,B
8101

HLT

COMMENTS
Initialize HL reg. to
8100H

Increment B reg.
Increment A reg
Decimal Adjust Accumulator
Compare M & A
If acc and given number are
not equal, then go to LOOP
Transfer B reg to acc.
Store the result in a memory
location.
Stop the program

RESULT:
INPUT
ADDRESS
DATA
8100

OUTPUT
ADDRESS
DATA
8101

48

8(B). CODE CONVERSION HEXADECIMAL TO DECIMAL

AIM:
To convert a given hexadecimal number to decimal.
ALGORITHM:
1.
2.
3.
4.
5.
6.

Initialize the memory location to the data pointer.

Increment B register.
Increment accumulator by 1 and adjust it to decimal every time.
Compare the given hexadecimal number with B register value.
When both match, the equivalent decimal value is in A register.
Store the resultant in memory location.

RESULT:
Thus an ALP program for conversion of hexadecimal to decimal was written and
executed.

49

START

FLOWCHART:
HL

8100H

A 00

00H

00H

B+1

A +1

Decimal adjust
accumulator

Is
there
carry?
C C+1
D

A, A

B,

Is
A=M?

NO
8101 A, A
C
YES
8102
A
Stop

50

PROGRAM:
ADDRE
SS
8000
8001
8002
8003
8004
8005
8006
8007
8008
8009
800A
800B
800C
800D
800E
800F
8010
8011
8012
8013
8014
8015
8016
8017
8018
8019
801A
801B
801C
801D
801E
801F

OPCO
DE

LABEL

LOOP

NEXT

MNEM
ONICS
LXI

OPER
AND
H,8100

COMMENTS

MVI

A,00

Initialize A register.

MVI

B,00

Initialize B register.

MVI

C,00

Initialize C register for carry.

INR
ADI

B
01

Initialize HL reg. to
8100H

Increment B reg.
Increment A reg

DAA
JNC

NEXT

INR
MOV
MOV
CMP
MOV
JNZ

C
D,A
A,B
M
A,D
LOOP

Increment c register.
Transfer A to D
Transfer B to A
Compare M & A
Transfer D to A
If acc and given number are
not equal, then go to LOOP

STA

8101

Store the result in a memory

location.

MOV
STA

A,C
8102

Transfer C to A
Store the carry in another
memory location.

HLT

Decimal Adjust Accumulator

If there is no carry go to
NEXT.

Stop the program

RESULT:
INPUT
ADDRESS
8100

DATA

OUTPUT
ADDRESS
8101
8102

DATA

51

9(A) BCD ADDITION

AIM:
To add two 8 bit BCD numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.
5.

Initialize memory pointer to data location.

Get the first number from memory in accumulator.
Get the second number and add it to the accumulator
Adjust the accumulator value to the proper BCD value using DAA instruction.
Store the answer at another memory location.

RESULT:
Thus the 8 bit BCD numbers stored at 4500 &4501 are added and the result stored at
4502 & 4503.

52

FLOW CHART:
START

[C]

00H

[HL]

4500H

[A]

[M]

[HL][HL]+1

[A][A]+[M]
Decimal Adjust Accumulator
NO
Is there aYES
Carry ?

[C][C]+1

[HL][HL]+1

[M]

[A]

[HL][HL]+1

[M]

[C]

STOP

53

PROGRAM:
ADDRESS OPCODE LABEL
4100
START
4103
4102
4103
4104
4105

MNEMONICS OPERAND
MVI
C, 00

COMMENT
Clear C reg.

LXI

H, 4500

Initialize HL reg. to
4500

MOV

A, M

4106

INX

4107

ADD

4108

DAA

4109
410A
410B

JNC

L1

Transfer first data to

accumulator
Increment HL reg. to
point next memory
Location.
Add first number to
acc. Content.
Decimal adjust
accumulator
Jump to location if
result does not yield
carry.

410C
410D

INR
INX

C
H

410E

MOV

M, A

410F

INX

4110
4111

MOV
HLT

M, C

L1

Increment C reg.
Increment HL reg. to
point next memory
Location.
Transfer the result from
acc. to memory.
Increment HL reg. to
point next memory
Location.
Move carry to memory
Stop the program

OBSERVATION:
INPUT
4500
4501

OUTPUT
4502
4503

54

9(B). BCD SUBTRACTION

AIM:
To Subtract two 8 bit BCD numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.
5.

Load the minuend and subtrahend in two registers.

Initialize Borrow register to 0.
Take the 100s complement of the subtrahend.
Add the result with the minuend which yields the result.
Adjust the accumulator value to the proper BCD value using DAA instruction.
If there is a carry ignore it.
6. If there is no carry, increment the carry register by 1
7. Store the content of the accumulator (result)and borrow register in the
specified memory location
RESULT:
Thus the 8 bit BCD numbers stored at 4500 &4501 are subtracted and the result stored at
4502 & 4503.

55

FLOW CHART:
START

[D] 00H
HL
4500
B M
HL HL+ 1
C M
A 99
[A] [A] [C]
[A] [A]+1
[A][A]+[B]
DAA

Is there a
Carry ?

YES

NO
[D][D]+1

[HL][HL]+1

[4502] A
[4503] D

STOP

56

PROGRAM:
ADDRESS OPCODE LABEL
4100
START
4101
4102
4103
4104
4105

MNEMONICS OPERAND COMMENT

MVI
D, 00
Clear D reg.
LXI

H, 4500

Initialize HL reg. to
4500

MOV

B, M

4106

INX

4107

MOV

C, M

4108
4109
410A

MVI

A, 99

SUB

410B
410C
410D

INR
ADD
DAA

A
B

410E

JC

LOOP

Transfer first data to

accumulator
Increment HL reg. to
point next mem.
Location.
Move second no. to B
reg.
Move 99 to the
Accumulator
Subtract [C] from acc.
Content.
Increment A register
Add [B] with [A]
Adjust Accumulator
value for Decimal digits
Jump on carry to loop

INR
INX

D
H

4113

MOV

M,A

4114

INX

4115

MOV

M, D

4116

HLT

410F
4110
4111
4112

LOOP

Increment D reg.
Increment HL register
pair
Move the Acc.content to
the memory location
Increment HL reg. to
point next mem.
Location.
Transfer D register
content to memory.
Stop the program

OBSERVATION:
INPUT
4500
4501

OUTPUT
4502
4503

57

10. 2 X 2 MATRIX MULTIPLICATION

AIM:
To perform the 2 x 2 matrix multiplication.
ALGORITHM:
1. Load the 2 input matrices in the separate address and initialize the HL and the DE
register pair with the starting address respectively.
2. Call a subroutine for performing the multiplication of one element of a matrix
with the other element of the other matrix.
3. Call a subroutine to store the resultant values in a separate matrix.
RESULT:
Thus the 2 x 2 matrix multiplication is performed and the result is stored at 4700,4701 ,
4702 & 4703.

58

FLOW CHART:
START
C
HL

00H
8500H

DE

8600H

A
HL
HL+1
DE DE+1; DE DE+1
Call subroutine
MUL

Call subroutine
MUL

A+B

Call subroutine
STORE

HL
HL+1
DE DE+1; DE DE+1

Call subroutine
MUL
A

Is
A=04H
?
NO

A+B

YES

Increment HL
reg. pair

Call subroutine
STORE

HL HL-1
DE DE-1;

STOP

Call subroutine
MUL
B

B
A

A
59
Call subroutine
MUL

MUL

STORE

[A] [[DE]]
D
A
H M

B 87

[A][[BC]]

H H- 1

C C+ 1
Is H=0 ?

YES
RET

NO
[D][D]+1

H H- 1

NO

Is H=0 ?

YES
[H]85; [D]86

RET

60

PROGRAM:
ADDRESS OPCOD LABEL
E
8100
8101
8102
8103
8104
8105
LOOP2
8106
8107
8108
8109
810A
810B
810C
810D
810E
810F
8110
8111
8112
8113
8114
8115
8116

MNEM
ONICS
MVI

OPERAN
D
C, 00

COMMENT

LXI

H, 8500

Initialize HL reg. to
4500

LXI

D, 8600

Load DE register pair

CALL

MUL

Call subroutine MUL

MOV
INX
INX
INX
CALL

B,A
H
D
D
MUL

Move A to B reg.
Increment HL register pair .
Increment DE register pair
Increment DE register pair
Call subroutine MUL

ADD
CALL

B
STORE

DCX

Decrement HL register pair

8117

DCX

Decrement DE register pair

8118

CALL

MUL

Call subroutine MUL

MOV
INX
INX
INX
CALL

B,A
H
D
D
MUL

Transfer A reg content to B reg.

Increment HL register pair
Increment DE register pair
Increment DE register pair
Call subroutine MUL

ADD
CALL

B
STORE

MOV

A,C

Clear C reg.

Add [B] with [A]

Call subroutine STORE

8119
811A
811B
811C
811D
811E
811F
8120
8121
8122
8123
8124
8125
8126

Add A with B
Call subroutine MUL
Transfer C register content to Acc.

61

8127
8128
8129
812A
812B
812C
812D
812E
812F
8130
8131

CPI

04

JZ

LOOP1

Compare with 04 to check whether

all elements are multiplied.
If completed, go to loop1

INX
JMP

H
LOOP2

Increment HL register Pair.

Jump to LOOP2.

HLT
LDAX

MOV
MOV
DCR
JZ

D,A
H,M
H
LOOP3

Stop the program.

Load acc from the memory location
pointed by DE pair.
Transfer acc content to D register.
Transfer from memory to H register.
Decrement H register.
If H is zero go to LOOP3.

LOOP4

ADD
DCR
JNZ

D
H
LOOP4

Add Acc with D reg

Decrement H register.
If H is not zero go to LOOP4.

LOOP3

MVI

H,85

Transfer 85 TO H register.

MVI

D,86

Transfer 86 to D register.

RET
MVI

B,87

Return to main program.

Transfer 87 to B register.

STAX

INR
RET

LOOP1
MUL

8132
8133
8134
8135
8136
8137
8138
8139
813A
813B
813C
813D
813E
813F
8140
8141
8142
8143
8144

STORE

8145
8146

Load A from memory location

pointed by BC pair.
Increment C register.
Return to main program.

OBSERVATION:
4500
4501
4502
4503

INPUT
4600
4601
4602
4603

OUTPUT
4700
4701
4702
4703

62

11. BIOS/DOS CALLS DISPLAY

AIM:
To display a message on the CRT screen of a microcomputer using DOS calls.
ALGORITHM:
1. Initialize the data segment and the message to be displayed.
2. Set function value for display.
3. Point to the message and run the interrupt to display the message in the CRT.
PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
MSG DB 0DH, 0AH, GOOD MORNING , ODH, OAH, $
DATA ENDS
CODE SEGMENT
START:

MOV AX, DATA

MOV DS, AX
MOV AH, 09H
MOV DX, OFFSET MSG
INT 21H
MOV AH, 4CH
INT 21H

CODE ENDS
END START
RESULT:
A message is displayed on the CRT screen of a microcomputer using DOS calls

63

12. BIOS/DOS CALLS FILE MANIPULATION

AIM:
To open a file using DOS calls.
ALGORITHM:
1. Initialize the data segment, file name and the message to be displayed.
2. Set the file attribute to create a file using a DOS call.
3. If the file is unable t o create a file display the message
PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
FILENAME DB SAMPLE.DAT, $
MSG DB 0DH, 0AH, FILE NOT CREATED, ODH, OAH, $
DATA ENDS
CODE SEGMENT
START:
MOV AX, DATA
MOV DS, AX
MOV DX, OFFSET FILENAME
MOV CX, 00H
MOV AH, 3CH
INT 21H
JNC LOOP1
MOV AX, DATA
MOV DS, AX
MOV DX, OFFSET MSG
MOV AH, 09H
INT 21H
LOOP1

MOV AH, 4CH

INT 21H

CODE ENDS
END START
RESULT:
A file is opened using DOS calls.

64

13. BIOS/DOS CALLS DISK INFORMATION

AIM:
To display the disk information.
ALGORITHM:
1. Initialize the data segment and the message to be displayed.
2. Set function value for disk information.
3. Point to the message and run the interrupt to display the message in the CRT.
PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
MSG DB 0DH, 0AH, GOOD MORNING , ODH, OAH, $
DATA ENDS
CODE SEGMENT
START:

MOV AX, DATA

MOV DS, AX
MOV AH, 36H
MOV DX, OFFSET MSG
INT 21H
MOV AH, 4CH
INT 21H

CODE ENDS
END START
RESULT:
The disk information is displayed.

65

1.8086 STRING MANIPULATION SEARCH A WORD

AIM:
To search a word from a string.
ALGORITHM:
1. Load the source and destination index register with starting and the ending
address respectively.
2. Initialize the counter with the total number of words to be copied.
3. Clear the direction flag for auto incrementing mode of transfer.
4. Use the string manipulation instruction SCASW with the prefix REP to
search a word from string.
5. If a match is found (z=1), display 01 in destination address. Otherwise,
display 00 in destination address.
RESULT:
A word is searched and the count of number of appearances is displayed.

66

PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
LIST DW 53H, 15H, 19H, 02H
DEST EQU 3000H
COUNT EQU 05H
DATA ENDS
CODE SEGMENT
START:

MOV AX, DATA

MOV DS, AX
MOV AX, 15H
MOV SI, OFFSET LIST
MOV DI, DEST
MOV CX, COUNT
MOV AX, 00
CLD

REP

SCASW
JZ LOOP
MOV AX, 01

LOOP

MOV [DI], AX
MOV AH, 4CH
INT 21H

CODE ENDS
END START
INPUT:
LIST: 53H, 15H, 19H, 02H

67

OUTPUT:
3000

01

68

2.8086 STRING MANIPULATION FIND AND REPLACE A WORD

AIM:
To find and replace a word from a string.
ALGORITHM:
1. Load the source and destination index register with starting and the
ending address respectively.
2. Initialize the counter with the total number of words to be copied.
3. Clear the direction flag for auto incrementing mode of transfer.
4. Use the string manipulation instruction SCASW with the prefix REP to
search a word from string.
5. If a match is found (z=1), replace the old word with the current word
in destination address. Otherwise, stop.
RESULT:
A word is found and replaced from a string.

69

PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
LIST DW 53H, 15H, 19H, 02H
REPLACE EQU 30H
COUNT EQU 05H
DATA ENDS
CODE SEGMENT
START:

MOV AX, DATA

MOV DS, AX
MOV AX, 15H
MOV SI, OFFSET LIST
MOV CX, COUNT
MOV AX, 00
CLD

REP

SCASW
JNZ LOOP
MOV DI, LABEL LIST
MOV [DI], REPLACE

LOOP

MOV AH, 4CH

INT 21H

CODE ENDS
END START
INPUT:
LIST: 53H, 15H, 19H, 02H

70

OUTPUT:
LIST: 53H, 30H, 19H, 02H

3. 8086 STRING MANIPULATION COPY A STRING

AIM:
To copy a string of data words from one location to the other.
ALGORITHM:
6. Load the source and destination index register with starting and the ending
address respectively.
7. Initialize the counter with the total number of words to be copied.
8. Clear the direction flag for auto incrementing mode of transfer.
9. Use the string manipulation instruction MOVSW with the prefix REP to
copy a string from source to destination.
RESULT:
A string of data words is copied from one location to other.

71

PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
SOURCE EQU 2000H
DEST EQU 3000H
COUNT EQU 05H
DATA ENDS
CODE SEGMENT
START:

MOV AX, DATA

MOV DS, AX
MOV ES, AX
MOV SI, SOURCE
MOV DI, DEST
MOV CX, COUNT
CLD

REP

MOVSW
MOV AH, 4CH
INT 21H

CODE ENDS
END START
INPUT:

OUTPUT:

2000

48

3000

48

2001

84

3001

84

72

2002

67

3002

67

2003

90

3003

90

2004

21

3004

21

73

4.8086 STRING MANIPULATION SORTING

AIM:
To sort a group of data bytes.
ALGORITHM:

Place all the elements of an array named list (in the consecutive
memory locations).

Initialize two counters DX & CX with the total number of elements in

the array.

Do the following steps until the counter B reaches 0.

o Load the first element in the accumulator
o Do the following steps until the counter C reaches 0.

1. Compare the accumulator content with the next element

present in the next memory location. If the accumulator
content is smaller go to next step; otherwise, swap the
content of accumulator with the content of memory
location.
2. Increment the memory pointer to point to the next element.
3. Decrement the counter C by 1.
Stop the execution.

RESULT:
A group of data bytes are arranged in ascending order.

74

PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
LIST DW 53H, 25H, 19H, 02H
COUNT EQU 04H
DATA ENDS
CODE SEGMENT
START:

MOV AX, DATA

MOV DS, AX
MOV DX, COUNT-1

LOOP2:

MOV CX, DX
MOV SI, OFFSET LIST

AGAIN:

MOV AX, [SI]

CMP AX, [SI+2]
JC LOOP1
XCHG [SI +2], AX
XCHG [SI], AX

LOOP1:

ADD SI, 02
LOOP AGAIN
DEC DX
JNZ LOOP2
MOV AH, 4CH
INT 21H

CODE ENDS
END START
INPUT:

75

LIST: 53H, 25H, 19H, 02H

OUTPUT:
LIST: 02H, 19H, 25H, 53H

76

4. INTERFACING 8255 WITH 8085

AIM:
To interface programmable peripheral interface 8255 with 8085 and study its
characteristics in mode0,mode1 and BSR mode.
APPARATUS REQUIRED:
8085 p kit, 8255Interface board, DC regulated power supply, VXT parallel bus
I/O MODES:
Control Word:

MODE 0 SIMPLE I/O MODE:

This mode provides simple I/O operations for each of the three ports and
is suitable for synchronous data transfer. In this mode all the ports can be configured
either as input or output port.
Let us initialize port A as input port and port B as output port

77

PROGRAM:
ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS
4100
START: MVI
A, 90
Initialize port A
as Input and Port
4101
B as output.
4102
OUT
C6
Send Mode
Control word
4103
4104
IN
C0
Read from Port A
4105
4106
OUT
C2
Display the data
in port B
4107
4108
STA
4200
Store the data
read from Port A
4109
in 4200
410A
410B
HLT
Stop the program.
MODE1 STROBED I/O MODE:
In this mode, port A and port B are used as data ports and port C is used as control
signals for strobed I/O data transfer.
Let us initialize port A as input port in mode1
MAIN PROGRAM:
ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS
4100
START: MVI
A, B4
Initialize port A
as Input port in
4101
mode 1.
4102
OUT
C6
Send Mode
Control word
4103
4104
MVI
A,09
Set the PC4 bit
for INTE A
4105
4106
OUT
C6
Display the data
in port B
4107
EI
4108
MVI
A,08
Enable RST5.5
4109
410A
SIM

78

410B
ISR (Interrupt Service Routine)
ADDRESS OPCODES LABEL
4200
START:
4201
4202
4203
4204
4205

EI
HLT

Stop the program.

MNEMONICS OPERAND COMMENTS

IN
C0
Read from port A
STA
HLT

4500

Store in 4500.
Stop the program.

Sub program:
ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS
405E
JMP
4200
Go to 4200
405F
4060
BSR MODE (Bit Set Reset mode)

79

Any lines of port c can be set or reset individually without affecting other lines
using this mode. Let us set PC0 and PC3 bits using this mode.
PROGRAM:
ADDRESS OPCODES LABEL
4100
START:
4101
4102
4103
4104
4105
4106
4107

MNEMONICS OPERAND COMMENTS

MVI
A, 01
Set PC0
OUT

C6

MVI

A,07

OUT

C6

Send Mode
Control word
Set PC3
Send Mode
Control word
80

4109

HLT

Stop the program.

RESULT:
Thus 8255 is interfaced and its characteristics in mode0,mode1 and BSR mode is
studied.

6. INTERFACING 8253 TIMER WITH 8085

Interfacing 8253 Programmable Interval Timer with 8085 p
AIM:
To interface 8253 Interface board to 8085 p and verify the operation of 8253in six
different modes.

APPARATUS REQUIRED:
8085 p kit, 8253 Interface board, DC regulated power supply, VXT parallel bus,
CRO.

Mode 0 Interrupt on terminal count:

The output will be initially low after mode set operations. After loading the counter,
the output will be remaining low while counting and on terminal count; the output
will become high, until reloaded again.

Let us set the channel 0 in mode 0. Connect the CLK 0 to the debounce circuit by
changing the jumper J3 and then execute the following program.
Program:

81

Address Opcodes
4100
4102
4104
4106
4108
410A
410C

Label
START:

Mnemonic
MVI
OUT
MVI
OUT
MVI
OUT
HLT

Operands
A, 30
CE
A, 05
C8
A, 00
C8

Comments
Channel 0 in mode 0
Send Mode Control word
LSB of count
Write count to register
MSB of count
Write count to register

It is observed in CRO that the output of Channel 0 is initially LOW. After giving six
clock pulses, the output goes HIGH.
Mode 1 Programmable ONE-SHOT:
After loading the counter, the output will remain low following the rising edge of
the gate input. The output will go high on the terminal count. It is retriggerable; hence
the output will remain low for the full count, after any rising edge of the gate input.
Example:
The following program initializes channel 0 of 8253 in Mode 1 and also initiates
triggering of Gate 0. OUT 0 goes low, as clock pulse after triggering the goes back to
high level after 5 clock pulses. Execute the program, give clock pulses through the
debounce logic and verify using CRO.
Address Opcodes
4100
4102
4104
4106
4108
410A
410C
4100

Label
START:

Mnemonic
MVI
OUT
MVI
OUT
MVI
OUT
OUT
HLT

Operands
A, 32
CE
A, 05
C8
A, 00
C8
D0

Comments
Channel 0 in mode 1
Send Mode Control word
LSB of count
Write count to register
MSB of count
Write count to register
Trigger Gate0

Mode 2 Rate Generator:

It is a simple divide by N counter. The output will be low for one period of the input
clock. The period from one output pulse to the next equals the number of input
counts in the count register. If the count register is reloaded between output pulses
the present period will not be affected but the subsequent period will reflect the new
value.

82

Example:
Using Mode 2, Let us divide the clock present at Channel 1 by 10. Connect the
CLK1 to PCLK.
Address Opcodes Label
Mnemonic Operands
Comments
4100
3E 74
START: MVI
A, 74
Channel 1 in mode 2
4102
D3 CE
OUT
CE
Send Mode Control word
4104
3E 0A
MVI
A, 0A
LSB of count
4106
D3 CA
OUT
CA
Write count to register
4108
3E 00
MVI
A, 00
MSB of count
410A
D3 CA
OUT
CA
Write count to register
410C
76
HLT
In CRO observe simultaneously the input clock to channel 1 and the output at Out1.
Mode 3 Square wave generator:
It is similar to Mode 2 except that the output will remain high until one half of count
and go low for the other half for even number count. If the count is odd, the output
will be high for (count + 1)/2 counts. This mode is used of generating Baud rate for
8251A (USART).

Example:
We utilize Mode 0 to generate a square wave of frequency 150 KHz at channel 0.
Address Opcodes Label
Mnemonic Operands
Comments
4100
3E 36
START: MVI
A, 36
Channel 0 in mode 3
4102
D3 CE
OUT
CE
Send Mode Control word
4104
3E 0A
MVI
A, 0A
LSB of count
4106
D3 C8
OUT
C8
Write count to register
4108
3E 00
MVI
A, 00
MSB of count
410A
D3 C8
OUT
C8
Write count to register
410C
76
HLT
Set the jumper, so that the clock 0 of 8253 is given a square wave of frequency 1.5 MHz.
This program divides this PCLK by 10 and thus the output at channel 0 is 150 KHz.
Vary the frequency by varying the count. Here the maximum count is FFFF H.
So, the square wave will remain high for 7FFF H counts and remain low for 7FFF H
counts. Thus with the input clock frequency of 1.5 MHz, which corresponds to a period
of 0.067 microseconds, the resulting square wave has an ON time of 0.02184
microseconds and an OFF time of 0.02184 microseconds.

83

To increase the time period of square wave, set the jumpers such that CLK2 of
8253 is connected to OUT 0. Using the above-mentioned program, output a square wave
of frequency 150 KHz at channel 0. Now this is the clock to channel 2.
Mode 4: Software Triggered Strobe:
The output is high after mode is set and also during counting. On terminal count,
the output will go low for one clock period and becomes high again. This mode can be
used for interrupt generation.
The following program initializes channel 2 of 8253 in mode 4.
Example:
Connect OUT 0 to CLK 2 (jumper J1). Execute the program and observe the
output OUT 2. Counter 2 will generate a pulse after 1 second.
Address Opcodes
4100
4102
4104
4106
4108
410A
410C
410E
4110
4112
4114
4116
4118

Label
START:

Mnemonic
MVI
OUT
MVI
OUT
MVI
OUT
MVI
OUT
MVI
OUT
MVI
OUT
HLT

Operands
A, 36
CE
A, 0A
C8
A, 00
C8
A, B8
CE
A, 98
CC
A, 3A
CC

Comments
Channel 0 in mode 0
Send Mode Control word
LSB of count
Write count to register
MSB of count
Write count to register
Channel 2 in Mode 4
Send Mode control Word
LSB of Count
Write Count to register
MSB of Count
Write Count to register

Mode 5 Hardware triggered strobe:

Counter starts counting after rising edge of trigger input and output goes low for
one clock period when terminal count is reached. The counter is retriggerable.
Example:
The program that follows initializes channel 0 in mode 5 and also triggers Gate 0.
Connect CLK 0 to debounce circuit.
Execute the program. After giving Six clock pulses, you can see using CRO, the
initially HIGH output goes LOW. The output ( OUT 0 pin) goes high on the next clock
pulse.
Address Opcodes
4100
4102
4104

Label
START:

Mnemonic
MVI
OUT
MVI

Operands
A, 1A
CE
A, 05

Comments
Channel 0 in mode 5
Send Mode Control word
LSB of count
84

4106
4108
410A
410C

OUT
MVI
OUT
HLT

C8
A, 00
D0

Write count to register

MSB of count
Trigger Gate 0

Result:
Thus the 8253 has been interfaced to 8085 p and six different modes of 8253
have been studied.

7. INTERFACING 8279 WITH 8085

8. INTERFACING 8251 WITH 8085

85

9. 8051 - SUM OF ELEMENTS IN AN ARRAY

AIM:
To find the sum of elements in an array.
ALGORITHM:
1.

Load the array in the consecutive memory location and

initialize the memory pointer with the starting address.

2.

Load the total number of elements in a separate register as

a counter.

3.

Clear the accumulator.

4.

Load the other register with the value of the memory

pointer.

5.

Add the register with the accumulator.

6.

Check for carry, if exist, increment the carry register by 1.

otherwise, continue

7.

Decrement the counter and if it reaches 0, stop. Otherwise

increment the memory pointer by 1 and go to step 4.

RESULT:
The sum of elements in an array is calculated.

86

PROGRAM:
MOV DPTR, #4200
MOVX A, @DPTR
MOV R0, A
MOV B, #00
MOV R1, B
INC DPTR
LOOP2:

CLR C
MOVX A, @DPTR
ADD A, B
MOV B, A
JNC LOOP
INC R1

LOOP:

INC DPTR
DJNZ R0, LOOP2
MOV DPTR, #4500
MOV A, R1
MOVX @DPTR, A

87

INC DPTR
MOV A, B
MOVX @DPTR, A
HLT:

SJMP HLT

INPUT

OUTPUT:

4200

04

4500

0F

4201

05

4501

00

4201

06

4202

03

4203

02

88

10(A).8051 - HEXADECIMAL TO DECIMAL CONVERSION

AIM:
To perform hexadecimal to decimal conversion.
ALGORITHM:
1.

Load the number to be converted into the accumulator.

2.

If the number is less than 100 (64H), go to next step;

otherwise, subtract 100 (64H) repeatedly until the remainder is less than 100
(64H). Have the count(100s value) in separate register which is the carry.
3.

If the number is less than 10 (0AH), go to next step;

otherwise, subtract 10 (0AH) repeatedly until the remainder is less than 10

(0AH). Have the count(tens value) in separate register.
4.

The accumulator now has the units.

5.

Multiply the tens value by 10 and add it with the units.

6.

Store the result and carry in the specified memory location.

RESULT
The given hexadecimal number is converted into decimal number.

89

PROGRAM:
MOV DPTR, #4500
MOVX A, @DPTR
MOV B, #64
DIV A, B
MOV DPTR, #4501
MOVX @DPTR, A
MOV A, B
MOV B, #0A
DIV A, B
INC DPTR
MOVX @DPTR, A
INC DPTR
MOV A, B
MOVX @DPTR, A
HLT:

SJMP HLT

INPUT
4500

OUTPUT:
D7

4501

15

4502

02

90

10(B).8051 - DECIMAL TO HEXADECIMAL CONVERSION

AIM:
To perform decimal to hexadecimal conversion
ALGORITHM:
1.

Load the number to be converted in the accumulator.

2.

Separate the higher order digit from lower order.

3.

Multiply the higher order digit by 10 and add it with the

lower order digit.

4.

Store the result in the specified memory location.

RESULT:
The given decimal number is converted to hexadecimal number.
PROGRAM:
MOV DPTR, #4500
MOVX A, @DPTR
MOV B, #0A
MUL A, B
MOV B, A
INC DPTR
MOVX A, @DPTR
ADD A, B
INC DPTR
MOVX @DPTR, A
HLT:

SJMP HLT

INPUT
4500

23

OUTPUT
4501

17

91

13. STEPPER MOTOR INTERFACING WITH 8051

AIM:
To interface a stepper motor with 8051 microcontroller and operate it.
THEORY:
A motor in which the rotor is able to assume only discrete stationary angular
position is a stepper motor. The rotary motion occurs in a step-wise manner from one
equilibrium position to the next. Stepper Motors are used very wisely in position control
systems like printers, disk drives, process control machine tools, etc.
The basic two-phase stepper motor consists of two pairs of stator poles. Each of
the four poles has its own winding. The excitation of any one winding generates a North
Pole. A South Pole gets induced at the diametrically opposite side. The rotor magnetic
system has two end faces. It is a permanent magnet with one face as South Pole and the
other as North Pole.
The Stepper Motor windings A1, A2, B1, B2 are cyclically excited with a DC
current to run the motor in clockwise direction. By reversing the phase sequence as A1,
B2, A2, B1, anticlockwise stepping can be obtained.
2-PHASE SWITCHING SCHEME:
In this scheme, any two adjacent stator windings are energized. The switching
scheme is shown in the table given below. This scheme produces more torque.
ANTICLOCKWISE
STEP A1
A2
B1

1
2
3
4

1
0
0
1

0
1
1
0

0
0
1
1

B2

DATA

1
1
0
0

9h
5h
6h
Ah

CLOCKWISE
STEP A1 A2

1
2
3
4

1
0
0
1

0
1
1
0

B1

B2

DATA

1
1
0
0

0
0
1
1

Ah
6h
5h
9h

ADDRESS DECODING LOGIC:

The 74138 chip is used for generating the address decoding logic to generate the
device select pulses, CS1 & CS2 for selecting the IC 74175.The 74175 latches the data
bus to the stepper motor driving circuitry.
Stepper Motor requires logic signals of relatively high power. Therefore, the
interface circuitry that generates the driving pulses use silicon darlington pair transistors.

92

The inputs for the interface circuit are TTL pulses generated under software control using
the Microcontroller Kit. The TTL levels of pulse sequence from the data bus is translated
to high voltage output pulses using a buffer 7407 with open collector.

93

PROGRAM :
Address

OPCODES

Label

Comments
ORG

4100h

START:

MOV

DPTR, #TABLE

LOOP:

MOV
MOVX

R0, #04
A, @DPTR

4106
4108
410A

PUSH
PUSH
MOV

DPH
DPL
DPTR, #0FFC0h

410D

MOVX

@DPTR, A

4100

4103
4105

410E
4110
4112
4114
4116
4118
411A

MOV
DELAY: MOV
DELAY DJNZ
1:
DJNZ
POP
POP
INC

411B

DJNZ

R0, LOOP

411D

SJMP

START

DB

09 05 06 0Ah

411F

TABLE:

R4, #0FFh
R5, #0FFh
R5, DELAY1
R4, DELAY
DPL
DPH
DPTR

Load the start

address of switching
scheme data TABLE
into Data Pointer
(DPTR)
Load the count in R0
Load the number in
TABLE into A
Push DPTR value to
Stack
Load the Motor port
address into DPTR
Send the value in A
to stepper Motor port
address
Delay loop to cause
a specific amount of
time delay before
next data item is sent
to the Motor
POP back DPTR
value from Stack
Increment DPTR to
point to next item in
the table
Decrement R0, if not
zero repeat the loop
Short jump to Start
of the program to
make the motor
rotate continuously
Values as per twophase switching
scheme

PROCEDURE:
Enter the above program starting from location 4100.and execute the same. The
stepper motor rotates. Varying the count at R4 and R5 can vary the speed. Entering the
data in the look-up TABLE in the reverse order can vary direction of rotation.

94

RESULT:
Thus a stepper motor was interfaced with 8051 and run in forward and reverse
directions at various speeds.

95