Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                

Answer All Questions: 4 Semester - B.E. / B.Tech Second Internal Test - March 2013

Download as docx, pdf, or txt
Download as docx, pdf, or txt
You are on page 1of 1

R.M.K.

COLLEGE OF ENGINEERING AND TECHNOLOGY


R.S.M NAGAR, PUDUVOYAL-601206

4th Semester B.E. / B.Tech


Second Internal test March 2013
Sub. Title
Sub. Code
Time

: Linear Integrated Circuits


: EC 2254
: 100 Minutes

Date
: 06.03.2013
Branch : ECE
Max. Marks: 50

Answer all questions


1.
2.
3.
4.
5.

Part A (5x 2 = 10)


Draw the circuit diagram of integrator and write its output equation.
What is zero crossing detector?
Define the Lock-in Range and capture range.
What is a Gilbert cell?
VCO is called as V-F converter.Why?
Part B - (2 x 16 + 1 x 8 = 40)

6.(a)i) With a neat diagram explain the positive and negative clipper.

(8 marks)

ii) Explain the working of Schmitt trigger and derive its hysteresis voltage.

(8 marks)

(OR)
(b)i) Explain the first order low pass butterworth filter with a neat circuit diagram.
Derive its frequency response and plot the same.

(8 marks)

ii) Design a low pass second order filter with cutoff frequency of 1kHz and with a
pass band gain of 2.

(8 marks)

7.(a)i) Explain the basic building blocks of a PLL.


ii) With neat block diagrams explain the various applications of PLL.

(8 marks)
(8 marks)

(OR)
(b)i) Explain the VCO with a neat block diagram. Write its typical connection diagram
and its output equation.
ii) Explain the working principle of variable transconductance multiplier.
8.(a) Draw and explain the band pass filter for high Q values.
(OR)
(b) Derive the expression for Log Amplifier with neat diagram.

(8 marks)
(8 marks)
(8 marks)
(8 marks)

You might also like