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    Whole Day Classes Are Lost

    Uploaded by

    Siva Yellampalli
    The document contains a schedule for various university exams, classes, and labs from November 23rd to December 31st. It notes which days will have full or partial classes based on exam schedules. Exams are scheduled for various courses on most weekday mornings and afternoons. Labs and classes are rescheduled or combined on days with exams. Soft skills training, seminars, and internal exams are scheduled for some weekends.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd

    Whole Day Classes Are Lost

    Uploaded by

    Siva Yellampalli
    16 views3 pages
    The document contains a schedule for various university exams, classes, and labs from November 23rd to December 31st. It notes which days will have full or partial classes based on exam schedules. Exams are scheduled for various courses on most weekday mornings and afternoons. Labs and classes are rescheduled or combined on days with exams. Soft skills training, seminars, and internal exams are scheduled for some weekends.

    Original Description:

    FT 15

    Original Title

    FT 15 Calendar

    Copyright

    © © All Rights Reserved

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    DOCX, PDF, TXT or read online from Scribd

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    The document contains a schedule for various university exams, classes, and labs from November 23rd to December 31st. It notes which days will have full or partial classes based on exam schedules. Exams are scheduled for various courses on most weekday mornings and afternoons. Labs and classes are rescheduled or combined on days with exams. Soft skills training, seminars, and internal exams are scheduled for some weekends.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    16 views3 pages

    Whole Day Classes Are Lost

    Uploaded by

    Siva Yellampalli
    The document contains a schedule for various university exams, classes, and labs from November 23rd to December 31st. It notes which days will have full or partial classes based on exam schedules. Exams are scheduled for various courses on most weekday mornings and afternoons. Labs and classes are rescheduled or combined on days with exams. Soft skills training, seminars, and internal exams are scheduled for some weekends.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    of 3

    23-11-15 (Monday)

    24-11-15 (Tuesday)

    University Exam (12EC029 -9:30


    Am)
    University Exam (12EC020 2 Pm)
    University Exam (14ELD21 -9:30
    Am)
    University Exam (14EVE21 -9:30
    Am)
    University Exam (12EC025 -2 Pm)

    Whole day classes


    are lost

    Whole day classes


    are lost

    25-11-15
    (Wednesday)

    University Exam (12EC123 -2 Pm)

    Morning classes as
    per schedule
    FT-15 DE Verilog
    lab lost
    Whole day classes
    are lost

    26-11-15 (Thursday)

    University Exam (14ELD22 -9:30


    Am)
    University Exam (14EVE22 -9:30
    Am)
    University Exam (12EC047 -2 Pm)

    27-11-15 (Friday)

    University Exam (12EC126 -2 Pm)

    Morning classes as
    per schedule

    28-11-15 (Saturday)

    9:45 Am- 11:45 Am - Mr. Ramana


    Reddy
    11:45 Am 1:45 Pm Ms. Nayana
    (14ELD14)
    - Dr. Venkataratnam
    (14EVE14)
    2:30 Pm - 4:30 Pm - Mr. Nagaraj
    (14EVE12)

    We are converting
    the university
    Holiday to working
    day to cover the
    syllabus

    Sl. No

    Date
    1-12-15
    (Tuesday)
    2-12-15
    (Wednesday)
    3-12-15
    (Thursday)
    4-12-15
    (Friday)

    Task

    Remark

    Embedded + Verilog Compensation lab


    (VLSI & DE combined)
    University Exam : 14ELD251 VLSI Design
    & Verification (FN 9:30)

    Both labs are combined

    Friday Classes in the afternoon


    5-12-15
    (Saturday)
    6-12-15
    (Sunday)
    7-12-15
    (Monday)
    8-12-15
    (Tuesday)
    9-12-15
    (Wednesday)
    10-12-15
    (Thursday)

    Softskills for FT-15 VLSI & DE

    University Exam : 12EC003 Advanced


    Computer Architecture (AN 2:00 Pm)

    University Exam: 12EC012 ASIC Design


    (FN: 9:30 Am)

    11-12-15
    (Friday)
    12-12-15
    (Saturday)

    University Exam: 12EC021 CMOS VLSI


    Design (AN 2:00 Pm)
    Soft skills Training
    Seminar on 14EVE17 (2:30-6:30 Pm)

    13-12-15
    (Sunday)

    Seminar on 14EVE17 (10:00-1:30 Pm)


    Seminar on 14EVE17 (2:30-6:30 Pm)

    14-12-15
    (Monday)
    15-12-15

    University Exam: 12EC077 Synthesis and

    To be confirmed

    Classes will not be disturbed


    FT-15 VLSI Verilog Lab missed

    Morning class shifted to afternoon


    FT-15 DE orcad lab missed
    Classes will not be disturbed
    To be confirmed
    Two Panels
    1. Nagaraj, Ganesh (8
    students)
    2. Dr. Venkataratnam,
    Nayana, Pradeep (8
    students)
    Panel Dr. Siva, Nagaraj, Pradeep (7
    students)
    Panel Dr. Venkataratnam, Ganesh,
    Pradeep (7 students)

    Classes will not be disturbed

    (Tuesday)
    16-12-15
    (Wednesday)
    17-12-15
    (Thursday)
    18-12-15
    (Friday)
    19-12-15
    (Saturday)
    20-12-15
    (Sunday)
    21-12-15
    (Monday)
    22-12-15
    (Tuesday)
    23-12-15
    (Wednesday)

    24-12-15
    (Thursday)
    25-12-15
    (Friday)
    26-12-15
    (Saturday)

    27-12-15
    (Sunday)
    28-12-15
    (Monday)
    29-12-15
    (Tuesday)
    30-12-15
    (Wednesday)
    31-12-15
    (Thursday)

    Optimization of Digital Circuits (AN 2:00


    Pm)
    University Exam:12EC117 Automotive
    Electronics (AN 2:00 Pm)
    Embedded + Verilog Compensation lab
    (VLSI & DE combined)
    Second Internal FT- 15 VLSI, FT-15 DE
    Second Internal FT- 15 VLSI, FT-15 DE, PT15 VLSI, PT-15 DE
    Second Internal FT- 15 VLSI, FT-15 DE, PT15 VLSI, PT-15 DE
    FT- 15 VLSI, FT-15 DE Lab record
    submission
    FT- 15 VLSI, FT-15 DE Lab record
    submission
    FT- 15 VLSI, FT-15 DE Lab Internal Exam
    Finalization of Monthly attendance for FT15 VLSI, FT-15 DE, PT-15 DE, PT-15
    VLSI
    Holiday
    Holiday

    T-15 VLSI Embedded Lab missed


    Classes will not be disturbed
    FT-15 DE Verilog lab missed
    Both labs are combined

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