This document describes a latch circuit using NOR gates that functions as a bistable. It requires a switch/resistor voltage divider at the NOR gate inputs to hold them low and pulse them high, necessitating pull-down resistors. This NOR gate latch circuit operates differently than a SET/RESET latch bistable built from NAND gates.
This document describes a latch circuit using NOR gates that functions as a bistable. It requires a switch/resistor voltage divider at the NOR gate inputs to hold them low and pulse them high, necessitating pull-down resistors. This NOR gate latch circuit operates differently than a SET/RESET latch bistable built from NAND gates.
This document describes a latch circuit using NOR gates that functions as a bistable. It requires a switch/resistor voltage divider at the NOR gate inputs to hold them low and pulse them high, necessitating pull-down resistors. This NOR gate latch circuit operates differently than a SET/RESET latch bistable built from NAND gates.
This document describes a latch circuit using NOR gates that functions as a bistable. It requires a switch/resistor voltage divider at the NOR gate inputs to hold them low and pulse them high, necessitating pull-down resistors. This NOR gate latch circuit operates differently than a SET/RESET latch bistable built from NAND gates.
