High Speed Cmos Logic
High Speed Cmos Logic
High Speed Cmos Logic
Fairchild Semiconductor
Interfacing to MM74HC April 1998
This application note pertains to the VHC Speciality Function devices only (listed in this section of the databook).
These devices are direct pin, function and spec replacements for their MM74HC counterparts.
On many occasions it might be necessary to interface 2.4V (2.7V for LSTTL). High-speed CMOS’s logic “1” input
MM74HC logic to other types of logic or to some other con- level is 3.5V (VCC = 5.0V), so TTL is not guaranteed to pull a
trol circuitry. HC-CMOS can easily be interfaced to any other valid CMOS logic “1” level. If the TTL circuit is only driving
logic family including 74LS TTL, MM74C, CD4000 CMOS CMOS, its output voltage is usually about 3.5V. HC-CMOS
and 10,000 ECL logic. Logic interfacing can be sub-divided typically recognizes levels greater than 3V as a logic high, so
into two basic categories: interfacing circuitry operating at in most instances TTL can drive MM74HC.
the same supply voltage and interfacing to circuitry operating To see why TTL does not pull up further, Figure 1 shows a
on a different voltage. In the latter case, some logic level typical standard TTL gate’s output schematic. As the output
translation is usually required, but many easily available cir- pulls up, it can go no higher than two diode voltage drops be-
cuits simplify this task. Usually, both instances require little or low VCC due to Q2 and D2. So when operating with a 5V
no external circuitry. supply, the TTL output cannot go much higher than about
3.5V. Figure 1 shows an LSTTL gate, which has an output
Interfacing Between TTL and MM74HC Logic structure formed by Q2 and Q4. As the LSTTL output goes
This high-speed CMOS family can operate from 2–6V, how- high, these two transistors cannot pull higher than two
ever, in most applications which interface to TTL, both logic base-emitter voltage drops below VCC, and, as above, the
families will probably operate off the same 5V TTL supply. output cannot go much higher than 3.5V. If the output of ei-
The interconnection can be broken down into two cate- ther the LSTTL or TTL gate is loaded or the off sink transistor
gories: TTL outputs driving CMOS inputs, and CMOS out- has some collector leakages, the output voltage will be
puts driving TTL inputs. In both cases the interface is very lower.
simple. Many LSTTL and ALSTTL circuits take R2 of Figure 1 and in-
In the first case, TTL driving HC, there are some minor differ- stead of connecting it to ground, it is connected to the output.
ences in TTL specifications for totem-pole outputs and This enables the TTL output to go to 4.3V (VCC = 5.0V) which
high-speed CMOS input specifications. The TTL output low is more than adequate to drive CMOS. A simple measure-
level is completely compatible with the MM74HC input low, ment of open circuit VOH can verify this circuit configuration.
but TTL outputs are specified to have an output high level of
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(a)
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(b)
FIGURE 1. Schematic Diagrams for Typical (a) Standard and
(b) Low Power Schottky TTL Outputs
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eliminated. The direct interconnection of the TTL to CMOS FIGURE 2. Range of Pull-Up Resistors for Low
translators is shown in Figure 4. Power Schottkey TTL to CMOS Interface
If TTL open collector outputs with a pull-up resistor are driv-
ing MM74HC logic, there is no interface circuitry needed as When MM74HC outputs are driving TTL inputs, as shown in
the external pull-up will pull the output to a high level very Figure 5, there is no incompatibility. Both the high and low
close to VCC. The value of this pull-up for LS gates has the output voltages are compatible with TTL. The only restriction
same constraints as the totem-pole outputs and its value can in high-speed CMOS driving TTL is the same fanout restric-
be chosen from Figure 2 as well. The special TTL to CMOS tions that apply when TTL is driving TTL.
buffers may also be used in this case, but they are not
necessary.
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High-speed CMOS has much improved output drive com- CD4000 and MM74C logic families are completely input and
pared to CD4000 and MM74C metal-gate CMOS logic. Fig- output logic level compatible. Since both families have very
ure 6 tabulates the fanout capabilities for this family. low input currents, there is essentially no fanout limitations
MM74HC standard outputs have a fanout capability of driv- for either family.
ing 10 LSTTL equivalent load and MM74HC bus driver out- The same input and output compatibility of the HC-CMOS
puts can drive up to 15 LSTTL inputs. It is unlikely that makes it also ideal for use interfacing to CMOS-LSI circuits.
greater fanouts will be necessary, but several gates can be For example, MM74HC can be directly connected to CMOS
paralleled to increase output drive. microprocessors, as well as CMOS telecommunications
products.
MM74HC and NMOS/HMOS Interconnection
With the introduction of CMOS circuits that are MM74HC to ECL Interconnection
speed-equivalent to LSTTL, these fast CMOS devices will There may be some instances where an ECL logic system
replace much of the bipolar support logic for many NMOS must be connected to high-speed CMOS logic. There are
and HMOS microprocessor and LSI circuits. As a group, several possible methods to interconnect these families. Fig-
there is no real standard set of input and output specifica- ure 8 shows one method which uses the 10125/10525 ECL
tions, but most NMOS circuits conform to TTL logic input and to TTL interface circuit to go from ECL to HC-CMOS logic
output logic level specifications. and the 10124/10524 to connect CMOS outputs to ECL in-
NMOS outputs will typically pull close to VCC. As with LSTTL, puts. These devices allow the CMOS to operate with
standard MM74HC CMOS inputs will typically accept NMOS VCC = 5V while the ECL circuitry uses a −5.2V supply.
outputs directly. However, to improve compatibility the An alternate approach would be to operate the CMOS from
MM74HCT series of TTL compatible circuits may be used. the −5.2V ECL supply as shown in Figure 9. Thus CMOS
These devices are particularly useful in microprocessor sys- outputs could be directly connected to ECL inputs.
tems, since many of the octal devices are bus oriented and
have pin-outs with inputs and outputs on opposite sides of Logic Interfaces Requiring Level Translation
the package. As with LSTTL, a second solution is to add a
There are many instances when interfacing from one logic
pull-up resistor between the NMOS output and VCC. Both
family to another that the other logic family will be operating
methods are shown in Figure 7. from a different power supply voltage. If this is the case, a
MM74HC outputs can directly drive NMOS inputs. In fact, level translation must be accomplished. There are many dif-
this situation is the same as if high-speed CMOS was driving ferent permutations of up and down level conversions that
itself. NMOS circuits have near zero input current and usu- may be required. A few of the more likely ones are discussed
ally have input voltage levels that are TTL compatible. Thus here.
MM74HC needs no additional circuitry to drive NMOS and
there is also virtually no DC fanout restriction.
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(a)
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(b)
FIGURE 7. Improved Compatibility NMOS to CMOS Connection Using
(a) TTL Input Compatible Devices or (b) External Pull-Up Resistors
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If MM74HC is operated in a battery back up application for a levels are compatible with CMOS inputs, as shown in Figure
TTL system, high-speed CMOS may be operated at 10. When high-speed CMOS is operated at 2V, the TTL out-
VCC = 2–3V and can be connected to 5V TTL. CMOS operat- puts will exceed the CMOS power supply and the CMOS
ing at 3V can be directly connected to TTL since its input and outputs will just barely pull high enough to drive TTL, so
output levels are compatible with TTL, and the TTL output some level translation will be necessary.
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(a)
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(b)
FIGURE 10. When HC-CMOS Is Operating At VCC = 3V No Logic Level Conversion Circuitry Is Needed
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CD4000 and MM74C metal-gate CMOS logic can be oper- will have to be down converted to 5V high-speed CMOS lev-
ated over a wider supply range that MM74HC, and because els. Figure 11 shows several possible down conversion tech-
of this there will be instances when metal-gate CMOS and niques using a CD4049, CD4050, MM74HC4049,
HC-CMOS will be operated off different supply voltages. MM74HC4050, or MM74C906.
Usually 9V to 15V CD4000 logic levels
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(a)
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(b)
FIGURE 11. CD4000 or 74C Series CMOS to HC-CMOS Connection with Logic Level Conversion Using (a) Special
Down Converters or (b) Open Drain CMOS
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Since CMOS has a high input impedance, another possibility Up conversion from MM74HC to metal-gate CMOS can be
is to use a resistor voltage divider for down level conversion accomplished as shown in Figure 13. Here an MM74C906
as shown in Figure 12. Voltage dividers will, however, dissi- open drain buffer with a pull-up resistor tied to the larger
pate some power. power supply is used.
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FIGURE 14. Interfacing Between HC-CMOS and High Voltage Control Logic
Conclusion
Interfacing between different logic families is not at all diffi-
cult. In most instances, when no logic level translation be-
tween is done, no external circuitry is needed to interconnect
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logic families. Even though the wide supply range of MM74C
and CD4000 creates many possible logic level conversion FIGURE 15. Interfacing MM74HC to Relays
interface situations, most are easily handled by employing a
minimum of extra circuitry. Additionally, several special inter-
face devices also simplify logic level conversion.
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Interfacing to MM74HC High-Speed CMOS Logic
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.