IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 20, NO.

6, NOVEMBER/DECEMBER 2014

3804310

100 000 Frames/s 64 32 Single-Photon Detector

Array for 2-D Imaging and 3-D Ranging
Danilo Bronzi, Student Member, IEEE, Federica Villa, Simone Tisa, Alberto Tosi, Member, IEEE,
Franco Zappa, Senior Member, IEEE, Daniel Durini, Sascha Weyers, and Werner Brockherde

AbstractWe report on the design and characterization of

a multipurpose 64 32 CMOS single-photon avalanche diode
(SPAD) array. The chip is fabricated in a high-voltage 0.35-m
CMOS technology and consists of 2048 pixels, each combining
a very low noise (100 cps at 5-V excess bias) 30-m SPAD, a
prompt avalanche sensing circuit, and digital processing electronics. The array not only delivers two-dimensional intensity information through photon counting in either free-running (down to
10-s integration time) or time-gated mode, but can also perform
smart light demodulation with in-pixel background suppression.
The latter feature enables phase-resolved imaging for extracting
either three-dimensional depth-resolved images or decay lifetime
maps, by measuring the phase shift between a modulated excitation
light and the reflected photons. Pixel-level memories enable fully
parallel processing and global-shutter readout, preventing motion
artifacts (e.g., skew, wobble, motion blur) and partial exposure effects. The array is able to acquire very fast optical events at high
frame-rate (up to 100 000 fps) and at single-photon level. Lownoise SPADs ensure high dynamic range (up to 110 dB at 100 fps)
with peak photon detection efficiency of almost 50% at 410 nm.
The SPAD imager provides different operating modes, thus, enabling both time-domain applications, like fluorescence lifetime
imaging (FLIM) and fluorescence correlation spectroscopy, as well
as frequency-domain FLIM and lock-in 3-D ranging for automotive vision and lidar.
Index TermsPhoton Counting, CMOS imagers, SPAD, 2-D
imaging, 3-D ranging, FLIM, FCS, time-gated imaging.

I. INTRODUCTION
INGLE-Photon Avalanche Diodes (SPADs) gradually
emerged in the early 1990s as a solid-state solution to replace photomultiplier tubes and micro-channel plates in photon
counting applications [1]. From the mid-1990s onwards, the use
of dedicated CMOS-compatible processes fostered significant
advances in building multichannel photon-counting modules,
thus making SPAD devices a robust and competitive technology
in many single-photon applications like confocal microscopy
[2], biological essays [3], single-molecule spectroscopy [4],
quantum cryptography [5], quantum key distribution [6], dif-

Manuscript received February 1, 2014; revised May 29, 2014; accepted July
17, 2014. This work was supported by the MiSPiA Project 257646 under the
ICT theme of the EC FP7 Framework.
D. Bronzi, F. Villa, A. Tosi, and F. Zappa are with the Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano 20133,
Italy (e-mail: danilo.bronzi@polimi.it).
S. Tisa is with the Micro Photon Device S. r. l., Bolzano 39100, Italy.
D. Durini, S. Weyers, and W. Brockherde are with the Fraunhofer Institute
for Microelectronic Circuits and Systems IMS, D-47057 Duisburg, Germany.
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/JSTQE.2014.2341562

fuse optical tomography [7], LIDAR [8] and adaptive optics in

astrophysics [9].
The increasing demand of high-throughput single-photon detector arrays drove the research towards the development of
SPAD imagers in conventional CMOS processes. To this aim, a
major breakthrough was achieved in early 2000s, when SPAD
structures were successfully demonstrated in standard highvoltage CMOS technologies [10][12]. Although there is still
room for improvements regarding fill-factor, quantum efficiency
and optical stack optimization, CMOS SPAD arrays represent,
nowadays, a viable solution in high frame-rate single-photon
imaging applications, where even the sensitivity of bulky intensified or expensive electron-multiplying charge-coupled devices
is limited by read-out noise [13]. Typical examples are Forster
Resonance Energy Transfer [14], Fluorescence Lifetime Imaging Microscopy (FLIM) [15][19], Fluorescence Correlation
Spectroscopy (FCS) [20], [21] and Raman Spectroscopy [22],
[23], as well as Positron Emission Tomography [24], and optical
communication [25][27].
A major application which drives the development of SPAD
arrays (not only in Silicon but also in III-V compounds) is optical 3D ranging, where picosecond timing resolution and singlephoton sensitivity are required to achieve millimeter accuracy
together with high-frame rate capability. SPAD-based multipixel rangefinders can extract distance information from either
direct photons time-of-flight (dTOF) measurements, through
on-chip Time-to-Digital Converters (TDCs) [28][33] or Timeto-Amplitude Converters [34], or indirect time-of-flight (iTOF)
measurement, where distance information is extracted from the
phase-delay between a pulsed [35] or continuous-wave (CW)
[36][39] modulated light source and its back-reflected echo
(like in heterodyne or homodyne demodulation). Compared to
CMOS/CCD [40] and CMOS [41] rangefinders, SPAD arrays
have inherent better time resolution (limited by SPAD timing
jitter, typically better than 100 ps), higher accuracy (just limited
by photon shot-noise) and better linearity (since analog amplification and ADC quantization non-idealities are avoided) at the
expense of fill-factor and pixel resolution [36]. In the literature
reported so far, CMOS SPAD arrays were designed to target
specific applications, by optimizing the trade-off among many
parameters like SPAD area and geometry, number of pixels,
complexity of in-pixel, on-chip and off-chip read-out electronics, etc., but limiting, conjointly, the exploitation in other fields.
In order to broaden the application fields of single-photon
CMOS SPAD imagers, we conceived a multipurpose image
sensor based on a cost-effective 0.35 m CMOS 64 32 SPAD
array, able to process at pixel-level both 2D (such as light

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3804310

IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 20, NO. 6, NOVEMBER/DECEMBER 2014

intensity, reflectivity, luminescence or fluorescence) and 3D

(such as distance, shape, velocity) information at a frame rate
up to 100,000 fps. Although pixel density is limited due to
the amount of in-pixel circuitry, fill-factor is comparable to
other reported approaches; moreover, the flexible architecture
and the featured best-in-class CMOS SPAD detectors employed
enable high performance, in terms of high frame-rate and singlephoton sensitivity, in most applications. The paper is organized
as follows: Section II outlines the novel architecture; Section
III presents and discusses preliminary results from 2D and 3D
acquisitions; finally, Section IV concludes the paper.
Fig. 1.

Simplified pixels block diagram. Note that En1 is an active-low input.

II. CHIP DESIGN

SPAD array architectures usually integrate either counters or
time converters. The former components are suited for timegated single-photon counting (TGSPC) and iTOF; instead the
latter ones allow to implement time-correlated single-photon
counting (TCSPC) and direct time-of-flight (dTOF).
TCSPC typically outperforms TGSPC when complex waveforms are to be acquired, achieving higher accuracy in lifetime measurement [42], [43], whilst dTOF generally reaches
better distance precision than iTOF, in light-starved condition
[44]. Nonetheless, time converters produce a large amount of
raw data (more than 1 byte per photon), which require high
data throughput and complex off-chip computation. Therefore,
TDC/TAC-based imager have an overall system frame-rate limited to less than few hundreds fps [18] and are suited only for
very low photon rates.
TGSPC and iTOF architectures usually have one or more
in-pixel counters, which allow to record the intensity of either slowly varying optical signals (in the microsecond range
or slower) or high-repetition rate pulsed signals in fixed time
windows to suppress unwanted background pulses (thus increasing dynamic range) or to discriminate between fast and
slow events (e.g. between Raman scattering and fluorescence,
or between fluorescence and phosphorescence) [42]. TGSPC
can be also used to reconstruct the waveform of very fast
optical signals (in the nanosecond range) by using a slidingtime window scheme: many measurement cycles are performed
and the waveform of the input signal is sampled by sliding
the delay of the integration window [42]. Although this approach has a very poor photon collection efficiency for full
waveform scanning, since most of the time the detector is
gated off, it becomes advantageous when the waveform is
known a priori (e.g. single/double exponential decays or CWmodulated light). Indeed, in this situation, the optical signal
can be undersampled, with an almost unitary collection efficiency, in few time windows (typically two or four), thus
dramatically reducing the output data stream. Then, waveform
parameters (such as decay constants, phase shift, or signal intensity) can be easily determined with very low computational
overhead.
Consequently, counter-based arrays reach higher frame-rates,
tolerate higher count rates, and offer better flexibility. For this
reason, we conceived and developed an array architecture based
on counter-based pixels.

A. Pixel Circuitry
The smart pixel (Fig. 1) is fabricated in a high-voltage
0.35 m 2P-4M (two polysilicon and four metal interconnect
levels) CMOS technology on 8 wafers [47][49]. The pixel
comprises a round SPAD, with 30 m active-area diameter, and
includes an analog quenching circuit front-end to properly bias
the SPAD above its breakdown voltage and to promptly sense its
ignition [50]. Low area occupation (only 18 transistors), minimized stray capacitances, and fast mixed passive-active quenching [51] through positive feedback on the quenching transistor,
considerably minimize the avalanche charge flowing through
the detector [52], hence the deleterious afterpulsing issues [1],
while boosting the maximum count rate up to 50 Mcps, with
a hold-off time (THO ) as short as 20 ns. The quenching circuit
provides a digital pulse to the following electronics through a
shaping circuitry, which adjusts the pulse width and manages
the synchronization with external signals to avoid race hazards.
Three synchronous Fibonacci LFSR (Linear Feedback Shift
Register) counters (two of which are bidirectional) are employed
to grant high-speed operations and low area occupation. A 9-bit
counting depth prevents overflow in typical working conditions,
i.e. with hold-off time varying from 20 ns to 60 ns, and frame
readout lasting 10 s to 30 s.
Three in-pixel memory registers store the content of the respective counter, simultaneously for the whole array, thus allowing global shutter operation and avoiding the well-known
issues related to rolling shutter readout [37]. Each time the
Row-En strobe is set, a 3:1 multiplexer connects the memory to
be read out to the output buffers, which drive the capacitive load
of the column bus.
The devised pixel has a pitch of 150 m and a fill-factor of
3.14% (Fig. 2). For imaging applications, microlenses can get
an expected 10x fill-factor improvement [53], even if this value
greatly depends on the employed optical setup. Conversely,
other applications exploiting each single pixel of the array as an
independent single-photon counter (e. g. FCS) benefit from the
low fill-factor [54].
B. Operating Modalities
The proposed pixel architecture has been devised to fulfil electronics requirements for high-frame-rate imaging, TGSPC and
iTOF. In high-frame rate imaging only one counter is required

BRONZI et al.: 100 000 FRAMES/S 64 32 SINGLE-PHOTON DETECTOR ARRAY FOR 2-D IMAGING AND 3-D RANGING

Fig. 2.

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Layout and main building blocks (left) and micrograph (right) of the pixel. The pitch (side) is 150 m and the SPAD active area diameter is 30 m.

Fig. 3. Generalized 2-gate RLD timing diagram. En1 and En2 enable the two
U/D counters (see Fig. 1). Counting direction is up when Direction is high, and
viceversa. C B 1 and C B 2 are the background counts subtracted from C 1 and
C 2 , respectively.

and the array can be employed in FCS [20], [21] or gun muzzle
flash detection [55]. In time-gated FLIM, a widely used technique is rapid lifetime determination (RLD), where two or four
time windows are used to evaluate respectively single or double exponential decays [56]. Better performance are achieved
through generalized 2-gate RLD [57], easily implementable in
the conceived pixel with the two up-down counters: if C1 and
C2 are the counts accumulated in two windows with respective
widths W1 and W2 and delayed from each other by a time D,
the lifetime can be computed as [57]:
C2
exp[(W2 + D)/ ] exp(D / )
=
C1
exp(W1 / ) 1

(1)

When the fluorescence decay is not triggered, background

counts (CB ) can be subtracted directly in-pixel using the updown counting scheme shown in Fig. 3. 4-, 8- or multi-gate RLD
can also be performed, but with a lower collection efficiency
and slower frame rate. Moreover, the third counter allows the

Fig. 4. Timing of the control signals (bottom) for implementing CW-iTOF 3D

ranging. The dotted line represents the input light source, the received signal is
depicted by a solid line. En0 (not shown) is always high.

co-registration of FCS-scale data (with microsecond resolution)

and lifetime measurements (with nanosecond resolution). The
different time scale information can be integrated to enhance the
quality of FCS data by removing noise and distortion caused by
scattered excitation light, detector noise, and afterpulsing [58].
Concerning iTOF measurements, two techniques are usually
employed: pulsed light [45] and CW iTOF [40]. Although both
methods can be implemented in the proposed architecture, we
focus on CW-iTOF, being a more robust technique. Here, a
sinusoidal-modulated light shines the scene; the received reflected signal is phase-shifted by an amount proportional to
the objects distance d:

cTP
= dM AX
(2)
2 2
2
To retrieve phase-shift information, the reflected wave is sampled by four integration windows of same duration (TTAP ), providing the counts C0 , C1 , C2 and C3 (Fig. 4). Then, through Discrete Fourier Transform, phase delay , reflected active-light
d=

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IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 20, NO. 6, NOVEMBER/DECEMBER 2014

Fig. 5. Block diagram of the 64 32 SPAD imager with peripheral electronics (left) and micrograph (right) with relative dimensions. Global and Readout
electronics are placed between the capacitors and the SPAD array.

Fig. 6. Operations performed during the readout: row selectors are initialized to enable the first rows of both sub-arrays (left); after half of the pixels in the rows
is scanned, the following left rows are connected to the data bus (center); when the first rows readout is completed, the half rows on the right are selected (right).

intensity AR and background B can be computed as [40]:

C3 C1
= arctan
C0 C2

(C3 C1 )2 + (C0 C2 )2
AR =
2TTAP sinc(TTAP /TP )
B =

C0 + C1 + C2 + C3
4TTAP

C. Imager Architecture

(3)
(4)
(5)

As reported in Eqs. (3)(5), to compute the phase shift

and the received signal AR , it is not required to know the exact
value of the four samples (C0 , C1 , C2 and C3 ), but only their
differences (C3 C1 and C0 C2 ). Furthermore, the computation of the background intensity requires only the sum of
the four different samples (C0 + C1 + C2 + C3 ). Hence, the
two 9-bit bidirectional counters can be selected in turn by the
enable signals (En1, En2) at twice the modulation frequency,
thus acquiring respectively C0 C2 and C3 C1 , while the
counting Direction signal is switched synchronously with the
modulation source, in order to perform homodyne (lock-in) demodulation. The remaining counter integrates light over the
whole period, hence storing background intensity information.
Incidentally, in frequency-domain FLIM, fluorescent samples
are stimulated using a modulated light; in such conditions, the
emitted fluorescence signal is a delayed and attenuated replica
of the input waveform, whose phase-shift and amplitude attenuation strictly depend on the fluorescence lifetimes [59]. Consequently, with no changes, the homodyne detection scheme provided by the pixel can be employed also for frequency-domain
FLIM.

The imager contains 2048 pixels, organized as an array of

64 columns by 32 rows, the row access circuitry, pipelined
multiplexers, and global electronics (see Fig. 5). Row access
circuitry consists of shift registers, for sequentially addressing
data. The multiplexer scans the column bit-lines and the global
electronics handles balanced clock distribution, read-out operations, and array initialization. The SPAD array is arranged in
a split-frame architecture, so that the readout is performed in
parallel on two 32 32 sub-arrays, halving both the minimum
integration frame time (i.e. doubling the maximum frame-rate)
and the column bus loading capacitance. Furthermore, in order
to operate at higher clock rates, the row selection line is split
and two row selectors drive only half of the line in an interlaced pattern. Fig. 5 shows the micrograph of the imager, whose
dimensions are 9.6 mm 4.8 mm. Integrated bypass capacitors and dedicated power-grids have been laid out for reducing
ground bounce and voltage drop effects across the whole array.
Fig. 6 shows operations performed during the readout:
1) at the end of the integration time, the external electronics
sets the Frame signal to trigger the global electronics;
2) global electronics generates a Store strobe, which accomplishes data transfer from counters to internal buffer memories, and a Reset strobe to initialize counters for the new
integration frame (Fig. 1);
3) concurrently, the row access circuitry is initialized to select the first rows of both sub-arrays (Fig. 6, left);
4) when the memories of the first 16 pixels have been read
out, the selectors are addressed to connect the following
left rows to the data bus (Fig. 6, center);
5) when the first row readout is completed, also the right
halves of the following rows are selected (Fig. 6, right).

BRONZI et al.: 100 000 FRAMES/S 64 32 SINGLE-PHOTON DETECTOR ARRAY FOR 2-D IMAGING AND 3-D RANGING

3804310

Fig. 8. DCR Inverse cumulative distribution function of the of a sample 64

32 SPAD array, measured at 5 V excess bias.
Fig. 7.

Assembled system with actual dimensions (right).

Consequently, if TC K is the readout clock period, the output

buffers of the first column pixels, which otherwise would have
one clock period to let data settle on the column bit-lines, have
more time (namely 16TC K ) to write the data on the column
bus, thus avoiding erroneous data readout. This allows also relaxing requirements on in-pixel output buffers, hence reducing
area occupation. Such an approach, combined with pipelined
multiplexers, enables readout speed faster than 100 MHz, since
the minimum clock period depends only on the hold and setup
time of the multiplexer FFs (<1 ns), and on the time employed
by the output drivers to charge pads and off-chip traces (some
ns), which represents the bottleneck.
Currently, the readout circuit runs at 100 MHz, limited by
the external FPGA that controls the array chip. Accordingly, a
full readout of the whole imager requires 10.24 s to access
one counter in each pixel (thanks to the double output bus, as
shown in Fig. 5). Therefore, 2D acquisitions, requiring only the
first counter to be readout, can be acquired up to 100,000 fps.
Instead, for time-gated FLIM, such value reduces to 50,000 fps
and for 3D ranging frame-rate is limited to 33,000 fps (since
three counters must be readout per pixel).
D. SPAD Camera
In order to operate the 64 32 SPAD imager, we developed a compact camera (Fig. 7), which includes a first board
with the imager (bonded onto a 72-pin custom-made Pin Grid
Array), I/O signal conditioning electronics, and power supply. A second board contains the FPGA (Xilinx Spartan-3)
that manages timings of I/O signals, processes data read out
from the chip and uploads processed data to a remote PC
through a USB 2.0 link, which also provides +5 V bias (USBpowered system). The camera is housed in a case supporting a
12 mm F/1.4 C-mount imaging lens, with a 40 20 (H V )
field-of-view. The whole system is very rugged and compact
(80 mm 45 mm 70 mm). A MATLAB interface is used for
setting the measurement parameters (frame duration, integration
time, etc . . . ), the system clock frequency, and for data acquisition and post-processing. The power consumption is about 1 W,
mostly dissipated by the FPGA board (240 mA), with negligible
contribution from the SPAD imager (10 mA).

Fig. 9. PDE of all 2048 pixels measured at 5 V excess bias. Note the high
PDE uniformity among pixels.

III. EXPERIMENTAL RESULTS

A. Chip Characterization
We performed an in-depth characterization of the CMOS
SPAD imager. The characterization of the SPAD performance
is exhaustively reported in [46][49]. The breakdown voltage
(VBD ) at room temperature is 26.1 V, with a temperature
coefficient of 38 mV/K [46]. The Dark Count Rate (DCR) was
measured at room temperature with an excess bias voltage (VEX )
of 5 V. In full working condition, the DCR distribution has a median value of about 100 cps and a mean value of about 425 cps,
with 97% of pixels with less than 1 kcps (Fig. 8). The noisiest
pixel shows a DCR still lower than 60 kcps. The DCR distribution is uniform across the whole array and the achieved yield
of 97%, is the highest value reported in SPAD literature so far.
At 5 V excess bias, Photon Detection Efficiency (PDE)
(Fig. 9) tops 45% at 410 nm, with an afterpulsing probability
(PAP ) of about 2.6% [48] at a very short hold-off time of just
20 ns (i.e. a maximum counting rate of about 50 Mcps), a timing
resolution of 120 ps [46] at 520 nm wavelength, and negligible
crosstalk [49].
Besides these figures of merit, another important one, usually
not reported, is the Dynamic Range (DR) defined as the ratio
between the maximum achievable count (CM AX ) and the minimum detectable signal (CM IN ), i.e. the photon count needed to
reach a unitary Signal-to-Noise Ratio (SNR) as a function of the
integration time [1].

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IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 20, NO. 6, NOVEMBER/DECEMBER 2014

For security issues, instead of employing a gun and studying

its muzzle flame, we acquired the flash from a commercial camera strobe light. Fig. 11 shows the light waveform acquired at
100 kfps: just before exposure begins, the lighting unit emits a
pre-flash pulse, lasting 70 s, which is used by the through-thelens metering system to adjust the flash exposure. After 31 ms,
during which the shutter is opened (first curtain sync), the flash
tube is fully triggered. As the flashs capacitor discharges, the
light intensity exponentially dims and fades out in about 2 ms.
The acquired signal has a very similar shape (and bandwidth)
compared to the muzzle response measured in [54], which exhibits a short 500 s pulse followed by a longer 4 ms response.
Fig. 10. Dynamic Range (solid line), minimum detectable signal (C M IN ,
dashed line) and maximum achievable count (C M A X , dotted line) as a function
of the integration time. Thanks to the very low noise SPADs, DCR enters into
play only at frame rate slower than 100 fps.

Thanks to the very low DCR, the array provides not only
single-photon sensitivity (with high PDE) but also ideal shotnoise limited detection almost up to 10 ms integration time
(roughly the inverse of the DCR). Therefore, a single signal
photon can be discriminated even at 100 fps (Fig. 10). Such
a performance is often underestimated in many other similar
imagers. For our imager, the DR at 100,000 fps is:
DRIM AGER = 20 log10

CM AX
512
= 54 dB (6)
= 20 log10
CM IN
1

At longer integration times (TINT ), it is possible to achieve

higher DRat system levelby summing N shorter frames,
each lasting 10 s (TFRAM E ), inside the FPGA. Therefore, the
maximum counts is not limited by the counter 9-bit depth, but
it will be extend up to CM AX = N 512.
With this solution, the system-level dynamic rang at can be
expressed as:
DRSYS = 20 log10

N 512
N
= 54 dB + 20 log10
CM IN
CM IN

(7)

This enhances DR to 94 dB at 1,000 fps (N = 100, CM IN =

1) and to 110 dB at 100 fps (N = 1000, CM IN < 2), as shown
in Fig. 10. This is the highest value achieved among different
SPAD sensors reported in literature (Table I) and ensure a singlephoton sensitivity almost over the whole frame rate range typical
for SPAD cameras (>100 fps).
B. High Frame-Rate Imaging
An advantage of the SPAD imagers is their ability to act as
optical analog-to-digital converters, thus removing readout
noise, since each photon is converted in a 1-bit count. Correspondingly, no limitation on minimum integration time, due to
SNR degradation, is set (contrary to CCD and CMOS imagers)
and sampling broadband signals becomes feasible. An example of high-speed imaging application is optical muzzle flash
detection [59], which requires fast sensing of transient events
with characteristic times between few microseconds up to some
milliseconds, and where only recently, single-pixel SPADs have
been tested [54].

C. Time-Gated Single-Photon Counting

In time-gated detection-based methods, the optical signal is
detected sequentially in several gates, each shifted by a different
delay time relative to the trigger pulse [42]. Given a certain
trigger frequency, our system is able to generate up to 256
delays (each equal to 1/256 th of the trigger period) thanks to
FPGA digital clock managers [61].
Here, we show how TGSPC can be used to implement an
ultra-high speed system capable of capturing the motion of light.
To this purpose, we used 1.75 ns gate windows and a 50 MHz
trigger frequency, so each delay was equal to 80 ps. The trigger
signal was sent to a 450 nm pulsed laser, which shone the scene
depicted in Fig. 12. Sample frames (Fig. 13) from the acquired
movie [60] show the light hitting different objects during its
propagation. From the acquired waveforms it is also possible to
compute the distance between the first and the second objects
(2.6 ns = 34 cm) and between the second objects and the white
panel (3.4 ns = 51 cm ). Since each sequential interframe time
is 80 ps, similarly to sequential equivalent-time sampling for
oscilloscopes [62], we can define a sequential equivalent-frame
rate, which is equal to 12.5 Gfps for the presented camera.
Therefore, the imager can be used as a bidimensional streak camera or to perform nanosecond and picosecond transient absorption spectroscopy (e.g. pump-probe spectroscopy) [63]. With
respect to the equivalent 100 Gfps imaging system described in
[64], the current system is four time slower, but with respect to
the effective acquisition time it is much more faster as the whole
movie has been acquired in only 2.56 s, to be compared to 1 h
acquisition in [64]. Moreover, the current system is very compact, not power-hungry, and cost-effective with the advantage
of employing a bidimensional sensor and therefore the same
pixel resolutionif more than 2048 pixels are neededmay be
achieved faster.
D. 3D Ranging
In order to assess the 3D performance, the camera was
equipped with a compact illuminator consisting of 36 LEDs,
with emission peaks at 850 nm wavelength and a 40 nm
wavelength variation measured as full-width at half maximum
(FWHM), arranged in a daisy chain as shown in Fig. 14. The
maximum optical power is about 800 mW.
We acquired 3D pictures of a reference scene (Fig. 15), at
100 fps, with a 20 MHz modulation frequency (dM AX = 7.5 m)

BRONZI et al.: 100 000 FRAMES/S 64 32 SINGLE-PHOTON DETECTOR ARRAY FOR 2-D IMAGING AND 3-D RANGING

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TABLE I
SUMMARY OF SYSTEM PERFORMANCES FOR VARIOUS SPADS ARRAYS AVAILABLE IN LITERATURE
Work
Tech. Node
Pixel Resolution
SPAD Diameter
SPAD T HO
Median DCR
Pixel Fill Factor
Imaging Lens
Illumination Wavelength
Narrowband Filter Width
Illumination Frequency
Illumination Field-of-View
Illumination Average Power
PDE at Illum. Wavelength
Unambiguous Range
Integration Time
Target Refelectivity
Worst Accuracy
Worst Precision @ D M EAS
D M EAS
Background Light Condition
Chip Power Dissipation
Max Readout Bandwidth
Max Frame Rate
Dynamic Range (T I N T = 10 ms)
TOF Technique

[29]

[32]

[35]

[36]

[37]

[41]

[45]

this work

Unit

350
128 128
7
100
694
6
1.4
635
11
40
5
1
10
3.75
50
n.a.
0.9
0.5
3.6
0.15
150
7.68
39
90
Direct

180
340 96
25
40
2650
70
n.a.
870
n.a.
0.2
170 4.5
40
n.a.
128
100
100
36.6
10
100
80
n.a.
6.8
n.a.
93
Direct

800
64 1
100
n.a.
< 1000
n.a.
n.a.
905
n.a.
n.a.
n.a.
250
0.62
5
n.a.
n.a.
n.a.
5
2
n.a.
1
n.a.
1
n.a.
PL

350
60 48
7
40
245
0.5
1.4
850
40
30
50 40
800
3
5
45
n.a.
11
3.8
2.4
0.15
35
2.13
46.3
101
CW

130
128 96
9
50
100
3.17
1.4
850
40
3.33
40
50
5
45
50
100
0.5
16
2.4
0.11
40
10.24
70
102
CW

180
80 60
24
1.4
850
n.a.
20
n.a.
80
n.a.
7.5
50
100
4
14
2.4
n.a.
18
2
n.a.
51
CW

350
32 32
20
100
4000
3.14
1.4
808
40
6.67
40
750
7
22.5
100
70
n.a.
27
14
0.45
20
0.8
100
83
PL

350
64 32
30
20
100
3.14
1.4
850
40
7.5
40 20
800
5
20
10
70
80
85
20
0.45
50
1.8
100
110
CW

nm
Pixels
m
ns
cps
%
nm
nm
MHz

mW
%
m
ms
%
cm
cm
m
klux
mW
Gbps
kfps
dB
-

Mean Value

Fig. 12.

Reference scene and 2D image acquired with the SPAD imager.

Fig. 11. Fast 2D movie [60] acquired at 100 kfps, of a reference scene (top)
illuminated by a flash lamp. Two frames (center) and discharge waveform intensity (bottom) recorded by one pixel (position 17,32). The dashed lines indicates
the time instants when the two frames were acquired.

Fig. 13. Light propagation acquired at sequential equivalent-frame rate of

12.5 Gfps. Pictures show three different objects shined by light while propagating along its path.

and capturing 200 frames per acquisition. To decrease the

background level and improve precision [36], a narrow bandpass (40 nm FWHM) filter was mounted on the camera lens.
The integration windows width TTAP (Fig. 4) was set equal
to 1/4th of the modulation period TP . This value represents
a tradeoff between photon collection efficiency and distance

precision: at longer integration times, more photons are collected and SNR increases, but concurrently the four samples are
averaged and eventually overlap, so that phase information is
gradually lost and the overall measurement precision reduces.
With the chosen value, we are able to open four integration
windows, within the same period, and to accumulate the four

3804310

Fig. 14.

IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 20, NO. 6, NOVEMBER/DECEMBER 2014

Camera with optics and the illumination system.

Fig. 16. Distance and accuracy (top) measured over a 20 m distance range.
Accuracy shows typical oscillation caused by the third order harmonic in the
modulated light source. Precision (bottom) is 90 cm at farthest distances and less
than 10 cm at short distances with just 10 ms integration. At longer integration
times (25 fps) the precision is almost halved.
Fig. 15. Reference scene and combined 3D/2D image (top). 3D image acquired at 100 fps with corresponding precision computed over 200 frames.

samples in a single frame, without missing any photon and with

no overlapping.
3D measurement of the reference scene and corresponding
precision are shown in Fig. 15: a non-uniform illumination pattern causes a degradation of distance precision moving from the
brighter center to the darker edges of the FOV.
The camera was also characterized using a non-cooperative
target in a real scenario: an underground parking lot. The modulation frequency was set to reach a non-ambiguous range of 20 m
(fM OD = 7.5 MHz). For each measured distance, we acquired
1000 frames at 100 fps and 25 fps. Accuracy and precision are
shown in Fig. 16. Conceived as a sort of benchmark, Table I
summarizes the performance of the camera and illuminator ensemble compared to other SPAD-based rangefinders reported in
literature: dTOF sensors achieve better precision and accuracy
with respect to iTOF arrays, at the expenses of higher dissipation
and higher bandwidth, but with less illumination power. Compared to other iTOF systems, the reported structure presents
some advantages: if compared to the results reported in [39],
where four different frames were required (one for each tap),
we achieve unitary photon collection per frame with a 4-fold
higher acquisition speed. There are, also, some advantages in
terms of speed and precision, if compared with the one reported
in [36], whose in-pixel digital circuitry consists of a 2-to-1 multiplexer and two 8-bit counters operating in an interlaced counting scheme. That approach requires two readout frames and an
integration window equal to 50% of TP to collect all signal
photon and rolling shutter readout. Moreover, thanks to the updown counters, we attain in-pixel background suppression thus

extending the intrinsic counting range. Finally, knowledge on

background counts can be used to check saturationi.e. if the
SPAD is saturated distance information is no more correct, so the
maximum tolerable background light is roughly 1/THO and
to correct pile-up distortion (which reduces distance precision,
as well [36]). Concerning 3D ranging performance, the accuracy of the system is lower compared to other approach, due
to a strong third order harmonic component (f3d = 22.5 MHz,
d3d = 6.7 m), which impairs the overall linearity [40]. Concerning the distance precision, Fig. 16 shows that the camera
provides a precision of 3.1 cm at 2.5 m, 7.5 MHz modulation
and 25 fps, while a precision of 2.8 cm, at the same distance but
at 30 MHz modulation and 45 ms integration time, was reported
in [36]. The present sensor also shows a precision of 18 cm at
14 m thus improving the performance of our previous system
[45], where a precision of 27 cm is reported. Even at higher
frame rate (100 fps), distance precision is still less than 10 cm
at 2 m and below 85 cm at 20 m.
IV. CONCLUSION
We presented the design and the characterization of a multipurpose 64 32 CMOS SPAD array, fabricated in a highvoltage 0.35 m CMOS technology. The building block of the
system is a pixel consisting of a SPAD detector and three individually selectable and fully independent counters able not
only to measure light through photon-counting in either freerunning or time-gated mode, and store 2D intensity map, but
also to perform smart light demodulation with in-pixel background suppression. Pixel-level memories allow fully parallel
imaging, thus preventing typical motion artefacts (skew, wobble, motion blur) and partial exposure effects, which otherwise

BRONZI et al.: 100 000 FRAMES/S 64 32 SINGLE-PHOTON DETECTOR ARRAY FOR 2-D IMAGING AND 3-D RANGING

would hinder the use of the imager in those applications acquiring fast moving objects (e.g. automotive). The image sensor
exhibits the best-in-class noise performance (100 cps at 5 V excess bias, for a 30 m SPAD) and low afterpulsing probability
(2.6% at 20 ns hold-off time and at room temperature), which
results in fast (100 fps) depth measurement with a precision
better than 90 cm over 20 m. Moreover high dynamic range (up
to 110 dB at 100 fps) with peak PDE above 45% at 410 nm
ensure true single-photon sensitivity jointly to high-frame rate
acquisition (up to 100 kfps).
The amount of integrated electronics limits the pixel dimension and the resolution, but it provides flexibility to the overall imaging chip, which can be suited for molecular imaging
applications in both time-domain, like FLIM and FCS, and
frequency-domain FLIM as well as 3D ranging while maintaining good fill-factor, power consumption and photon detection
efficiency.
REFERENCES
[1] F. Zappa et al., Principles and features of single-photon avalanche
diode arrays, Sensors Actuators A Phys., vol. 140, no. 1, pp. 103112,
Oct. 2007.
[2] F. Zappa et al., High-sensitivity photodetectors with on-chip pinhole for
laser scanning microscopy, IEEE Trans. Electron Devices, vol. 47, no. 7,
pp. 14721476, Jul. 2000.
[3] S. Marangoni et al., A 6 8 photon-counting array detector system for
fast and sensitive analysis of protein microarrays, Sensors Actuators B
Chemical, vol. 149, no. 2, pp. 420426, Aug. 2010.
[4] X. Michalet et al., Development of new photon-counting detectors for
single-molecule fluorescence microscopy, Philosoph. Trans. Roy. Soc. B,
vol. 368, no. 1611, p. 20120035, Feb. 2013.
[5] P. D. Townsend, Experimental investigation of the performance limits for
first telecommunications-window quantum cryptography systems, IEEE
Photon. Technol. Lett., vol. 10, no. 7, pp. 10481050, Jul. 1998.
[6] R. T. Thew et al., Low jitter up-conversion detectors for telecom wavelength GHz QKD, New J. Phys., vol. 8, pp. 3244, Mar. 2006.
[7] W. Becker et al., Multi-dimensional time-correlated single photon counting applied to diffuse optical tomography, in Proc. SPIE 5693, pp. 3442,
May 2005.
[8] M. A. Albota et al., Three-dimensional imaging laser radar with a photoncounting avalanche photodiode array and microchip laser, Appl. Opt.,
vol. 41, no. 36, pp. 76717678, Dec. 2002.
[9] F. Zappa et al., SPADA: Single-photon avalanche diode arrays, IEEE
Photon. Technol. Lett., vol. 17, no. 3, pp. 657659, Mar. 2005.
[10] A. Rochas et al., Single photon detector fabricated in a complementary
metal-oxide-semiconductor high-voltage technology, Rev. Sci. Instrum.,
vol. 74, no. 7, pp. 32633270, Jul. 2003.
[11] A. Rochas et al., First fully integrated 2-D array of single-photon detectors in standard CMOS technology, IEEE Photon. Technol. Lett., vol. 15,
no. 7, pp. 963965, Jul. 2003.
[12] F. Zappa et al., Monolithic CMOS detector module for photon counting
and picosecond timing, in Proc. 34th Eur. Solid-State Device Res. Conf.,
Sep. 2004, pp. 341344.
[13] S. Cova and M. Ghioni, Single-photon counting detectors, IEEE Photon.
J., vol. 3, no. 2, pp. 274277, Apr. 2011.
[14] S. P. Poland et al., Development of a fast TCSPC FLIM-FRET imaging
system, in Proc. SPIE 8588, pp. 85880X-185880X-8, Feb. 2013.
[15] Y. Maruyama and E. Charbon, A time-gated 128 128 CMOS SPAD
array for on-chip fluorescence detection, in Proc. Int. Image Sens. Workshop, Jun. 2011, pp. 270273.
[16] L. Pancheri and D. Stoppa, A SPAD-based pixel linear array for highspeed time-gated fluorescence lifetime imaging, in Proc. IEEE ESSCIRC,
Sep. 2009, pp. 428431.
[17] S. Burri et al., A 65 k pixel, 150 k frames-per-second camera with global
gating and micro-lenses suitable for fluorescence lifetime imaging, in
Proc. SPIE 5693, pp. 914109-1914109-7, Apr. 2014.
[18] R. M. Field, S. Realov, and K. L. Shepard, A 100 fps, time-correlated
single-photon-counting-based fluorescence-lifetime imager in 130 nm
CMOS, IEEE J. Solid-State Circuits, vol. 49, no. 4, pp.867880,
Apr. 2014.

3804310

[19] D. D. U. Li et al., Video-rate fluorescence lifetime imaging camera with

CMOS single-photon avalanche diode arrays and high-speed imaging
algorithm, J. Biomed. Opt., vol. 16, no. 9, pp. 096012-1096012-12,
Sep. 2011.
[20] R. A. Colyer et al., High-throughput FCS using an LCOS spatial light
modulator and an 8 1 SPAD array, Biomed. Opt. Exp., vol. 1, no. 5,
pp. 14081431, Dec. 2010.
[21] A. P. Singh et al., The performance of 2D array detectors for light sheet
based fluorescence correlation spectroscopy, Opt. Exp., vol. 21, no. 7,
pp. 86528668, Apr. 2013.
[22] Y. Maruyama, J. Blacksberg, and E. Charbon, A 1024 8, 700-ps Timegated SPAD line sensor for planetary surface exploration with laser raman
spectroscopy and LIBS, IEEE J. Solid-State Circuits, vol. 49, no. 1,
pp. 179189, Jan. 2014.
[23] J. Kostamovaara et al., Fluorescence suppression in Raman spectroscopy
using a time-gated CMOS SPAD, Opt. Exp., vol. 21, no. 5, pp. 31632
31645, Dec. 2013.
[24] T. Frach et al., The digital silicon photomultiplierPrinciple of operation
and intrinsic detector performance, in Proc. IEEE Nuclear Sci. Symp.,
Nov. 2009, pp. 19591965.
[25] D. Chitnis and S. Collins, A SPAD-based photon detecting system for
optical communications, J. Lightw. Technol., vol. 32, no. 10, pp. 2028
2034, May 2014.
[26] C. Favi, Single-photon techniques for standard CMOS digital ICs, Ph.D.

dissertation, Faculte Informatique Et Communications, Ecole

Polytechnique Federale De Lausanne, Lausanne, Switzerland, 2011.
[27] E. Fisher, I. Underwood, and R. Henderson, A reconfigurable singlephoton-counting integrating receiver for optical communications, IEEE
J. Solid-State Circuits, vol. 48, no. 7, pp. 16381650, Jul. 2013.
[28] B. F. Aull et al., Geiger-mode avalanche photodiodes for threedimensional imaging, Lincoln Lab. J., vol. 13, no. 2, pp. 335350,
2002.
[29] C. Niclass et al., A 128 128 single-photon image sensor with columnlevel 10-bit time-to-digital converter array, IEEE J. Solid-State Circuits,
vol. 43, no. 12, pp. 29772989, Dec. 2008.
[30] C. Veerappan et al., A 160 128 single-photon image sensor with onpixel 55 ps 10 b time-to-digital converter, in Proc. IEEE ISSCC Dig.
Tech. Papers, Feb. 2011, pp. 312314.
[31] M. Gersbach et al., A time-resolved, low-noise single-photon image
sensor fabricated in deep-submicron CMOS technology, IEEE J. SolidState Circuits, vol. 47, no. 6, pp. 13941407, Jun. 2012.
[32] C. Niclass et al., A 100-m range 10-frame/s 340 96-pixel time-of-flight
depth sensor in 0.18-m CMOS, IEEE J. Solid-State Circuits, vol. 48,
no. 2, pp. 559572, Feb. 2013.
[33] F. Villa et al., SPAD smart pixel for time-of-flight and time-correlated
single-photon counting measurements, IEEE Photon. J., vol. 4, no. 3,
pp. 795804, Jun. 2012.
[34] D. Stoppa et al., A 32 32-pixel array with in-pixel photon counting and
arrival time measurement in the analog domain, in Proc. IEEE ESSCIRC,
Sep. 2009, pp. 204207.
[35] D. Stoppa et al., A CMOS 3-D imager based on single photon avalanche
diode, IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 1, pp. 412,
Jan. 2007.
[36] C. Niclass et al., Single-photon synchronous detection, IEEE J. SolidState Circuits, vol. 44, no. 7, pp. 19771989, Jul. 2009.
[37] R. J. Walker, J. A. Richardson, and R. K. Henderson, A 128 96 pixel
event-driven phase-domain -based fully digital 3D camera in 0.13 m
CMOS imaging technology, in Proc. IEEE ISSCC Dig. Tech. Papers,
Feb. 2011, pp. 410412.
[38] F. Guerrieri et al., Two-dimensional SPAD imaging camera for photon
counting, IEEE Photon. J., vol. 2, no. 5, pp. 759774, Oct. 2010.
[39] S. Bellisai, F. Guerrieri, and S. Tisa, 3D ranging with a high speed
imaging array, in Proc. Conf. Ph.D. Res. Microelectron. Electron., Jul.
2010, pp. 14.
[40] R. Lange, 3D time-of-flight distance measurement with custom solidstate image sensors in CMOS/CCD-technology, Ph.D. dissertation , Dept.
Elect. Eng. Comput. Sci. Univ. Siegen, Siegen, Germany, 2000.
[41] D. Stoppa et al., A range image sensor based on 10-m lock-in pixels
in 0.18 m CMOS imaging technology, IEEE J. Solid-State Circuits,
vol. 46, no. 2, pp. 248258, Feb. 2011.
[42] W. Becker, Advanced Time-Correlated Single Photon Counting Techniques. New York, NY, USA: Springer-Verlag, 2005.
[43] A. Esposito, H. C. Gerritsen, and F. S. Wouters, Optimizing frequencydomain fluorescence lifetime sensing for high-throughput applications:
Photon economy and acquisition speed, Opt. Exp., vol. 24, no. 10,
pp. 32613273, Oct. 2007.

3804310

IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 20, NO. 6, NOVEMBER/DECEMBER 2014

[44] M. Amann et al., Laser ranging: A critical review of usual techniques for
distance measurement, Opt. Eng., vol. 40, no. 1, pp. 1019, Jan. 2001.
[45] S. Bellisai et al., Single-photon pulsed-light indirect time-of-flight 3D
ranging, Opt. Exp., vol. 21, no. 4, pp. 50865098, Feb. 2013.
[46] D. Bronzi et al., Low-noise and large-area CMOS SPADs with timing
response free from slow tails, in Proc. Eur. Solid-State Device Res. Conf.,
Sep. 2012, pp. 230233.
[47] D. Bronzi et al., Large-area CMOS SPADs with very low dark counting
rate, in Proc. SPIE 8631, Feb. 2013, pp. 86311B-186311B-8.
[48] F. Villa et al., CMOS SPADs with up to 500 m diameter and 55%
detection efficiency at 420 nm, J. Mod. Opt., vol. 61, no. 2, pp. 102115,
Jan. 2014.
[49] D. Bronzi et al., Fast sensing and quenching of CMOS SPADs for minimal afterpulsing effects, IEEE Photon. Technol. Lett., vol. 25, no. 8,
pp. 776779, Apr. 2013.
[50] S. Tisa et al., Electronics for single photon avalanche diode arrays,
Sensors Actuators A Phys., vol. 140, no. 1, pp. 113122, Oct. 2007.
[51] F. Zappa et al., SPICE modeling of single photon avalanche diodes,
Sensors Actuators A Phys., vol. 153, no. 2, pp. 197204, Aug. 2009.
[52] J. M. Pavia, M. Wolf, and E. Charbon, Measurement and modeling of
microlenses fabricated on single-photon avalanche diode arrays for fill
factor recovery, Opt. Exp., vol. 22, no. 4, pp. 42024213, Feb. 2014.
[53] A. Migdall et al., Single-photon generation and detection, in Experimental Methods in the Physical Sciences. New York, NY, USA: Academic,
2013.
[54] T. Merhav, V. Savuskan, and Y. Nemirovsky, Gun muzzle flash detection using CMOS sensors, in Proc. IEEE Int. Conf. Microw., Commun.,
Antennas Electron. Syst., Oct. 2013, pp. 14.
[55] K. K. Sharman et al., Error analysis of the rapid lifetime determination
method for double-exponential decays and new windowing schemes,
Anal. Chem., vol. 71, no. 5, pp. 947952, Jan. 1999.
[56] S. P. Chan et al., Optimized gating scheme for rapid lifetime determinations of single-exponential luminescence lifetimes, Anal. Chem., vol. 73,
no. 18, pp. 44864490, Aug. 2001.
[57] P. Kapusta et al., Fluorescence lifetime correlation spectroscopy (FLCS):
Concepts, applications and outlook, Int. J. Mol. Sci., vol. 13, no. 10,
pp. 1289012910, Oct. 2012.
[58] C. W. Chang, D. Sud, and M. A. Mycek, Fluorescence lifetime imaging
microscopy, Methods Cell. Biol., vol. 81, pp. 495524, 2007.
[59] A. Voskoboinik, Novel approach for low-cost muzzle flash detection
system, in Proc. SPIE 6940, Apr. 2008, pp. 69401N-169401N-10.
[60] D. Bronzi. (2014). High-speed and billion fps imaging [Online]. Available:
http://youtu.be/nY4TQfh6PJA
[61] Xilinx. (2014). Spartan-3 FPGA Family Datasheet [Online]. Available:
http://www.xilinx.com/support/documentation/data_sheets/ds099.pdf
[62] Tektronix.(2014). XYZ Oscilloscopes [Online]. Available: http://info.
tek.com/XYZs-of-Oscilloscopes-LP.html
[63] M. Wojdyla et al., Picosecond to millisecond transient absorption spectroscopy of broad-band emitting chiral CdSe quantum dots, J. Phys.
Chem. C, vol. 116, no. 30, pp. 1622616232, Jul. 2012.
[64] Massachusetts Institute of Technology. (2014). Trillion-frame-per-second
video [Online]. Available: http://newsoffice.mit.edu/2011/trillion-fpscamera-1213

Danilo Bronzi (S13) received the B.Sc. degree cum laude in biomedical engineering in 2008, and the M.Sc. degree cum laude in electronic engineering,
in 2011, both from Politecnico di Milano, Milan, Italy. He is currently working
toward the Ph.D. degree at the Department of Electronics, Information, and
Bioengineering, Politecnico di Milano. His research interests include the design
and development of novel CMOS single-photon sensors for 2-D imaging and
3-D ranging applications.

Federica Villa received the B.Sc. degree in biomedical engineering from Politecnico di Milano, Milan, Italy, in 2008. In 2010, she received the M.Sc. degree
in electronic engineering from Politecnico di Milano, with the thesis Design of
an Integrated Circuit for Fast-Gating and Active Quenching of a Single Photon
Avalanche Diode (SPAD). She started working toward the Ph.D. degree in
electronic engineering at Politecnico di Milano in 2011. Her current research
interests include designing SPAD arrays for direct time-of-flight 3-D imaging.

Simone Tisa was born in Milan, Italy, in 1977. He received the M.Sc. degree in
electronic engineering from Politecnico di Milano, Milan, in 2001, and the Ph.D.
degree from the same university in 2006. He is currently the Product Research
and Development Manager for electronics design and system integration at
Micro Photon Devices. In 2008, he pioneered the first monolithic 2-D SPAD
imager of 32 32 pixels. His research interests include the field of singlephoton imaging and single-photon timing of fast phenomena, by means of fully
integrated arrays of SPADs and associated microelectronics.

Alberto Tosi (M07) was born in Borgomanero, Italy, in 1975. He received

the Masters degree in electronics engineering in 2001 and the Ph.D. degree
in information technology engineering in 2005, both from the Politecnico di
Milano, Milan, Italy. He has been an Assistant Professor of electronics at Politecnico di Milano since 2006. In 2004, he was a Student with the IBM T. J.
Watson Research Center, working on optical testing of CMOS circuits. He
currently works on Silicon and InGaAs/InP single-photon avalanche diodes
(SPADs). He is involved in research on arrays of silicon SPADs for 2-D and
3-D applications and on time-correlated single-photon counting electronics.

Franco Zappa (M00SM07) was born in Milan, Italy, in 1965. Since 2011, he
is a Full Professor of electronics at Politecnico di Milano, Milan. His research
interests include microelectronic circuitry for single-photon detectors (SPAD)
and CMOS SPAD imagers, for high-sensitivity time-resolved measurements,
2-D imaging, and 3-D depth ranging. He is coauthor of about 130 papers,
published in peer-reviewed journals and in conference proceedings, and nine
textbooks on electronic design and electronic systems. He is coauthor of four
international patents. In 2004, he cofounded Micro Photon Devices focused
on the production of SPAD modules for single photon-counting and photontiming.

Daniel Durini received the B.Sc. degree in electrical and electronic engineering
from the National Autonomous University of Mexico, Mexico City, Mexico, in
2002, the M.Sc. degree in microelectronics from the National Institute of Astrophysics, Optics, and Electronics, Puebla, Mexico, in 2003, and the Ph.D. degree
in microelectronics from the University of Duisburg-Essen, Essen, Germany,
in 2009. He is currently the Head of systems engineering of the Central Institute of Engineering, Electronics and Analytics (ZEA-2), Forschungszentrum
Julich, Julich, Germany, involved with radiation detector systems. He was with
the Fraunhofer IMS, Duisburg, Germany, between 2004 and 2013, where he
led during the last four years a group dedicated to developing special CMOS
process modules for high-performance photodetector devices. He received the
Duisburger Sparkasse Award for outstanding Ph.D. thesis in 2009 and two best
paper awards. He has authored and coauthored more than 45 technical papers,
holds two patents, and a third submitted one.

Sascha Weyers is currently a Project Manager at the Fraunhofer Institute of

Microelectronic Circuits and Systems, Duisburg, Germany.

Werner Brockherde was born in Gescher, Germany, on May 10, 1956. He

received the Dipl.-Ing. degree in electrical engineering from the University of
Dortmund, Dortmund, Germany, in 1982. From 1982 to 1984, he was with
the Lehrstuhl Bauelemente der Elektrotechnik, Department of Electrical Engineering, University of Dortmund, working in the field of analog to digital
MOS integrated circuits design. In 1985, he joined the Fraunhofer Institute
of Microelectronic Circuits and Systems, Duisburg, Germany, where he heads
a research group in CMOS image sensor and mixed-signal integrated circuits
design. His research interests include CMOS imager design techniques and lownoise CMOS circuits. He has authored and coauthored more than 100 scientific
papers. Since 1994, he has been a Member of the Technical Program Committee
of the European Solid-State Circuits Conference.