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    Sai Siddhartha

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    Kiran Srinivas
    This document provides a summary of Sai Siddhartha Madugula's contact information, educational background, technical skills, work experience, academic projects, and extracurricular activities. It includes his phone number, email, date of birth, address, languages known, degrees earned from BITS Pilani and other institutions between 2007-2013, programming languages and design tools experience, internship details from Synopsys, CVC, and Global Logic, and academic projects involving Hamming code error detection/correction, a RADIX-4 Booth multiplier on an FPGA, and a MIPS processor with sensor network agent tracking.

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    Sai Siddhartha

    Uploaded by

    Kiran Srinivas
    60 views2 pages
    This document provides a summary of Sai Siddhartha Madugula's contact information, educational background, technical skills, work experience, academic projects, and extracurricular activities. It includes his phone number, email, date of birth, address, languages known, degrees earned from BITS Pilani and other institutions between 2007-2013, programming languages and design tools experience, internship details from Synopsys, CVC, and Global Logic, and academic projects involving Hamming code error detection/correction, a RADIX-4 Booth multiplier on an FPGA, and a MIPS processor with sensor network agent tracking.

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    This document provides a summary of Sai Siddhartha Madugula's contact information, educational background, technical skills, work experience, academic projects, and extracurricular activities. It includes his phone number, email, date of birth, address, languages known, degrees earned from BITS Pilani and other institutions between 2007-2013, programming languages and design tools experience, internship details from Synopsys, CVC, and Global Logic, and academic projects involving Hamming code error detection/correction, a RADIX-4 Booth multiplier on an FPGA, and a MIPS processor with sensor network agent tracking.

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    Download as PDF, TXT or read online from Scribd
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    60 views2 pages

    Sai Siddhartha

    Uploaded by

    Kiran Srinivas
    This document provides a summary of Sai Siddhartha Madugula's contact information, educational background, technical skills, work experience, academic projects, and extracurricular activities. It includes his phone number, email, date of birth, address, languages known, degrees earned from BITS Pilani and other institutions between 2007-2013, programming languages and design tools experience, internship details from Synopsys, CVC, and Global Logic, and academic projects involving Hamming code error detection/correction, a RADIX-4 Booth multiplier on an FPGA, and a MIPS processor with sensor network agent tracking.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    SAI SIDDHARTHA MADUGULA

    Phone: +91 9975145189


    Email: sidhu442@gmail.com
    th
    Date of Birth: 14 May 1990
    Address: Flat No. B-005 Aishwarya opulance, Marathahalli
    Bangalore - 560037
    Languages Known: English, Telugu and Hindi

    Educational Qualifications
    Year
    2013

    Degree/Certificate
    M.E VLSI & Embedded Systems

    Institution
    BITS Pilani Goa

    Marks obtained
    7.01/10

    2011

    B.Tech Electronics and communication


    Engineering

    2007

    Intermediate Exam, Board Of


    Intermediate, AP

    Sri Chaitanya Junior


    College

    92.8%

    2005

    SSC Exam, Board Of Secondary


    Education,AP

    Chinmaya Vidyalaya
    High School

    82%

    Malla Reddy Institute of


    Technology & Science

    72.8%

    Technical Skills

    Programming Languages : C ,TCL(Scripting),EmbeddedC


    Simulation Tools : Modelsim, Xilinx ISE Simulator, Questa Sim.
    Designing tools : Synopsys Synplify Pro, Cadence - Virutuoso, Quartus, Riviera Pro
    Design & Verification Languages : VHDL, VERILOG, System Verilog, UVM(Verification
    Methodology).

    Experience/Internship
    1. Currently working in Synopsys Bangalore as an Intern (May14 PRESENT)

    Understanding the Xilinx FPGA architectures and Testing the User interface of various Synopsys
    FPGA Synthesis core products which includes Synplify and FPGA Prototyping tools like Certify
    and Identify.

    Developing the script files using TCL for automation which ensures the stability of the
    feature in the tool.

    2. Worked as an ASIC Verification Engineer Trainee at CVC Bglr (NOV13 - APR14)

    RTL coding of building blocks of ASICs such as memory controller, FIFO etc. in
    ModelSim/ Questa Sim using Verilog and synthesizing the codes to gate-level netlist using
    Quartus tool used as the DUTs for implementing Verification methodologies and verifying the
    designs in Riviera Pro tool using Layered test benches in System Verilog and Universal
    Verification Methodology(UVM).

    3. Pursued Internship in Global Logic India Pvt. Ltd. from January 7th 2013 to June 14th 2013.

    Developed an Android app using NDK which monitors the network traffic and to optimize the
    data that flows through the network.

    ACADEMIC PROJECTS
    1. Implementation of 8 bit Hamming code error detector and corrector

    Implemented using Xilinx 12.2 EDK and SDK kits.


    The data was generated on the C-side using SDK and passed on to the HDL side where a
    HDL design was imported using EDK.
    The results were seen on the hyperterminal using an UART interface of the Xilinx Virtex5
    FPGA board.

    2. FPGA implementation of 8 bit RADIX-4 Booth Multiplier

    Used ChipScope Pro logic analyzer using ICON (Integrated Controller) and VIO(Virtual
    Input Output) cores to replicate the output on the FPGA in the form of waveform.
    Used Xilinx Virtex5 FPGA board & Xilinx ISE 12.2i for implementation.

    3. MIPS Single cycle, Multi Cycle Processor

    The Instruction memory and data memory of the Processor were created using
    distributed memory core gen ROM by loading a '.coe' file containing 32 bit instructions
    stored in the form of hex.
    Control unit was used to decode the instructions to decide on the kind of operatio
    be performed and generate the required control signals accordingly.
    The control signals generated were used to control the register file, ALU and the data
    memory.
    Used Xilinx 12.2i for implementation.

    4.Tracking a mobile agent by wireless sensor networks

    TelosB motes were used for this application, these were arranged in a hierarchical fashion.
    The position of the mobile agent was tracked by these motes and the information is sent
    to the leaf mote in tree and from that to the server.
    Used TinyOS which is a component based embedded operating system and this
    application is programmed in NesC.

    Extra-Curricular Activities

    Participated and won prizes at various Robotic events which includes Line follower & Robo
    Soccer.

    Representing Synopsys Cricket team for various tournaments held in Bangalore.

    Participated in the Badminton competition for SPREE a national level sports fest organized by
    BITS, Pilani Goa Campus.

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