Fire h8s

FIRE Emulator for H8S and H8/300H
TRACE32 Online Help

TRACE32 Directory
TRACE32 Index
TRACE32 Documents ......................................................................................................................
FIRE In-Circuit Emulator ...............................................................................................................
FIRE Target Guides ....................................................................................................................
FIRE Emulator for H8S and H8/300H .....................................................................................
WARNING ..............................................................................................................................
Quick Start ............................................................................................................................
Troubleshooting ...................................................................................................................
10
Hang-up
10
Dualport Errors
10
FAQ ........................................................................................................................................
11
Configuration ........................................................................................................................
12
Basics ....................................................................................................................................
13
Emulation Method
13
Emulation Modes
13
Dualport Access
14
General SYStem Settings and Restrictions .......................................................................

General Restrictions
16
16
SYStem.Option V33
3.3 V power fail detection
16
Onchip RAM enable
17
Mask interrupts during assembler step
17
Mask interrupts during HLL step
17
SYStem.Option RAME
SYStem.Option IMASKASM
SYStem.Option IMASKHLL
Continue with CPU specific Special Settings and Restrictions
17
Special Settings and Restrictions H8S/224x/23xx/265x ...................................................

Restrictions for H8S/224x/23xx/265x
18
18
SYStem.CPU
SYStem.CPU
Processor type
18
Operation mode
19
SYStem.Option EAE
External address enable
19
SYStem.Option TPU
Control of timer pulse unit
20
Control of 8-bit timer unit
20
Special Settings and Restrictions H8S/21xx .....................................................................
21
SYStem.Option T8
Restrictions for H8S/21xx
21
SYStem.CPU
Processor type
1989-2016 Lauterbach GmbH
21
SYStem.CPU
Operation mode
21
Special Settings and Restrictions H8S/222x/223x/262x/263x ..........................................
23
Restrictions for H8S/222x/223x/262x/263x
23
SYStem.CPU
Processor type
23
SYStem.CPU
Operation mode
24
SYStem.Option SUBCLK
Subclock enable
24
24
25
Exception Control ................................................................................................................
26
SYStem.Option TPU
SYStem.Option T8
Reset
26
Hardware Standby
27
NMI
28
Exceptions during Break Mode
29
Breakpoints ...........................................................................................................................
Breakpoint Realization Modes
30
30
Memory Classes ...................................................................................................................

Overview
32
32
State Analyzer .......................................................................................................................
33
Restrictions
33
Keywords for the Display
33
Keywords for the Emulator Trigger Unit
34
General H8S Keywords for the Emulator Trigger Unit
34
H8S/224x/23xx/265x Keywords for the Emulator Trigger Unit
34
H8S/21xx Keywords for the Emulator Trigger Unit
34
H8S/222x/223x/262x/263x Keywords for the Emulator Trigger Unit
34
Port Analyzer ........................................................................................................................
35
Port Signals H8_30XX
35
Port Signals H8S_212X
35
35
36
Port Signals H8S_222X/H8S_223X
36
37
37
37
38
38
Port Signals H8S_2636
39
39
Technical Data ......................................................................................................................
40
Mechanical Dimensions
40
Adaptions
47
Adapters
51
Operation Voltage
59
Support ..................................................................................................................................
64
Probes
64
Available Tools
68
Compilers
71
Realtime Operation Systems
71
3rd Party Tool Integrations
71
Products ................................................................................................................................
73
Product Information
73
Order Information
75

Version 24-May-2016
F::d.l
addr/line code
label
mnemonic
677
for ( i = 0 ; i <= SIZE ;
P:010E6C 1955
sub.w
P:010E6E 79250012
cmp.w
P:010E72 4E3E
bgt
{
679
if ( flags[ i ] )
P:010E74 0D50
mov.w
P:010E76 17F0
exts.l
P:010E78 78006A290020A3
mov.b
F::r
Cy C
V
_
Zr _
Neg N
U
_
H
H
UI U
I
I
IL 7
Tsk
ER0
ER1
ER2
ER3
ER4
ER5
ER6
ER7
PC
CCR
EXR
MACH
MACL
16101
20A390
200000
0
0
0
120000
2104DC
10E72
0E9
7F
0
0
comment
i++ )
r5,r5
#12,r5
10EB2
; #18,r5
r5,r0
er0
@(20A37E,er0),r1l; @(flags,er0)
F::v.w
flags = (1, 1, 1, 1, 1, 1, 1, 1, 1,
-`ast = (
+'word = 0x0,
count = 12346,
+'left = 0x20A0F2,
+'right = 0x0,
field1 = 1,
field2 = 2)
SP >00200000
+04 00010434
+08 0001614E
+0C 00010E4A
+10 00000000
+14 303A0020
+18 A0F20000
+1C 00000009
+20 0001032A
+24 00000000
+28 00000000
+2C 00000000
+30 00000000
For general informations about the In-Circuit Debugger refer to the FIRE Users Guide (fire_user.pdf). All
general commands are described in IDE Reference Guide (ide_ref.pdf) and General Reference
Guide.
WARNING
NOTE:
Do not connect or remove probe from target while target power is ON.
Power up:
Switch on emulator first, then target
Power down: Switch off target first, then emulator
WARNING
Quick Start
Before debugging can be started, the emulator must be configured by software:
Ready to run setup files for most standard compilers can be found on the software CD in the directory ../
Demo/H8S/Compiler. All setup files are designed to run the emulator stand alone without target hardware.
The following description should make the initial setup (to run the emulator together with the target
hardware) easier. It describes a typical setup with frequently used settings. It is recommended to use the
programming language PRACTICE to create a batch file, which includes all necessary setup commands.
PRACTICE files (*.cmm) can be created with the PRACTICE editor pedit (Command: PEDIT <file name>)
or with any other text editor.
A basic setup file includes the following parts:
1.
Set cpu-type and -mode
2.
Set system options
3.
Select dualport mode (optional)
4.
Set mapper (optional)
5.
Select frequency (optional)
6.
Activate the emulator
7.
Load application file (optional)
8.
Set breakpoints (optional)
9.
Start application
10.
Stop application (optional)
Quick Start
Here a typical example, how to setup the system:

1.
Set cpu-type and -mode options

The command sys.cpu is used to select one derivative within a cpu-family and to set its operation
mode.
system.down
system.cpu H8S2655
system.cpu EXP16M16
2.
; switch the system down

; select derivative H8S/2655
; set the operation mode EXP16M16
Set system options

The system window controls the CPU specific setup. Please check this window very carefully and set
the appropriate options. Use the ? button in the main tool bar and click to the option check box
(Command: HELP.PICK) to get online help in a pop up window.
system.option v33 on
system.option rame on
3.
; on: if a 3.3 V target board is used

; set RAME option corresponding to the
; RAME bit in the SYSCR register
Select dualport mode (optional)

Dualport allows access to emulation RAM, while emulation is running. This is necessary to display
variables, set breakpoints or display the flag listings while the emulation is running. System.Access
selects how dualport access is done.
system.access request
4.
; request: a dedicated bus request

; signal of the bondout cpu is used
; denied: dualport is disabled
Set mapper (optional)

The mapper controls the memory access of the CPU. This means the use of internal or external
memory, the protection of a memory bank etc. Address ranges must be defined by using memory
classes.
map.reset
map.ram c:0x0--0x07ffff
map.ram c:0x200000--0x23ffff
map.intern c:0x0--0x07ffff
map.extern c:0x200000--0x23ffff
; reset mapper (all external)

; emulation RAM: 512KB (e.g. for
program)
; emulation RAM: 256KB (e.g. for
data)
; map program memory internal
; map data memory external
Quick Start
5.
Select frequency (optional)

The CPU can be clocked by an internal (emulator) or external (target) clock source. If the internal
clock is used, the clock is provides by the VCO of the emulator. The setting of the internal clock is
done by the vco command.
The current CPU frequency can be displayed in the counter window (Command: Count).
vco.clock 20.
6.
;
;
;
;
input clock to the EXTAL pin of

the cpu is set to 20 MHz (only
necessary if internal clock is
used)
Activate the emulator

When the emulator is activated a debug-monitor program is loaded into a hidden emulator memory.
Afterwards, a bondout reset-signal is inactivated and the monitor program starts. This program allows
access to user memory (data.dump, data.list) and cpu-registers, and gives control to start and stop
the emulation.
system.mode emulext
7.
; system works with external target

; clock
Load application file (optional)

Application can be loaded by various file formats. UBROF format is often used to load code and
symbol information. For information about the load command for your compiler see Compiler.
data.load.ubrof iarh8s.dbg
8.
; load application file
Set breakpoints (optional)

There are several ways to set breakpoints (Command: Break.Set). Breakpoints can be displayed
using the Break.List command.
breakpoint.set main /program
breakpoint.set flags /write
9.
;
;
;
;
set program break on function

main
set write break on variable
flags
Start application
Application can be started with giving a break address. For example go main starts the application
and stops at symbol main.
go
; run application
Quick Start
10.
Stop application (optional)

Application can be breaked manually by using th BREAK command.
break
; break application manually
It is recommended to check the following chapters for all questions regarding the correct setup:
Configuration
General SYStem Settings and Restrictions
Special Settings and Restrictions of H8S/224x/23xx/265x
Special Settings and Restrictions of H8S/21xx
Special Settings and Restrictions of H8S/222x/223x/262x/263x
Troubleshooting
Quick Start
Troubleshooting
Hang-up
If you are not able to stop the emulation, there could be some typical reasons:
Active target-reset
The BREAK command wont stop the emulation if the target-reset

is active and the reset-line is enabled in the exception control.
Hardware Standby Mode
The hardware standby mode can only be cancelled by a new

activation (sys.up) of the emulator.
Dualport Errors
No information available.
10
Troubleshooting
FAQ
Debugging via
VPN
The debugger is accessed via Internet/VPN and the performance is very

slow. What can be done to improve debug performance?
The main cause for bad debug performance via Internet or VPN are low data
throughput and high latency. The ways to improve performance by the debugger
are limited:
in practice scripts, use "SCREEN.OFF" at the beginning of the script and
"SCREEN.ON" at the end. "SCREEN.OFF" will turn off screen updates.
Please note that if your program stops (e.g. on error) without executing
"SCREEN.OFF", some windows will not be updated.
"SYStem.POLLING SLOW" will set a lower frequency for target state
checks (e.g. power, reset, jtag state). It will take longer for the debugger to
recognize that the core stopped on a breakpoint.
"SETUP.URATE 1.s" will set the default update frequency of Data.List/
Data.dump/Variable windows to 1 second (the slowest possible setting).
prevent unneeded memory accesses using "MAP.UPDATEONCE
[address-range]" for RAM and "MAP.CONST [address--range]" for ROM/
FLASH. Address ranged with "MAP.UPDATEONCE" will read the specified
address range only once after the core stopped at a breakpoint or manual
break. "MAP.CONST" will read the specified address range only once per
SYStem.Mode command (e.g. SYStem.Up).
H8S
BurstROM
Interface
I can not map the BurstRom interface area to the emulation memory as
internal.
The BurstROM interface can not be mapped as internal. The on-chip
breakpoints must be used for the runtime control in an external BurstRom area.
11
FAQ
Configuration
There is no special hardware configuration necessary for the H8S. The configuration of the used derivative
and cpu-mode is done via the SYSTEM commands by software.
12
Configuration
Basics
Emulation Method
The FIRE Emulator uses a bondout version of the H8S CPUs.
NOTE: The bondout chip replaces the target cpu, i.e. the target cpu must be removed during emulation!
Emulation Modes
F::sys
system
Down
Up
RESet
Mode
RESet
AloneInt
AloneExt
EmulInt
EmulExt
Access
Request
Denied
Option
V33
EAE
RAME
IMASKASM
IMASKHLL
TimeReq
1.000ms
CPU
H8S2655
Option
TPU0
TPU1
TPU2
TPU3
TPU4
TPU5
T8_0
T8_1
CPU
EXP64K8
EXP16M8
EXP16M16
ROM64K8
ROM16M8
SINGLE64K
SINGLE16M
The emulator can operate in 5 modes. The modes are selected by the SYStem.Mode command.
Format:
SYStem.Mode <mode>
<mode>:
Reset
AloneInt
AloneExt
EmulInt
EmulExt
13
Basics
Reset
CPU is in reset.
AloneInternal
CPU is running with internal clock. Bus strobe signals (AS, HWR, LWR, WAIT)
are disabled. This mode is used for 'standalone' operation.
AloneExternal
CPU is running with external clock. Bus strobe signals are disabled.
Emulation
Internal
CPU is running with internal clock. Bus strobe output signals are enabled.
Emulation
External
CPU is running with external clock. Bus strobe output signals are enabled.
In active mode, the power of the target is sensed and by switching down the target the emulator changes to
RESET mode. The probe is not supplied by the target power. When running without target, the target
voltage is simulated by an internal pull-up resistor.
Dualport Access
Format:
SYStem.MemAccess <option>
<option>:
Request
Denied
Request
The CPU bus access is stopped by a dedicated bondout bus-request signal for
performing a dualport access.
Denied
Dualport access is not possible while the emulation is running.
Dualport allows access to emulation RAM and onchip ROM/FLASH/RAM of the cpu, while emulation is
running. This is necessary to display variables, set breakpoints or display flag listings while the emulation is
running. Dualport access is only possible on the emulators internal RAM and not on target RAM.
NOTE: The DTC-RAM is physically internal even at the bondout cpu. This means that this memory cant be
changed via dualport access. All accesses of the cpu to the DTC-RAM are shadowed to an emulation
RAM, so that the memory contents can be read via dualport.
14
Basics
Format:
SYStem.CpuAccess <option>
<option>:
Enable
Denied
Enable
If a dualport read/write access is requested to a non-mapped memory, a spot

point (emulation break and go) is used to access the memory.
Denied
Dualport access via spot point is not possible.
The emulator uses a two stage strategy to realize the best possible dualport access method:
If MemAccess is set to Request, the emulation controller tries a bus arbitration access as dualport cycle.
This is possible if memory is mapped to internal and on read cycles to shadow memory. Shadow memory
means, that memory is mapped in the emulator (map.ram), but the area is mapped external (map.extern).
On access to external mapped memory and write access to shadow memory the dualport is executed as a
spot point if CpuAccess is enabled. Dualport on access to external mapped memory and write access to
shadow memory is disabled if CpuAccess is disabled.
If MemAccess is set to Denied and CpuAccess is enabled, the emulation controller uses a spot point to
realize the dualport cycle. If MemAccess is set to Denied and CpuAccess is disabled, dualport access is not
possible.
The following table shows how the dualport is realized depending on the used system setting:
Mem
Access
Cpu
Access
Read
Map
Int.
Write
Map
Int.
Read
Shado
w
Write
Shado
w
Read
Map
Ext.
Write
Map
Ext.
Request
Enable
request
request
request
spot
spot
spot
Request
Denied
request
request
request
Denied
Enable
spot
spot
spot
spot
spot
spot
Denied
Denied
request: The bus arbitration interface of the CPU is used for dualport access. Application performance is
only slightly influenced.
spot: The emulation is breaked, memory access is done via CPU, emulation is continued. Application
performance decreases with this method.
15
Basics
General Restrictions
Onchip DTC-RAM
The CPUs onchip DTC-RAM is physically internal at the bondout

chip. The write accesses of the CPU to the DTC area are shadowed
to an emulator RAM, so that this shadow DTC-RAM can be read via
dual-port, but there is no dualport write-access available to the DTC
area.
The CPU uses a 32-bit data transfer for reading and writing DTC
register information, but only the lower 16 bit of the data can be seen
in the trace (restriction of the bondout chip).
BurstROM interface
The BurstROM interface cant be mapped as internal. The on-chip

breakpoints must be used for the runtime control in an external
BurstRom area.
Interrupt requests during the emulation is

stopped
Exceptions and interrupts are not handled during the emulation is

stopped. Some of them are stored and executed after starting the
emulation (see chapter Exception Control). If you will have
problems with either your target hardware or you application
program because of the blocked interrupts, then you have to use a
foreground monitor.
Pending interrupts during single-step
When executing an assembler step and external or internal

interrupts are pending, the emulator will step into the interrupt
handler and stops at the first instruction of the interrupt service
routine. The execution of the interrupt program can be avoided
either by preventing the interrupt, e.g. stop the timer while the
emulation is stopped (see timer control) or by masking the interrupt
in the CPU (command SETUP.IMASKASM). For HLL steps the
problem can be solved in the same way (command
SETUP.IMASKHLL).
SYStem.Option V33
Format:
3.3 V power fail detection
SYStem.Option V33 [ON | OFF]
The emulator has a detection logic to detect a target power fail. This option must be set to on, if a 3.3V target
is used.
16
SYStem.Option RAME
Format:
Onchip RAM enable
SYStem.Option RAME [ON | OFF]
This option must be set corresponding to the RAME bit in the SYSCR register of the cpu. The emulator
needs this information to set the breakpoints correctly.
SYStem.Option IMASKASM
Format:
Mask interrupts during assembler step
SYStem.Option IMASKASM [ON | OFF]
If enabled, the interrupt mask bits of the cpu will be set during assembler single-step operations. The
interrupt routine is not executed during single-step operations. After single step the interrupt mask bits are
restored to the value before the step.
SYStem.Option IMASKHLL
Format:
Mask interrupts during HLL step
SYStem.Option IMASKHLL [ON | OFF]
If enabled, the interrupt mask bits of the cpu will be set during HLL single-step operations. The interrupt
routine is not executed during single-step operations. After single step the interrupt mask bits are restored to
the value before the step.
NOTE:
By changing the status register through target software, this option can affect
the flow of the target program. Accesses to the interrupt-mask bits will see the
wrong values.
Continue with CPU specific Special Settings and Restrictions

The following Special Settings and Restrictions are different for the used bondout chip.
Special Settings and Restrictions of H8S/224x/23xx/265x
Special Settings and Restrictions of H8S/21xx
Special Settings and Restrictions of H8S/222x/223x/262x/263x
17
Special Settings and Restrictions H8S/224x/23xx/265x
Restrictions for H8S/224x/23xx/265x

Dual-purpose IO-Pins
The dual-purpose IO-Pins BREQ, IRQ0..7 and WAIT dont have a

pull-up resistor in the emulator.
This pins work as port pins after reset. If you change the pin
functions so that this pins have bus control or interrupt function, then
the emulator will malfunction in stand-alone mode because of the
floating inputs.
SYStem.CPU
Processor type
Format:
SYStem.CPU <type>
<type>:
H8S2240 | H8S2241 | H8S2242 | H8S2243 | H8S2244 | H8S2245 | H8S2246

H8S2340 | H8S2341 | H8S2343 | H8S2345
H8S2350 | H8S2351 | H8S2352 | H8S2353 | H8S2355 | H8S2357
H8S2653 | H8S2655
H8S2310| H8S2311 | H8S2312 | H8S2316| H8S2318
H8S2320| H8S2322 | H8S2323 | H8S2324| H8S2327 | H8S2328| H8S2329
H8S2332 | H8S2337 | H8S2338| H8S2339
This selects the exact derivative within a CPU family.
18
Special Settings and Restrictions H8S/224x/
SYStem.CPU
Operation mode
Format:
SYStem.CPU <mode>
<mode>:
EXP64K8
EXP16M8
EXP16M16
ROM64K8
ROM16M8
SINGLE64K
SINGLE16M
This option specifies operation mode of the cpu, which is normally defined with the MD0..2 pins of the cpu.
But, the values of this pins in the target are not responsible for the operation mode, so that the pin levels can
differ from the emulator setting.
EXP64K8
Expanded mode with 64 KByte address range, 8-bit initial bus width and onchip
ROM disabled
EXP16M8
Expanded mode with 16 MByte address range, 8-bit initial bus width and onchip
ROM disabled
EXP16M16
Expanded mode with 16 MByte address range, 16-bit initial bus width and
onchip ROM disabled
ROM64K8
ROM enabled
ROM16M8
ROM enabled
SINGLE64K
Single-chip mode with 64 KByte address range
SINGLE16M
Single-chip mode with 16 MByte address range
SYStem.Option EAE
Format:
External address enable
SYStem.Option EAE [ON | OFF]
This option must be set corresponding to the EAE bit in the BCRL register of the cpu. The emulator needs
this information to set the breakpoints correctly.
19
SYStem.Option TPU
Format:
SYStem.Option TPU<channel> [ON | OFF]
<channel>:
0|1|2|3|4|5
This option controls the timers of the CPUs Timer Pulse Unit for each channel independently.
Normally, the timers continue running if the emulation is stopped. If the option is now switched on, the
corresponding timer will stop after entering the break mode and will start running again before the emulation
is started. This is done by manipulating the timer start register by the emulators background monitor
program. Since there have to be done some important actions in the monitor before the timer control, the
starting and stopping cant be synchronous to the emulators go and break.
SYStem.Option T8
Format:
SYStem.Option T8_<channel> [ON | OFF]
<channel>:
0|1
This option controls the timers of the CPUs 8-bit timers for each channel independently (see
SYStem.Option TPU)
20
Special Settings and Restrictions H8S/21xx
Restrictions for H8S/21xx

The dual-purpose IO-Pins BREQ and IRQ0..7 and dont have a pullup resistor in the emulator.
floating inputs.
SYStem.CPU
Processor type
Format:
SYStem.CPU <type>
<type>:
H8S2120 | H8S2122 | H8S2123 | H8S2124 | H8S2126 | H8S2127 | H8S2128

H8S2130 | H8S2132 | H8S2133 | H8S2134 | H8S2137 | H8S2138
H8S2142 | H8S2143 | H8S2144 | H8S2147 | H8S2148
SYStem.CPU
Operation mode
Format:
SYStem.CPU <mode>
<mode>:
EXP64K8
SINGLE64K
SINGLE16M
EXP64K8
ROM disabled
21
SINGLE64K
Single-chip mode with 64 KByte address range
SINGLE16M
The EXPE bit in the MDCR register must be set to 1 in order to use external addresses.
22
Special Settings and Restrictions H8S/222x/223x/262x/263x
Restrictions for H8S/222x/223x/262x/263x

The dual-purpose IO-Pins BREQ, IRQ0..7 and WAIT dont have a

pull-up resistor in the emulator.
floating inputs.
SYStem.CPU
Processor type
Format:
SYStem.CPU <type>
<type>:
H8S2223 | H8S2225 | H8S2227 | H8S2233 | H8S2235 | H8S2236 | H8S2237 |

H8S2238
H8S2621 | H8S2622 | H8S2623| H8S2626 | H8S2631 | H8S2632
H8S2633
H8S2636
23
SYStem.CPU
Operation mode
Format:
SYStem.CPU <mode>
<mode>:
EXP16M8
EXP16M16
ROM16M8
SINGLE16M
EXP16M8
ROM disabled
EXP16M16
Expanded mode with 16 MByte address range, 16-bit initial bus width and
onchip ROM disabled
ROM16M8
ROM enabled
SINGLE16M
SYStem.Option SUBCLK
Format:
Subclock enable
SYStem.Option SUBCLK [ON | OFF]
If this option is on, then a 32,768 kHz subclock is fed into the pin OSC1, otherwise it is tied to VCC. The
OSC1 pin from the target is ignored. To avoid monitor timeout, waitstates should not be used in subclock
mode.
SYStem.Option TPU
Format:
SYStem.Option TPU<channel> [ON | OFF]
<channel>:
0|1|2|3|4|5
This option controls the timers of the CPUs Timer Pulse Unit for each channel independently.
24
Normally, the timers continue running if the emulation is stopped. If the option is now switched on, the
corresponding timer will stop after entering the break mode and will start running again before the emulation
is started. This is done by manipulating the timer start register by the emulators background monitor
program. Since there have to be done some important actions in the monitor before the timer control, the
starting and stopping cant be synchronous to the emulators go and break.
SYStem.Option T8
Format:
SYStem.Option T8_<channel> [ON | OFF]
<channel>:
0|1|2|3
This option controls the timers of the CPUs 8-bit timers for each channel independently (see
SYStem.Option TPU)
25
Exception Control
F::x
exception
OFF
ON
RESet
Delay
OFF
Activate
OFF
RESET
STBY
NMI
Enable
OFF
ON
RESET
STBY
NMI
BRQ
Pulse
OFF
RESET
STBY
NMI
Pulse
Single
Width
1.000us
PERiod
OFF
ON
0.000
NMIPOL
+
Reset
Vcc
X.Enable
&
Run
22K
RESET
(Target)
RESET
(CPU)
22R
X.Activate
or
X.Pulse
Format:
eXception.Enable RESET [ON | OFF]
Enable or disable external RESET line.
Format:
eXception.Activate RESET[ON | OFF]
Set RESET line active or inactive.

NOTE: The reset-line is driven low by the emulator, if the emulator is in system-down mode!
26
Exception Control
Hardware Standby
Vcc
22K
X.Enable
STBY
(Target)
STBY
(CPU)
22R
X.Activate
or
X.Pulse
Format:
eXception.Enable STBY [ON | OFF]
Enable or disable external STBY line.
Format:
eXception.Activate STBY [ON | OFF]
Set STBY line active or inactive.
27
Exception Control
NMI
Vcc
22K
X.Enable
X.NMIPOL
NMI
(Target)
NMI
(CPU)
22R
X.Activate
or
X.Pulse
10K
GND
Format:
eXception.Enable NMI [ON | OFF]
Enable or disable external NMI line.
Format:
eXception.Activate NMI [ON | OFF]
Set NMI line active or inactive.
Format:
eXception.NMIPOL [+ | -]
Selects the NMI edge. Set it corresponding to the bit NMIE in the System Control Register SYSCR of the
CPU.
Selects the falling edge and the 22K pull-up resistor is active (see drawing above).
+
Selects the rising edge and the 10K pull-down resistor is active (see drawing above).
28
Exception Control
Exceptions during Break Mode

During break mode (application program not running), the hardware-caused exceptions are controlled by the
bondout CPU.
NMI
If a NMI occurs, then it is stored in the CPU. So, exception processing will occur after the first instruction of
the started emulation.
External level sensitive interrupts
If a level sensitive interrupt occurs, then it is not stored in the CPU. So, interrupt processing will not occur if
the /IRQ pin is not asserted until the emulation is started.
External edge sensitive interrupts
If an edge sensitive interrupt occurs, then it is stored in the CPU. So, interrupt processing will occur after the
first instruction of the started emulation.
Internal interrupts
If an internal interrupt occurs, then it is stored in the CPU. So, interrupt processing will occur after the first
instruction of the started emulation.
29
Exception Control
Breakpoints
For a basic description of the breakpoint system please refer to FIRE Users Guide.
Breakpoint Realization Modes

This chapter describes the different realization modes and shows their availability for the logical breakpoints
types.
Software
Breakpoints
Synchronous Breakpoints:
The user application code is patched with a special break-instruction of the
bondout CPU (opcode 0x5770) before jumping into the user program. After
executing this instruction, the CPU stops the user program and jumps into
the emulator debug monitor.
NOTE: A synchronous software breakpoint in the onchip DTC-RAM area
cant be set while the application is running.
Asynchronous Breakpoints:
These breakpoints are used as address selectors for the trigger unit (see
FIRE Users Guide).
Hardware
Breakpoints
The user application is stopped before the instruction is executed. For this,
the bondout break opcode is switched to the CPU data-bus instead of the
user application opcode via hardware. This type of breakpoint is useful if
you would like to set a breakpoint in a target memory where no code can
be patched (e.g. EPROM or Flash).
NOTE: This breakpoint type doesnt work in the onchip ROM and RAM
area. There are only synchronous software breakpoints available.
Asynchronous Breakpoints: See FIRE Users Guide).
Onchip
Breakpoints
The bondout CPU has an onchip trigger-unit with two independent

channels.
They can be used if you would like to set a breakpoint in a target memory
where no code can be patched (e.g. EPROM, Flash or BurstROM).
NOTE: The breakpoint is a break after make, and not a break before
make.
Asynchronous Breakpoints:
They work only on data read or write cycles, not on instruction fetches.
The information, that a breakpoint has occurred is switched from the
bondout break controller to the emulator trigger unit, so that the trigger unit
for example can start the analyzer (with special keywords).
There is a fixed connection between the breakpoint types and the
channels:
Alpha corresponds to channel A
Beta corresponds to channel B
30
Breakpoints
The following table shows realization of the logical breakpoint types in auto-mode.
Breakpoint Type
Realization in Auto Mode
Program
Software
HLL
Software
Onchip (If the address is mapped as ReadOnly)
Stepmode (If HLL-Line is too complex)
Spot
Software
Onchip (If the address is mapped as ReadOnly)
Read, Write
Onchip
Alpha, Beta, Charly,

Delta, Echo
Hardware
31
Breakpoints
Memory Classes
Overview
Access Class
Description
CPU (Program and Data)
Data
Program
ED
Dualport Data
EP
Dualport Program
C:, E:, D:, P:, ED:, EP:

C:, P: and D:
This storage classes operate on the same physical memory. They are only used to be compatible with other
emulation probes.
E:, EP: and ED:
The E: prefix is used for accesses via dualport. The onchip I/O-registers and the onchip DTC-RAM area
cant be accessed via dualport.
32
Memory Classes
State Analyzer
Restrictions
Word access to
external 8-bit bus
It is shown in the trace list as one bus cycle. The timestamp is shows
the two bus cycles.
Keywords for the Display

AREA
Access area
STATE
CPU status
ASELIR
Instruction fetch
ASELID1
Instruction decode 1
ASELID2
Instruction decode 2
ASEBCCB
Branch not taken
ASEPFC
Prefetch cancel
33
State Analyzer
Keywords for the Emulator Trigger Unit

General H8S Keywords for the Emulator Trigger Unit
Input Event
Meaning
Analyzer
hardware
FEC
BTA
Condition match of onchip

trigger-unit channel A
BTB
Condition match of onchip

trigger-unit channel B
DATA
Data access
FETCH
Prefetch cycle
Read
Read access
Write
Write access
H8S/224x/23xx/265x Keywords for the Emulator Trigger Unit

Input Event
Meaning
Analyzer
hardware
FEC
none
H8S/21xx Keywords for the Emulator Trigger Unit

Input Event
Meaning
Analyzer
hardware
FEC
none
H8S/222x/223x/262x/263x Keywords for the Emulator Trigger Unit

Input event
Meaning
Analyzer
hardware
FEC
none
For not CPU-specific keywords, see non-declarable input variables in ICE/FIRE Analyzer Trigger Unit
Programming Guide (analyzer_prog.pdf).
34
State Analyzer
Port Analyzer
Port Signals H8_30XX

Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P20 .. P27
P2
Port P20 .. P27
P30 .. P37
P3
Port P30 .. P37
P40 .. P47
P4
Port P40 .. P47
P50 .. P57
P5
Port P50 .. P57
P60 .. P67
P6
Port P60 .. P67
P70 .. P77
P7
Port P70 .. P77
P80 .. P84
P8
Port P80 .. P84
P90 .. P95
P9
Port P90 .. P95
PA0 .. PA7
PA
Port PA0 .. PA7
PB0 .. PB7
PB
Port PB0 .. PB7
PC0 .. PC7
PC
Port PC0 .. PC7
Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P20 .. P27
P2
Port P20 .. P27
P30 .. P37
P3
Port P30 .. P37
P40 .. P47
P4
Port P40 .. P47
P50 .. P52
P5
Port P50 .. P52
P60 .. P67
P6
Port P60 .. P67
P70 .. P77
P7
Port P70 .. P77

Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P20 .. P27
P2
Port P20 .. P27
P30 .. P37
P3
Port P30 .. P37
P40 .. P47
P4
Port P40 .. P47
P50 .. P52
P5
Port P50 .. P52
P60 .. P67
P6
Port P60 .. P67
35
Port Analyzer
Name
Group
Description
P70 .. P77
P7
Port P70 .. P77
P80 .. P86
P8
Port P80 .. P86
P90 .. P97
P9
Port P90 .. P97

Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P20 .. P27
P2
Port P20 .. P27
P30 .. P37
P3
Port P30 .. P37
P40 .. P47
P4
Port P40 .. P47
P50 .. P52
P5
Port P50 .. P52
P60 .. P67
P6
Port P60 .. P67
P70 .. P77
P7
Port P70 .. P77
P80 .. P86
P8
Port P80 .. P86
P90 .. P97
P9
Port P90 .. P97
PA0 .. PA7
PA
Port PA0 .. PA7
PB0 .. PB7
PB
Port PB0 .. PB7

Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P30 .. P36
P3
Port P30 .. P36
P40 .. P47
P4
Port P40 .. P47
P70 .. P77
P7
Port P70 .. P77
P96 .. P97
P9
Port P96 .. P97
PA0 .. PA3
PA
Port PA0 .. PA3
PB0 .. PB7
PB
Port PB0 .. PB7
PC0 .. PC7
PC
Port PC0 .. PC7
PD0 .. PD7
PD
Port PD0 .. PD7
PE0 .. PE7
PE
Port PE0 .. PE7
PF0 .. PF7
PF
Port PF0 .. PF7
PG0 .. PG4
PG
Port PG0 .. PG4
36
Port Analyzer

Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P20 .. P27
P2
Port P20 .. P27
P30 .. P35
P3
Port P30 .. P35
P40 .. P43
P4
Port P40 .. P43
P50 .. P53
P5
Port P50 .. P53
PA0 .. PA3
PA
Port PA0 .. PA3
PB0 .. PB7
PB
Port PB0 .. PB7
PC0 .. PC7
PC
Port PC0 .. PC7
PD0 .. PD7
PD
Port PD0 .. PD7
PE0 .. PE7
PE
Port PE0 .. PE7
PF0 .. PF7
PF
Port PF0 .. PF7
PG0 .. PG4
PG
Port PG0 .. PG4

Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P20 .. P27
P2
Port P20 .. P27
P30 .. P35
P3
Port P30 .. P35
P40 .. P47
P4
Port P40 .. P47
P50 .. P57
P5
Port P50 .. P57
P60 .. P67
P6
Port P60 .. P67
PA0 .. PA7
PA
Port PA0 .. PA7
PB0 .. PB7
PB
Port PB0 .. PB7
PC0 .. PC7
PC
Port PC0 .. PC7
PD0 .. PD7
PD
Port PD0 .. PD7
PE0 .. PE7
PE
Port PE0 .. PE7
PF0 .. PF7
PF
Port PF0 .. PF7
PG0 .. PG4
PG
Port PG0 .. PG4

Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P20 .. P27
P2
Port P20 .. P27
P30 .. P35
P3
Port P30 .. P35
P40 .. P47
P4
Port P40 .. P47
P50 .. P57
P5
Port P50 .. P57
P60 .. P67
P6
Port P60 .. P67
37
Port Analyzer
Name
Group
Description
P70 .. P75
P7
Port P70 .. P75
P80 .. P86
P8
Port P80 .. P86
P92 .. P97
P9
Port P92 .. P97
PA0 .. PA7
PA
Port PA0 .. PA7
PB0 .. PB7
PB
Port PB0 .. PB7
PC0 .. PC7
PC
Port PC0 .. PC7
PD0 .. PD7
PD
Port PD0 .. PD7
PE0 .. PE7
PE
Port PE0 .. PE7
PF0 .. PF7
PF
Port PF0 .. PF7
PG0 .. PG4
PG
Port PG0 .. PG4

Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P20 .. P27
P2
Port P20 .. P27
P30 .. P35
P3
Port P30 .. P35
P40 .. P47
P4
Port P40 .. P47
P50 .. P53
P5
Port P50 .. P53
P60 .. P67
P6
Port P60 .. P67
PA0 .. PA7
PA
Port PA0 .. PA7
PB0 .. PB7
PB
Port PB0 .. PB7
PC0 .. PC7
PC
Port PC0 .. PC7
PD0 .. PD7
PD
Port PD0 .. PD7
PE0 .. PE7
PE
Port PE0 .. PE7
PF0 .. PF7
PF
Port PF0 .. PF7
PG0 .. PG4
PG
Port PG0 .. PG4
Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P40 .. P47
P4
Port P40 .. P47
P90 .. P97
P9
Port P90 .. P97
PA0 .. PA5
PA
Port PA0 .. PA5
PB0 .. PB7
PB
Port PB0 .. PB7
PC0 .. PC7
PC
Port PC0 .. PC7
PD0 .. PD7
PD
Port PD0 .. PD7
PE0 .. PE7
PE
Port PE0 .. PE7
PF0 .. PF7
PF
Port PF0 .. PF7
38
Port Analyzer
Port Signals H8S_2636

Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P30 .. P35
P3
Port P30 .. P35
P40 .. P47
P4
Port P40 .. P47
P90 .. P93
P9
Port P90 .. P93
PA0 .. PA3
PA
Port PA0 .. PA3
PB0 .. PB7
PB
Port PB0 .. PB7
PC0 .. PC7
PC
Port PC0 .. PC7
PD0 .. PD7
PD
Port PD0 .. PD7
PE0 .. PE7
PE
Port PE0 .. PE7
PF0
PF
Port PF0
PF3 .. PF7
PF
Port PF3 .. PF7

Name
Group
Description
P10 .. P17
P1
Port P10 .. P17
P30 .. P37
P3
Port P30 .. P37
P40 .. P47
P4
Port P40 .. P47
P70 .. P77
P7
Port P70 .. P77
P90 .. P97
P9
Port P90 .. P97
PA0 .. PA7
PA
Port PA0 .. PA7
PB0 .. PB7
PB
Port PB0 .. PB7
PC0 .. PC7
PC
Port PC0 .. PC7
PD0 .. PD7
PD
Port PD0 .. PD7
PE0 .. PE7
PE
Port PE0 .. PE7
PF0 .. PF7
PF
Port PF0 .. PF7
PG0 .. PG4
PG
Port PG0 .. PG4
39
Port Analyzer
Technical Data
Mechanical Dimensions
Dimension
LA-9569
FIRE-M-H8S-11
TOP VIEW
ALL DIMENSIONS IN MILS
750
3000
2800
2600
4250
5000
PIN1 36014/0.5MM
FRONT VIEW
PIN1 3694/0.5MM
PIN1 3694/0.8MM
PIN1 3687/0.8 MM
PIN1 3687/0.5MM
450
2637
2837
3637
3837
4037
6500
6875
LA-9570
FIRE-H8S
40
Technical Data
Dimension
LA-9571
FIRE-M-H8S-1
TOP VIEW
120-QF56
0.4
PIN1
750
3400
4250
3525
3550
5000
100-QF49
FRONT VIEW
0.5
PIN1
0.5
PIN1
128-QF51
450
LA-9572
2625
3687.5
5425
6500
6875
FIRE-M-H8S-2
TOP VIEW
100-QF49
80-QF47
80-QF14
PIN1 0.5
750
3300
3400
4250
3600
5000
PIN1 0.5
FRONT VIEW
PIN1 0.65
450
2600
3900
5000
6500
6875
41
Technical Data
Dimension
LA-9573
FIRE-M-H8S-3
TOP VIEW
80-QF47
PIN1
750
3300
3600
4250
5000
FRONT VIEW
64-QF29
PIN1
450
3050
4050
4700
6500
6875
LA-9574
FIRE-M-H8S-4
TOP VIEW
750
3100
3200
4250
5000
PIN1
100-QF49
FRONT VIEW
100-QF06
PIN1
450
2675
2975
6500
6875
42
Technical Data
Dimension
LA-9575
FIRE-M-H8S-5
TOP VIEW
4250
5000
FRONT VIEW
750
1450
128-QF51
PIN1
450
1475
6500
6875
LA-9576
FIRE-M-H8S-6
TOP VIEW
PIN 1 128-QF51
FRONT VIEW
PIN1 100-QF49
750
2913
3100
3250
4250
5000
120-QF56 PIN1
450
1175
2600
3850
6500
6875
43
Technical Data
Dimension
LA-9577
FIRE-M-H8S-7
LA-9579
FIRE-M-H8S-9
750
3100
4250
5000
PIN 1
100-QF49
FRONT VIEW
TOP VIEW
450
2975
6875
6500
44
Technical Data
Dimension
LA-9580
FIRE-M-H8S-10
4250
5000
FRONT VIEW
TOP VIEW
750
2000
ET80-QF14
PIN1
450
4900
6875
LA-9586
6500
FIRE-M-H8S-12
2600
3900
5000
TOP VIEW
80-QF47
80-QF14
100-QF49
750
3600
3400
3300
5000
4250
FRONT VIEW
NC
500
2200
2400
1800
9 x 100
2200
2400
79
80
61
62
3
59
41
600
75
2000
1800
350
1600
39
42
52
12 x 100
40
80-QF14
TOP VIEW
77
700
76
21
NC
50
51
NC
22
PIN1
20
19
NC
25
3
PIN1
100
100-QF49
TOP VIEW
12 x 100
2
3
PIN1
59
9X100
62
300
20
19
61
26
80
60
39
41
40
27
79
80QF47
TOP-VIEW
42
350
1800
21
9 X 100
1600
22
6500
6875
9 x 100
60
450
300
400
1600
1800
45
Technical Data
Dimension
LA-9587
FIRE-M-H8S-13
TOP VIEW
750
5000
4250
3375
3175
PIN1
266x/267x 144QF63
FRONT VIEW
PIN1
237x 144QF63
450
LA-9588
3275
3475
6500
6875
FIRE-M-H8S-14
TOP VIEW
FRONT VIEW
PIN1 236x-128QF51
750
3250
2850
4250
5000
PIN 1 236x-120QF56
450
2325
3625
6500
6875
46
Technical Data
Adaptions
CPU
Adaption
H8S/2214
H8S/2223
H8S/2223
H8S/2225
H8S/2225
H8S/2227
H8S/2227
H8S/2233
H8S/2233
H8S/2235
H8S/2235
H8S/2236
H8S/2236
H8S/2237
H8S/2237
H8S/2238
H8S/2238
ET100-QF06
47
Technical Data
CPU
Adaption
H8/3006
ET100-QF49
H8/3007
H8/3008
H8/3044
H8/3045
H8/3046
H8/3047
H8/3048
H8/3052
H8/3060
H8/3061
H8/3062
H8/3064
H8/3065
H8/3066
H8/3067
H8/3068
H8S/2142
H8S/2143
H8S/2144
H8S/2147
H8S/2148
H8S/2214
H8S/2223
H8S/2223
H8S/2225
H8S/2225
H8S/2227
H8S/2227
H8S/2233
H8S/2233
H8S/2235
H8S/2235
H8S/2236
H8S/2236
H8S/2237
H8S/2237
H8S/2238
H8S/2238
H8S/2240
H8S/2241
H8S/2242
H8S/2243
H8S/2244
H8S/2245
H8S/2246
H8S/2310
H8S/2311
H8S/2312
H8S/2316
H8S/2318
H8S/2319
H8S/2340
FIREH8S/2341
Emulator for H8S and H8/300H
48
H8S/2343
Technical Data
CPU
Adaption
H8S/2332
H8S/2337
H8S/2338
H8S/2339
ET144-QF63
H8/36014
H8/3664
H8/3672
H8/3687
H8/3694
H8S/2120
H8S/2122
H8S/2123
H8S/2124
H8S/2126
H8S/2127
H8S/2128
ET64-QF29
49
Technical Data
CPU
Adaption
H8S/2130
H8S/2132
H8S/2133
H8S/2134
H8S/2137
H8S/2138
H8S/2612
ET80-QF14
H8S/2120
H8S/2122
H8S/2123
H8S/2124
H8S/2126
H8S/2127
H8S/2128
H8S/2130
H8S/2132
H8S/2133
H8S/2134
H8S/2137
H8S/2138
ET80-QF47
50
Technical Data
Adapters
Socket CPU
Adapter
ET100-QF06
ET-1030 ET100-SET-QF06
Surface Mountable Adapter for ET100 to QF06
H8S/2214
H8S/2223
H8S/2225
H8S/2227
H8S/2233
H8S/2235
H8S/2236
H8S/2237
H8S/2238
32
SIDE VIEW
::
::
::
::
::
::
::
::::::::::::::
::
::
::::::
::
:: ::
::
::::::
::
::
::
::::::::::::::
43
52
TOP VIEW (all dimensions in mm)
51
Technical Data
Socket CPU
Adapter
ET100-QF06
YA-1031 ET100-EYA-QF06
Emul. Adapter for YAMAICHI socket ET100-QF06
H8S/2214
H8S/2223
H8S/2225
H8S/2227
H8S/2233
H8S/2235
H8S/2236
H8S/2237
H8S/2238
8
6
54
SIDE VIEW
56
11
52
Technical Data
Socket CPU
Adapter
ET100-QF49
H8/3006
H8/3007
H8/3008
H8/3044
H8/3045
H8/3046
H8/3047
56
H8/3048
H8/3052
SIDE VIEW
H8/3060
H8/3061
H8/3062
H8/3064
1
H8/3065
H8/3066
H8/3067
H8/3068
H8S/2142
H8S/2143
H8S/2144
18
H8S/2147
H8S/2148
H8S/2214
14
H8S/2223
TOP VIEW (all dimensions
H8S/2225
H8S/2227
H8S/2233
H8S/2235
H8S/2236
H8S/2237
H8S/2238
H8S/2240
H8S/2241
H8S/2242
H8S/2243
H8S/2244
H8S/2245
H8S/2246
H8S/2310
H8S/2311
H8S/2312
H8S/2316
H8S/2318
H8S/2319
H8S/2340
H8S/2341
H8S/2343
H8S/2345
H8S/2621
H8S/2622
H8S/2623
FIREH8S/2626
Emulator for H8S and H8/300H
53
8
6
66
in mm)
Technical Data
Socket CPU
Adapter
ET120-QF56
H8S/2320
H8S/2322
H8S/2323
H8S/2324
H8S/2327
H8S/2328
H8S/2329
H8S/2350
H8S/2351
H8S/2352
H8S/2353
H8S/2355
H8S/2357
H8S/2631
H8S/2632
H8S/2633
H8S/2653
H8S/2655
ET120-QF56
Adapter/ Target Design
TOP VIEW
2400
2400
2050
2050
32
360
31
775
4 X SAMTEC:
TFM-115-22-S-LC
ICP-120-2
TO-1280 ET128-ETO-QF51
Emul. Adapter for T0 socket ET128-QF51
127
97
96
31
32
2500
2300
95
66
98
65
128
100
100
ET128-QF51
Adapter/ Target Design
TOP VIEW
33
34
360
H8S/2320
H8S/2322
H8S/2323
H8S/2324
H8S/2327
H8S/2328
H8S/2329
H8S/2350
H8S/2351
H8S/2352
H8S/2353
H8S/2355
H8S/2357
H8S/2631
H8S/2632
H8S/2633
H8S/2636
H8S/2639
H8S/2653
H8S/2655
63
2300
2500
64
4 x SAMTEC:
TSW-116-D-...
775
ET128-QF51
TET-ADAPTER
54
Technical Data
Socket CPU
Adapter
ET144-QF63
H8S/2332
H8S/2337
H8S/2338
H8S/2339
8
6
69
SIDE VIEW
69
17
18
55
Technical Data
Socket CPU
Adapter
ET64-QF29
H8/36014
H8/3664
H8/3672
H8/3687
H8/3694
H8S/2120
H8S/2122
H8S/2123
H8S/2124
H8S/2126
H8S/2127
H8S/2128
8
6
46
SIDE VIEW
66
20
9
56
Technical Data
Socket CPU
Adapter
ET80-QF14
H8S/2130
H8S/2132
H8S/2133
H8S/2134
H8S/2137
H8S/2138
H8S/2612
8
6
66
SIDE VIEW
51
11
18
57
Technical Data
Socket CPU
Adapter
ET80-QF47
H8S/2120
H8S/2122
H8S/2123
H8S/2124
H8S/2126
H8S/2127
H8S/2128
H8S/2130
H8S/2132
H8S/2133
H8S/2134
H8S/2137
H8S/2138
8
6
51
SIDE VIEW
TARGET
51
12
12
58
Technical Data
Operation Voltage
This list contains information on probes available for other voltage ranges. Probes not noted here supply an
operation voltage range of 4.5 5.5 V.
CPU
Module
Adapter
Voltage Range
H8/3006
H8/3007
H8/3008
H8/3044
H8/3045
H8/3046
H8/3047
H8/3048
H8/3052
H8/3060
H8/3061
H8/3062
H8/3064
H8/3065
H8/3066
H8/3067
H8/3068
H8/36014
H8/3664
H8/3672
H8/3687
H8/3694
H8S/2120
H8S/2122
H8S/2123
H8S/2124
H8S/2126
H8S/2127
H8S/2128
H8S/2130
H8S/2132
H8S/2133
H8S/2134
H8S/2137
H8S/2138
H8S/2142
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9569
LA-9569
LA-9569
LA-9569
LA-9569
LA-9573
LA-9573
LA-9573
LA-9573
LA-9573
LA-9573
LA-9573
LA-9572
LA-9572
LA-9572
LA-9572
LA-9572
LA-9572
LA-9572
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
59
Technical Data
CPU
Module
Adapter
Voltage Range
H8S/2143
H8S/2144
H8S/2147
H8S/2148
H8S/2214
H8S/2223
H8S/2223
H8S/2225
H8S/2225
H8S/2227
H8S/2227
H8S/2233
H8S/2233
H8S/2235
H8S/2235
H8S/2236
H8S/2236
H8S/2237
H8S/2237
H8S/2238
H8S/2238
H8S/2240
H8S/2241
H8S/2242
H8S/2243
H8S/2244
H8S/2245
H8S/2246
H8S/2310
H8S/2311
H8S/2312
H8S/2316
H8S/2318
H8S/2319
H8S/2320
H8S/2322
H8S/2323
H8S/2324
H8S/2327
H8S/2328
H8S/2329
H8S/2332
H8S/2337
H8S/2338
H8S/2339
LA-9572
LA-9572
LA-9572
LA-9572
LA-9578
LA-9574
LA-9578
LA-9574
LA-9578
LA-9574
LA-9578
LA-9574
LA-9578
LA-9574
LA-9578
LA-9574
LA-9578
LA-9574
LA-9578
LA-9574
LA-9578
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9635
LA-9635
LA-9635
LA-9635
LA-9635
LA-9635
-
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 3.5 V
3.0 .. 3.5 V
3.0 .. 3.5 V
3.0 .. 3.5 V
3.0 .. 3.5 V
3.0 .. 3.5 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
3.0 .. 3.6 V
60
Technical Data
CPU
Module
Adapter
Voltage Range
H8S/2340
H8S/2341
H8S/2343
H8S/2345
H8S/2350
H8S/2351
H8S/2352
H8S/2353
H8S/2355
H8S/2357
H8S/2621
H8S/2622
H8S/2623
H8S/2626
H8S/2631
H8S/2632
H8S/2633
H8S/2653
H8S/2655
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9576
LA-9576
LA-9576
LA-9576
LA-9576
LA-9576
LA-9576
LA-9571
LA-9571
LA-9635
LA-9635
LA-9635
LA-9635
-
3.0 .. 3.5 V
3.0 .. 3.5 V
3.0 .. 3.5 V
3.0 .. 3.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
3.0 .. 5.5 V
Operation Frequency
Module
CPU
F-W010
F-W110
S-W010
S-W110
CHIP
TRACE HEAD
RAM
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9579
LA-9569
LA-9569
H8/3006
H8/3007
H8/3008
H8/3044
H8/3045
H8/3046
H8/3047
H8/3048
H8/3052
H8/3060
H8/3061
H8/3062
H8/3064
H8/3065
H8/3066
H8/3067
H8/3068
H8/36014
H8/3664
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
28.0
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0+
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
61
Technical Data
Module
CPU
F-W010
F-W110
S-W010
S-W110
CHIP
LA-9569
LA-9569
LA-9569
LA-9573
LA-9573
LA-9573
LA-9573
LA-9573
LA-9573
LA-9573
LA-9572
LA-9572
LA-9572
LA-9572
LA-9572
LA-9572
LA-9572
LA-9572
LA-9572
LA-9572
LA-9572
LA-9578
LA-9574
LA-9574
LA-9574
LA-9574
LA-9574
LA-9574
LA-9574
LA-9574
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
H8/3672
H8/3687
H8/3694
H8S/2120
H8S/2122
H8S/2123
H8S/2124
H8S/2126
H8S/2127
H8S/2128
H8S/2130
H8S/2132
H8S/2133
H8S/2134
H8S/2137
H8S/2138
H8S/2142
H8S/2143
H8S/2144
H8S/2147
H8S/2148
H8S/2214
H8S/2223
H8S/2225
H8S/2227
H8S/2233
H8S/2235
H8S/2236
H8S/2237
H8S/2238
H8S/2240
H8S/2241
H8S/2242
H8S/2243
H8S/2244
H8S/2245
H8S/2246
H8S/2310
H8S/2311
H8S/2312
H8S/2316
H8S/2318
H8S/2319
H8S/2320
35.0
35.0
35.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
13.0
13.0
13.0
13.0
13.0
13.0
13.0
13.0
13.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
35.0+
35.0+
35.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
13.0+
13.0+
13.0+
13.0+
13.0+
13.0+
13.0+
13.0+
13.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
28.0
28.0
28.0
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
11.9
11.9
11.9
11.9
11.9
11.9
11.9
11.9
11.9
17.5
17.5
17.5
17.5
17.5
17.5
17.5
21.2
21.2
21.2
21.2
21.2
21.2
21.2
35.0+
35.0+
35.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
13.0+
13.0+
13.0+
13.0+
13.0+
13.0+
13.0+
13.0+
13.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
35.0
35.0
35.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
13.0
13.0
13.0
13.0
13.0
13.0
13.0
13.0
13.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
TRACE HEAD
RAM
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
62
Technical Data
Module
CPU
F-W010
F-W110
S-W010
S-W110
CHIP
TRACE HEAD
RAM
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9577
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9571
LA-9580
LA-9576
LA-9576
LA-9576
LA-9576
LA-9576
LA-9576
LA-9576
LA-9575
LA-9575
LA-9571
LA-9571
H8S/2322
H8S/2323
H8S/2324
H8S/2327
H8S/2328
H8S/2329
H8S/2332
H8S/2337
H8S/2338
H8S/2339
H8S/2340
H8S/2341
H8S/2343
H8S/2345
H8S/2350
H8S/2351
H8S/2352
H8S/2353
H8S/2355
H8S/2357
H8S/2612
H8S/2621
H8S/2622
H8S/2623
H8S/2626
H8S/2631
H8S/2632
H8S/2633
H8S/2636
H8S/2639
H8S/2653
H8S/2655
25.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
25.0
25.0
25.0
20.0
20.0
20.0
20.0
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
25.0+
25.0+
25.0+
20.0+
20.0+
20.0+
20.0+
21.2
21.2
21.2
21.2
21.2
21.2
21.2
21.2
21.2
21.2
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
17.5
21.2
21.2
21.2
17.5
17.5
17.5
17.5
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
25.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
20.0+
25.0+
25.0+
25.0+
20.0+
20.0+
20.0+
20.0+
25.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
25.0
25.0
25.0
20.0
20.0
20.0
20.0
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
63
Technical Data
Support
Probes
LA-9570
LA-9579
LA-9569
H8/3006
ET100-QF49 3.0..5.5V
H8/3007
ET100-QF49 3.0..5.5V
H8/3008
ET100-QF49 3.0..5.5V
H8/3044
ET100-QF49 3.0..5.5V
H8/3045
ET100-QF49 3.0..5.5V
H8/3046
ET100-QF49 3.0..5.5V
H8/3047
ET100-QF49 3.0..5.5V
H8/3048
ET100-QF49 3.0..5.5V
H8/3052
ET100-QF49 3.0..5.5V
H8/3060
ET100-QF49 3.0..5.5V
H8/3061
ET100-QF49 3.0..5.5V
H8/3062
ET100-QF49 3.0..5.5V
H8/3064
ET100-QF49 3.0..5.5V
H8/3065
ET100-QF49 3.0..5.5V
H8/3066
ET100-QF49 3.0..5.5V
H8/3067
ET100-QF49 3.0..5.5V
H8/3068
ET100-QF49 3.0..5.5V
H8/36014
H8/36014
ET64-QF29
ET64-QF64
3.0..5.5V
3.0..5.5V
H8/3664
H8/3664
ET64-QF29
ET64-QF64
3.0..5.5V
3.0..5.5V
H8/3672
H8/3672
ET64-QF29
ET64-QF64
3.0..5.5V
3.0..5.5V
H8/3687
H8/3687
ET64-QF29
ET64-QF64
3.0..5.5V
3.0..5.5V
H8/3694
H8/3694
ET64-QF29
ET64-QF64
3.0..5.5V
3.0..5.5V
64
Support
LA-9570
LA-9573
LA-9572
H8S/2120
H8S/2120
H8S/2120
DIL64
ET64-QF29
ET80-QF47
3.0..5.5V
3.0..5.5V
3.0..5.5V
H8S/2122
H8S/2122
H8S/2122
DIL64
ET64-QF29
ET80-QF47
3.0..5.5V
3.0..5.5V
3.0..5.5V
H8S/2123
H8S/2123
H8S/2123
DIL64
ET64-QF29
ET80-QF47
3.0..5.5V
3.0..5.5V
3.0..5.5V
H8S/2124
H8S/2124
H8S/2124
DIL64
ET64-QF29
ET80-QF47
3.0..5.5V
3.0..5.5V
3.0..5.5V
H8S/2126
H8S/2126
H8S/2126
DIL64
ET64-QF29
ET80-QF47
3.0..5.5V
3.0..5.5V
3.0..5.5V
H8S/2127
H8S/2127
H8S/2127
DIL64
ET64-QF29
ET80-QF47
3.0..5.5V
3.0..5.5V
3.0..5.5V
H8S/2128
H8S/2128
H8S/2128
DIL64
ET64-QF29
ET80-QF47
3.0..5.5V
3.0..5.5V
3.0..5.5V
H8S/2130
H8S/2130
ET80-QF14
ET80-QF47
3.0..5.5V
3.0..5.5V
H8S/2132
H8S/2132
ET80-QF14
ET80-QF47
3.0..5.5V
3.0..5.5V
H8S/2133
H8S/2133
ET80-QF14
ET80-QF47
3.0..5.5V
3.0..5.5V
H8S/2134
H8S/2134
ET80-QF14
ET80-QF47
3.0..5.5V
3.0..5.5V
H8S/2137
H8S/2137
ET80-QF14
ET80-QF47
3.0..5.5V
3.0..5.5V
H8S/2138
H8S/2138
ET80-QF14
ET80-QF47
3.0..5.5V
3.0..5.5V
H8S/2142
ET100-QF49 3.0..5.5V
H8S/2143
ET100-QF49 3.0..5.5V
H8S/2144
ET100-QF49 3.0..5.5V
H8S/2147
ET100-QF49 3.0..5.5V
H8S/2148
ET100-QF49 3.0..5.5V
65
Support
LA-9570
H8S/2223
H8S/2223
ET100-QF06 3.0..3.6V
ET100-QF49 3.0..3.6V
H8S/2225
H8S/2225
ET100-QF06 3.0..3.6V
ET100-QF49 3.0..3.6V
H8S/2227
H8S/2227
ET100-QF06 3.0..3.6V
ET100-QF49 3.0..3.6V
H8S/2233
H8S/2233
ET100-QF06 3.0..3.6V
ET100-QF49 3.0..3.6V
H8S/2235
H8S/2235
ET100-QF06 3.0..3.6V
ET100-QF49 3.0..3.6V
H8S/2236
H8S/2236
ET100-QF06 3.0..3.6V
ET100-QF49 3.0..3.6V
H8S/2237
H8S/2237
ET100-QF06 3.0..3.6V
ET100-QF49 3.0..3.6V
H8S/2238
H8S/2238
ET100-QF06 3.0..3.6V
ET100-QF49 3.0..3.6V
H8S/2240
ET100-QF49 3.0..5.5V
H8S/2241
ET100-QF49 3.0..5.5V
H8S/2242
ET100-QF49 3.0..5.5V
H8S/2243
ET100-QF49 3.0..5.5V
H8S/2244
ET100-QF49 3.0..5.5V
H8S/2245
ET100-QF49 3.0..5.5V
H8S/2246
ET100-QF49 3.0..5.5V
H8S/2320
H8S/2320
ET120-QF56 3.0..3.6V
ET128-QF51 3.0..3.6V
H8S/2322
H8S/2322
ET120-QF56 3.0..3.6V
ET128-QF51 3.0..3.6V
H8S/2323
H8S/2323
ET120-QF56 3.0..3.6V
ET128-QF51 3.0..3.6V
H8S/2324
H8S/2324
ET120-QF56 3.0..3.6V
ET128-QF51 3.0..3.6V
H8S/2327
H8S/2327
ET120-QF56 3.0..3.6V
ET128-QF51 3.0..3.6V
H8S/2328
H8S/2328
ET120-QF56 3.0..3.6V
ET128-QF51 3.0..3.6V
H8S/2329
H8S/2329
ET120-QF56 3.0..3.6V
ET128-QF51 3.0..3.6V
H8S/2332
ET144-QF63 3.0..3.6V
H8S/2337
ET144-QF63 3.0..3.6V
LA-9574
LA-9571
LA-9577
66
Support
LA-9570
H8S/2338
ET144-QF63 3.0..3.6V
H8S/2339
ET144-QF63 3.0..3.6V
H8S/2350
H8S/2350
ET120-QF56 3.0..5.5V
ET128-QF51 3.0..5.5V
H8S/2351
H8S/2351
ET120-QF56 3.0..5.5V
ET128-QF51 3.0..5.5V
H8S/2352
H8S/2352
ET120-QF56 3.0..5.5V
ET128-QF51 3.0..5.5V
H8S/2353
H8S/2353
ET120-QF56 3.0..5.5V
ET128-QF51 3.0..5.5V
H8S/2355
H8S/2355
ET120-QF56 3.0..5.5V
ET128-QF51 3.0..5.5V
H8S/2357
H8S/2357
ET120-QF56 3.0..5.5V
ET128-QF51 3.0..5.5V
H8S/2612
ET80-QF14
H8S/2621
ET100-QF49 3.0..5.5V
H8S/2622
ET100-QF49 3.0..5.5V
H8S/2623
ET100-QF49 3.0..5.5V
H8S/2626
ET100-QF49 3.0..5.5V
H8S/2631
H8S/2631
ET120-QF56 3.0..5.5V
ET128-QF51 3.0..5.5V
H8S/2632
H8S/2632
ET120-QF56 3.0..5.5V
ET128-QF51 3.0..5.5V
H8S/2633
H8S/2633
ET120-QF56 3.0..5.5V
ET128-QF51 3.0..5.5V
H8S/2636
ET128-QF51
H8S/2639
ET128-QF51
H8S/2653
H8S/2653
ET120-QF56 3.0..5.5V
ET128-QF51 3.0..5.5V
H8S/2655
H8S/2655
ET120-QF56 3.0..5.5V
ET128-QF51 3.0..5.5V
H8S/2310
ET100-QF49 3.0..3.5V
H8S/2311
ET100-QF49 3.0..3.5V
H8S/2312
ET100-QF49 3.0..3.5V
H8S/2316
ET100-QF49 3.0..3.5V
H8S/2318
ET100-QF49 3.0..3.5V
H8S/2319
ET100-QF49 3.0..3.5V
LA-9577
LA-9571
LA-9580
LA-9576
LA-9575
LA-9571
LA-9577
LA-9635
67
Support
LA-9570
LA-9571
H8S/2340
ET100-QF49 3.0..3.5V
H8S/2341
ET100-QF49 3.0..3.5V
H8S/2343
ET100-QF49 3.0..3.5V
H8S/2345
ET100-QF49 3.0..3.5V
LA-9635
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
INSTRUCTION
SIMULATOR
POWER
INTEGRATOR
ICD
TRACE
YES YES
YES YES
YES
YES
YES
YES
YES
YES
YES
YES YES
YES YES
YES YES
YES YES
YES YES
YES YES
YES YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
ICD
MONITOR
ICE
H8/3006
H8/3007
H8/3008
H8/3044
H8/3045
H8/3046
H8/3047
H8/3048
H8/3052
H8/3060
H8/3061
H8/3062
H8/3064
H8/3065
H8/3066
H8/3067
H8/3068
H8/36014
H8/3664
H8/3672
H8/3687
H8/3694
H8S/2120
H8S/2122
H8S/2123
H8S/2124
H8S/2126
ICD
DEBUG
CPU
FIRE
Available Tools
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
68
Support
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
INSTRUCTION
SIMULATOR
POWER
INTEGRATOR
ICD
TRACE
ICD
MONITOR
ICD
DEBUG
FIRE
ICE
CPU
H8S/2127
H8S/2128
H8S/2130
H8S/2132
H8S/2133
H8S/2134
H8S/2137
H8S/2138
H8S/2142
H8S/2143
H8S/2144
H8S/2147
H8S/2148
H8S/2214
H8S/2223
H8S/2225
H8S/2227
H8S/2233
H8S/2235
H8S/2236
H8S/2237
H8S/2238
H8S/2240
H8S/2241
H8S/2242
H8S/2243
H8S/2244
H8S/2245
H8S/2246
H8S/2310
H8S/2311
H8S/2312
H8S/2316
H8S/2318
H8S/2319
H8S/2320
H8S/2322
H8S/2323
H8S/2324
H8S/2327
H8S/2328
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
69
Support
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
INSTRUCTION
SIMULATOR
POWER
INTEGRATOR
ICD
TRACE
ICD
MONITOR
ICD
DEBUG
FIRE
ICE
CPU
H8S/2329
H8S/2332
H8S/2337
H8S/2338
H8S/2339
H8S/2340
H8S/2341
H8S/2343
H8S/2345
H8S/2350
H8S/2351
H8S/2352
H8S/2353
H8S/2355
H8S/2357
H8S/2612
H8S/2621
H8S/2622
H8S/2623
H8S/2626
H8S/2631
H8S/2632
H8S/2633
H8S/2636
H8S/2639
H8S/2653
H8S/2655
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
70
Support
Compilers
Language
Compiler
Company
Option
Comment
C
C
ICCH8
CH38
UBROF
SYSROF
H8S
H8S
C++
GNU
C++
CH38
IAR Systems AB
Renesas Technology,
Corp.
Free Software
Foundation, Inc.
Renesas Technology,
Corp.
COFF
SYSROF
Realtime Operation Systems

Name
Company
Comment
CMX-RTX
CMX-TINY
FreeRTOS
Nucleus
osCAN
OSEK
ProOSEK
RTXC 3.2
CMX Systems Inc.

CMX Systems Inc.
Freeware I
Mentor Graphics Corporation
Vector
Elektrobit Automotive GmbH
Quadros Systems Inc.
v7
via ORTI
via ORTI
via ORTI
3rd Party Tool Integrations

CPU
Tool
Company
ALL
ALL
ALL
ADENEO
X-TOOLS / X32
CODEWRIGHT
ALL
CODE CONFIDENCE
TOOLS
CODE CONFIDENCE
TOOLS
EASYCODE
ECLIPSE
Adeneo Embedded
blue river software GmbH
Borland Software
Corporation
Code Confidence Ltd
ALL
ALL
ALL
Host
Windows
Windows
Windows
Code Confidence Ltd
Linux
EASYCODE GmbH
Eclipse Foundation, Inc
Windows
Windows
71
Support
CPU
Tool
Company
Host
ALL
ALL
ALL
ALL
ALL
RHAPSODY IN MICROC
RHAPSODY IN C++
CHRONVIEW
LDRA TOOL SUITE
UML DEBUGGER
Windows
Windows
Windows
Windows
Windows
ALL
ALL
ATTOL TOOLS
VISUAL BASIC
INTERFACE
LABVIEW
IBM Corp.
IBM Corp.
Inchron GmbH
LDRA Technology, Inc.
LieberLieber Software
GmbH
MicroMax Inc.
Microsoft Corporation
ALL
ALL
ALL
ALL
ALL
ALL
ALL
ALL
ALL
ALL
ALL
ALL
CODE::BLOCKS
C++TEST
RAPITIME
DA-C
TRACEANALYZER
SIMULINK
TA INSPECTOR
UNDODB
VECTORCAST UNIT
TESTING
VECTORCAST CODE
COVERAGE
WINDOWS CE PLATF.
BUILDER
Windows
Windows
NATIONAL
INSTRUMENTS
Corporation
Open Source
Parasoft
Rapita Systems Ltd.
RistanCASE
Symtavision GmbH
The MathWorks Inc.
Timing Architects GmbH
Undo Software
Vector Software
Windows
Windows
Windows
Windows
Windows
Windows
Windows
Linux
Windows
Vector Software
Windows
Windows
Windows
72
Support
Products
Product Information
OrderNo Code
Text
LA-9570
FIRE Family Module for H8S, H8Tiny, H8/300H
FIRE-H8S
includes 512KByte Break and Emulation RAM

requires FIRE-SRAM
LA-9571
FIRE CPU Module for H8S/265x/235x/234x/224x
FIRE-M-H8S-1
QFP128, TQFP120 Adapter for

H8S/2655/2653
H8S/2357F/2357/2355/2353/2352/2351/2350
H8S/2390/2392/2394/2398
QFP128 requires ET128-QF51
TQFP120 requires ET120-QF56
H8S/2246/2245/2244/2243/2242/2241/2240
QFP100, TQFP100 requires ET100-QF49
Via Adapter LA-9635 (ET128QF51-ET100QF49)
H8S/2345/2343/2341/2340
LA-9572
FIRE CPU Module for H8S/214x/213x
FIRE-M-H8S-2

H8S/2148/2147/2144/2143/2142
H8S/2138/2137/2134/2133/2132/2130
LA-9573
FIRE CPU Module for H8S/212x
FIRE-M-H8S-3
DIL64, QFP64, TQFP80 Adapter for

H8S/2128/2127/2126/2124/2123/2122/2120
LA-9574
FIRE-M-H8S-4

H8S/2223/2225/2227/2233/2235/2236/2237/2238
QFP100 (0.65mm) requires ET100-QF06
QFP100, TQFP100 (0.5mm) requires ET100-QF49
TQFP100 (0.4mm) requires ET100-SE
LA-9575
FIRE CPU Module for H8S/2636/2639
FIRE-M-H8S-5
QFP128 Adapter for H8S/2636, H8S/2639

LA-9576
FIRE-M-H8S-6
QFP128, TQFP120 Adapter for H8S/2631/2632/2633

QFP100 Adapter for H8S/2621/2622/2623/2626
LA-9577
FIRE CPU Module for H8S/231x/232x/233x
FIRE-M-H8S-7
QFP128, TQFP120 Adapter

for H8S/2320/2322/2323/2324/2327/2328/2329
QFP144 Adapter for H8S/2332/2337/2338/2339
Via Adapter LA-9635 (ET128QF51-ET100QF49)
H8S/2310/2311/2312/2316/2318
73
Products
OrderNo Code
Text
LA-9635
Converter ET128QF51 to ET100QF49 for H8S/234x
A-H8S/234X/231X
Adapter for 235x (ET128QF51) to 234x (ET100QF49)

Converter Et128QF51 to ET100QF49
LA-9579
FIRE CPU Module for H8/3069
FIRE-M-H8S-9
H8/3006/3007/3008
H8/3044/3045/3046/3047/3048
H8/3052
H8/3060/3061/3062/3064/3065/3066/3067/3068
requires ET100-QF49 (0.5 pitch)
LA-9580
FIRE CPU Module for H8S/2612
FIRE-M-H8S-10
requires ET80-QF14 Adapter for H8S/2612
LA-9569
FIRE-M-H8S-11
H8/3664 requires ET64-QF64 or ET64-QF29

H8/3672 requires ET64-QF64
H8/36014 requires ET64-QF64
LA-9586
FIRE CPU Module for H8S/214xB/213xB
FIRE-M-H8S-12

H8S/2148/2147/2144/2143/2142
H8S/2148B/2147B/2144B/2143B/2142B
H8S/2138/2137/2134/2133/2132/2130
H8S/2138B/2137B/2134B/2133B/2132B/2130B
LA-9587
FIRE-M-H8S-13
QFP144 Adapter for

H8S/2670/2673/2674R/2675/2676
H8S/2375/2376/2377/2378
H8S/2375R/2377R/2378R
H8S/2668
LA-9588
FIRE-M-H8S-14
QFP128/QFP120 Adapter for

H8S/2365/2366/2367/2368
H8S/2365R/2367R/2368R
74
Products
Order Information
Order No.
Code
Text
LA-9570
LA-9571
LA-9572
LA-9573
LA-9574
LA-9575
LA-9576
LA-9577
LA-9635
LA-9579
LA-9580
LA-9569
LA-9586
LA-9587
LA-9588
FIRE-H8S
FIRE-M-H8S-1
FIRE-M-H8S-2
FIRE-M-H8S-3
FIRE-M-H8S-4
FIRE-M-H8S-5
FIRE-M-H8S-6
FIRE-M-H8S-7
A-H8S/234X/231X
FIRE-M-H8S-9
FIRE-M-H8S-10
FIRE-M-H8S-11
FIRE-M-H8S-12
FIRE-M-H8S-13
FIRE-M-H8S-14
FIRE Family Module for H8S, H8Tiny, H8/300H

FIRE CPU Module for H8S/265x/235x/234x/224x
FIRE CPU Module for H8S/2636/2639
Converter ET128QF51 to ET100QF49 for H8S/234x
FIRE CPU Module for H8S/2612
FIRE CPU Module for H8S/214xB/213xB
Additional Options
TO-1250
ET100-ETO-QF49
TO-1255
ET100-ETO-SE
YA-1091
ET100-EYA-QF49
ET-1092
ET100-SET-QF49
TO-1251
ET100-STO-QF49
TO-1275
ET80-ETO-QF14
TO-1276
ET80-STO-QF14
LA-7528
MON-H8

Emul. Adapter for T0 socket ET100-SE 0.4mm
Surface Mountable Adapter for ET100-QF49
Emul. Adapter TO-surface mount. ET100-QF49
Emul. Adapter TO-surface mount. ET080-QF14
ROM Monitor for H8/300H and H8S family on ESI
75
Products
76
Products
77
Products
78
Products

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FIRE Emulator for H8S and H8/300H

TRACE32 Online Help

FIRE In-Circuit Emulator ...............................................................................................................

FIRE Target Guides ....................................................................................................................

FIRE Emulator for H8S and H8/300H .....................................................................................

Quick Start ............................................................................................................................

General SYStem Settings and Restrictions .......................................................................

3.3 V power fail detection

Onchip RAM enable

Mask interrupts during assembler step

Mask interrupts during HLL step

Continue with CPU specific Special Settings and Restrictions

Special Settings and Restrictions H8S/224x/23xx/265x ...................................................

External address enable

Control of timer pulse unit

Control of 8-bit timer unit

Special Settings and Restrictions H8S/21xx .....................................................................

Restrictions for H8S/21xx

FIRE Emulator for H8S and H8/300H

Special Settings and Restrictions H8S/222x/223x/262x/263x ..........................................

Restrictions for H8S/222x/223x/262x/263x

Control of timer pulse unit

Control of 8-bit timer unit

Exception Control ................................................................................................................

Exceptions during Break Mode

Memory Classes ...................................................................................................................

State Analyzer .......................................................................................................................

Keywords for the Display

Keywords for the Emulator Trigger Unit

General H8S Keywords for the Emulator Trigger Unit

H8S/224x/23xx/265x Keywords for the Emulator Trigger Unit

H8S/21xx Keywords for the Emulator Trigger Unit

H8S/222x/223x/262x/263x Keywords for the Emulator Trigger Unit

Port Analyzer ........................................................................................................................

Port Signals H8_30XX

Port Signals H8S_212X

Port Signals H8S_213X

Port Signals H8S_214X

Port Signals H8S_222X/H8S_223X

Port Signals H8S_224X

Port Signals H8S_232X

Port Signals H8S_233X

Port Signals H8S_235X/H8S_265X

Port Signals H8S_262X

Port Signals H8S_2636

Port Signals H8S_263X

Technical Data ......................................................................................................................

FIRE Emulator for H8S and H8/300H

Realtime Operation Systems

3rd Party Tool Integrations

1989-2016 Lauterbach GmbH

FIRE Emulator for H8S and H8/300H

FIRE Emulator for H8S and H8/300H

1989-2016 Lauterbach GmbH

FIRE Emulator for H8S and H8/300H

1989-2016 Lauterbach GmbH

FIRE Emulator for H8S and H8/300H

Set cpu-type and -mode

Set system options