Design and Optimization of On-Chip Voltage Regulators For High Performance Applications
Design and Optimization of On-Chip Voltage Regulators For High Performance Applications
Design and Optimization of On-Chip Voltage Regulators For High Performance Applications
Pingqiang Zhou
School of Information Science and Technology
ShanghaiTech University, Shanghai 200031, CHINA
Email: zhoupq@shanghaitech.edu.cn
ABSTRACT1
Voltage regulators are traditionally fabricated offchip because they rely on bulky energy storage devices on
the board. Recent progress shows that it is possible to
integrate such voltage regulators on chip to improve
voltage regulation, and to potentially provide better
support for DVFS technique to reduce power consumption
in high performance multicore applications. This paper
presents an overview of the design and optimization of onchip voltage regulators for multicore applications.
INTRODUCTION
Power is a major challenge in current and future
multicore processor design, and the dynamic voltage and
frequency scaling (DVFS) technique has been widely used
to reduce power consumption in recent high-performance
multicore processors [1][3]. The varying performance
demands in the cores of a multicore processor can be best
met if DVFS is supported by providing wide range of
VDD supply from the power delivery network.
Most conventional DVFS systems are based on offchip voltage regulators driving on-chip power grids, which
comes at the cost of additional complexity and area, since
voltage regulators are built traditionally in board-level
with large inductors or capacitors. The costs and sizes of
such bulky modules severely limit their use for on-chip
voltage regulation. In addition, due to the slow response
time of the off-chip regulators, the DVFS control
algorithms have to work on coarse temporal granularity,
with voltage changes on the order of several microseconds
[4], [5]. To enable fast (on the order of tens of nanoseconds)
and fine-granularity (at the core or block level) DVFS, it
is essential to develop fully integrated on-chip voltage
regulators, which can significantly improve on-chip
voltage regulation and eliminate load-transient spikes [6].
Power efficiency is one of the most critical design
metrics for voltage regulators. The power efficiency of a
regulator can be defined as the ratio of the power delivered
to the load to the power extracted from the input source,
i.e.,
(1)
Chip
C4 Contact
Lpkg Rpkg
DC-DC
DC-DC
DC
Onpackage
decap
DC-DC
DC-DC
On-chip
voltage regulator
Power grid for one
power domain
Decap/Core
capacitance
Core load
Global GND grid
Lpkg Rpkg
C4 Contact
DESIGN
OF
REGULATORS
ON-CHIP
VOLTAGE
( + )
(2)
Vout
6CB
1
Load
2
6CB
REFERENCES
[1] S. Jain, S. Khare, S. Yada, V. Ambili, P. Salihundam,
S. Ramani, S. Muthukumar, M. Srinivasan, A. Kumar,
S. K. Gb, R. Ramanarayanan, V. Erraguntla, J.