Electronic Interface For Piezoelectric Energy Scavenging System
Electronic Interface For Piezoelectric Energy Scavenging System
Electronic Interface For Piezoelectric Energy Scavenging System
Scavenging System
E. Dallago, D. Miatton, G. Venchi V. Bottarel, G. Frattini1, G. Ricotti, M. Schipani
Department of Electrical Engineering STMicroelectronics
University of Pavia, 27100 Pavia, Italy 20010 Cornaredo, Milan, Italy
Abstract- The paper focuses on an electronic interface for output to store the harvested energy. The main limitation is
systems, called Piezoelectric Energy Scavenging Systems that the energy associated to transducer output voltages
(PESS), which convert the energy of mechanical vibrations lower than the voltage stored on CO can not be harvested.
into electrical energy using a piezoelectric transducer. The This is a big drawback because in a real environment the
output of the transducer is a strong and irregular function of mechanical vibrations and, consequently, the transducer
time hence, to obtain a suitable supply source, an AC-DC output voltage, are often an irregular function of time. For
conversion is needed. Classical rectifiers (half/full bridge or example, Fig. 1 shows the measured voltage given by a
voltage doubler) with an output storage capacitor do not fit piezoelectric transducer placed onto a car dashboard: there
very well, since they work as peak detectors, converting only
are few chances that the peaks following the one at 5
input voltages which are higher than their output voltage.
The paper shows an electronic interface which is able to
seconds could be harvested.
efficiently harvest the energy associated to the randomic Anyway, even if the source is sinusoidal, after a
voltage waveform delivered by a piezoelectric transducer. Its transient a condition is reached when energy is no longer
working principle is based on an inductive step-up converter; transfered from the transducer to the output. To realize an
an active driving circuit is used to set the phases of the efficient energy scavenging system it is necessary to
converter. The energy is stored into a capacitor which is also harvest the energy of the entire waveform.
used to supply the active elements of the step-up converter,
0.8
realizing a completely autonomous energy scavenging system.
For this reason the whole circuitry has been designed with a 0.6
Transducer Voltage [V]
0
I. INTRODUCTION
-0.2
Energy scavenging systems are used to harvest the
normally lost environmental energy and to convert it into -0.4
electrical energy. This approach can be attractive where -0.6
batteries are a bottleneck for the whole system (e.g. they 0 5 10 15 20
time [s]
have a finite life time and their replacement or recharge is Fig. 1 Voltage supplied by a piezoelectric transducer, working in
not feasible or too expensive). An energy scavenging 31-mode, placed onto a dashboard.
system, instead, is a theoretically endless energy source. In
literature many papers describe methodologies to realize The proposed solution is aimed at improving the efficiency
the energy-scavenger [1], [6], [8]. A lot of them focus on of a PESS based on a cantilever-like piezoelectric
the conversion of the energy associated to mechanical transducer working in 31-mode. The front-end circuitry
vibrations since they can be easily found in many allows positive peaks of any amplitude to be harvested
environments [1], [7]. This paper focuses on a piezoelectric indipendently of the voltage across the storage capacitor
transducer since it is one of the more efficient systems to CO; while, for negative peaks, the behaviour of the circuit
convert the energy of mechanical vibrations [1]-[2]. is the same as the standard voltage doubler.
The electrical output of the transducer is a strong and A test chip was diffused in 5V CMOS
irregular function of time [1]-[4], [9] thus an AC-DC STMicroelectronics technology and the measurements are
conversion is needed to realize a DC power supply. In presented.
literature many solutions are presented to realize this
function, mainly based on classical topologies of AC-DC II. WORKING PRINCIPLE OF THE PROPOSED SOLUTION
converters [1], [3]-[4], [9]-[11] (e.g. half/full bridge, A piezoelectric transducer can be modeled as a current
voltage doubler) with a capacitance CO connected at their source, iP, whose current is proportional to the derivative of
cantilever strain, with a capacitor CP in parallel [12].
1
Now he is with National Semiconductor s.r.l., Strada 7, R3,20089, Fig. 2a shows the block scheme of the proposed electronic
Rozzano (MI), Italy
interface while Fig. 2b is the working cycle obtained with
2
1 Q P max
E= (1)
2 CP
403
parassitic body-drain diodes of switches S1', S1'' and S3: Fig. 5 shows a detail of the voltages VO (blue trace),
they implement a passive AC-DC voltage doubler which vP (green trace) and v2 (red trace): these were measured
works during the start-up. Inductor L does not interfere with the same input conditions defined in Fig. 4.
during the passive rectification. In particular it is possible to see that along phase 2 the
Driving circuitry is presented in Fig. 3a as a block scheme, voltage vP is sinusoidal and it is due to the resonance
while Fig. 3b shows a picture of the diffused prototype; its between CP and L. In the same phase switch S2 is closed
area is equal to 320 x 360 m2. and node lx- is clamped at a voltage near to zero. It is
During phase 1 driving circuit keeps all switches open. possible to see also when S2 is opened because voltage on
Phase 2 has to start when vP reaches its maximum value node lx- gets higher than VO: from this moment on CMP2
and it ends when vP reaches zero. The first condition is closes the switches S3 and S1''. At the beginning of phase 4
detected by the Peak Detector while the second by
an oscillation of vP takes place: this is due to a resonance of
comparator CMP1. The output signals of these blocks are
routed to the SET (S) and RESET (R) input of a NAND the inductance L (which has not completely discharged into
based flip-flop which was designed to avoid the CO) with parassitic capacitances. Fig. 5 shows that CMP1
undetermined state. was designed to open S2 before vP reaches zero: in
Phase 3 has to start when the inductance current reaches its particular S2 is switched off when vP is 400mV. This was
maximum value; since it is caused by the resonance done to prevent a delayed switching off of S2, due to the
between L and CP, the current peak is reached when vP is delay of the comparator.
zero. This condition is detected by CMP1 which turns S2 Finally, Fig. 6a and Fig. 6b show the behaviour of the
off leaving node lx- floating until the voltage v2 gets higher proposed solution and of the passive voltage doubler when
than VO. At this time CMP2 switches S3 and S1'' on. The the function generator delivers a variable amplitude signal.
same comparator switches S3 and S1'' off when the current It is possible to see that the proposed solution is able to
which flows into inductance and into S3 crosses to zero. harvest the energy of peaks with amplitude lower than the
Finally phase 4 has to start when iP becomes negative. output voltage stored into CO.
Solution described in [11] has been used: the loop
implemented by operational amplifier OA1 and S1' forces
the drain to source voltage of this switch to the input offset
voltage of the operational amplifier, which was designed to
be 20 mV.
An enable signal is used to improve the response speed of
comparators CMP1 and CMP2 because they have to react
to signals whose speed is in the order of fR. The enable
signal increases the bias current of CMP1 during phase 2
and of CMP2 during phase 3. This signal has the purpose to
prevent an useless power consumption out of these phases.
The average current consumption of the whole driving
circuit is equal about 700 nA.
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4 V. CONCLUSIONS
t1 t2
A novel front-end circuit for piezoelectric energy
3 scavenging systems is presented. It is able to harvest the
energy supplied by these transducers also when they are
excited with randomic vibrations.
2 The main advantage of this solution, with respect a
classical AC-DC converter, is that it is able to recover the
VO proposed solution
VO passive voltage doubler energy associated to transducer output voltages lower than
1
the voltage on storage capacitance CO. It exploits the
working principle of the inductive step-up converter.
0 A test chip was diffused using 5V CMOS
0 10 20 30 40 STMicroelectronics technology. Experimental results show
time [s] the effectiveness of this solution with respect to a classical
Fig. 4 Comparison between output voltages when function generator gives
a sinusoidal signal. AC-DC converter both when the mechanical vibration is
sinusoidal and when it is randomic.
V. References
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Fig. 5 Detail of the voltages VO, vP and v2 during the four phases. Time Symposium on Circuits and Systems ISCAS 2007, New Orleans
scale: 10 s/div; voltage scale for all traces 1 V/div. LO, 27-30 May 2007, pp. 1633-1636.
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Function generator output
[9] J. Han, A. von Jouanne, T. Le, K. Mayaram, T. S. Fiez, "Novel
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VP Venchi, "Active Self Supplied AC-DC Converter for Piezoelectric
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Function generator output
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