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DELL Vostro A840 A860 A1088 - QUANTA VM9 VM8 UMA - REV 1A PDF

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VER : 1A
VM9/VM8 Block Diagram
A A

FAN & THERMAL POWER


Celeron M540 EMC1423-1-AIZL-TR
PG 31 REGULATOR CPU VR
POWER (478 Pin) +1.5V_RUN/+1.05V_VCCP
SYSTEM PG 37 PG 39
RESET CIRCUIT PG 35 CLOCK REGULATOR REGULATOR
SLG8SP513V +1.8V_SUS/+1.25V_RUN +3.3V_ALW/+5V_SUS/+15V_ALW
BATT (QFN-64)
PG 3,4 /+0.9V_DDR_VTT
AC/BATT CHARGER PG 36 PG 17 PG 38 PG 40
CONNECTOR 533 MHz FSB
RUN POWER SW
PG 42 +3.3V_SUS/+5V_SUS
+5V/+3.3V/+1.8V PG 41 LVDS Panel Connector
Crestline (WXGA) PG 18
965GM
B
VGA B

CRT CONN.
DDR2-SODIMM*2 533 MHZ DDR II 1299 uFCBGA PG 19
PG 15,16
PG 5,6,7,8,9,10

SATA-ODD SATA
DMI interface USB2.0 x 2
PG 28 USB conn x 2
PG 27
SATA-HDD SATA
PG 28
RTL8102EL RJ45/Magnetics
PCIE
ICH8-M (10/100) PG 34
PG 34
Bluetooth USB 2.0 676 BGA
C C
PG 26 PCIE MINI-CARD
WLAN
IHDA PG 26
PG 11,12,13,14

AUDIO/AMP
MODEM (AMOM) LPC 1394
CX20561-12Z 1394 CONN.
3-in-1 Card Reader PG 22
CX20548-11Z 33MHz PCI
TPA6017A2 PCMCIA
PG 32 PG 33 KBC IEEE1394 Card Reader CONN.
PG 21
ITE8502
18X8
Keyboard
Audio PG 23 R5C847 PG 20 PCMCIA CONN.
Audio SPK RJ-11conn PG 29 PG 21
Jacks x3
conn 2Wx1 SPI PS/2
PG 32 PG 33
PG 32
FLASH USER
Touchpad
D
2M bytes INTERFACE D

PG 20
PG 24 PG 29 QUANTA
Title
COMPUTER
Schematic Block Diagram

Size Document Number Rev


VM9/VM8 1A

Date: Friday, July 18, 2008 Sheet 1 of 53


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Table of Contents Power States


CONTROL
PAGE DESCRIPTION POWER PLANE VOLTAGE PAGE DESCRIPTION SIGNAL ACTIVE IN
1 Schematic Block Diagram
2 Front Page +PWR_SRC 10V~+19V 4,26,32,34,46,48,49,51,52,56 MAIN POWER S0~S5
3-4 Merom
+RTC_CELL +3.0V~+3.3V 11,14,31,32 RTC S0~S5
5-10 Crestline
A 11-14 ICH8M +3.3V_ALW +3.3V 3,31,32,34,36,37,38,44,46,49,52,53,54 8051 POWER ALWON S0~S5 A

15-16 DDRII SO-DIMM(200P)


+5V_ALW +5V 35,36,46,48,49,52,53,54,56 LCD/CHARGE POWER ALWON S0~S5
17 Clock Generator
18 HDMI +15V_ALW +15V 26,36,37,52,53 LARGE POWER +5V_ALW S0~S5
23 LCD Conn. & SSP
+3.3V_LAN +3.3V 42,43 LAN POWER AUX_ON
24 CRT Conn
25 SATA Conn +5V_SUS +5V 14,38,51,53 SLP_S5# CTRLD POWER SUS_ON
26-27 CARD READER/Conn & 1394
+3.3V_SUS +3.3V 3,11,12,13,14,26,30,37,38,43,48,49,51,53 SLP_S5# CTRLD POWER 3.3V_SUS_ON
28 Express Card & Smart Card
29-30 Mini Card +1.8V_SUS +1.8V 6,8,9,15,48,49,53 SODIMM POWER DDR_ON
31 SIO (ITE8512)
+0.9V_DDR_VTT +0.9V 16,49,53 SODIMM POWER 0.9V_DDR_VTT_ON
32 FLASH/RTC
33 USB +5V_RUN +5V 14,18,27,36,37,38,39,40,41,53 SLP_S3# CTRLD POWER RUN_ON
35 TP / KEYBOARD 14,18,27,36,37,38,39,40,41,53
+3.3V_RUN +3.3V SLP_S3# CTRLD POWER 3.3V_RUN_ON
36 SWITCH /LED
B 37 FAN & Thermal +1.8V_RUN +1.8V 18,38,53 SDVO POWER RUN_ON B

38-39 Audio CODEC(ALC888)/Phone Jack


+1.5V_RUN +1.5V 4,9,14,30,33,34,48,53,56 CALISTOGA/ICH8 POWER 1.5V_RUN_ON
40-41 LOM / Switch
44 System Reset Circuit +1.25V_RUN +1.25V 6,9,14,49,53 CALISTOGA/ICH8 POWER 1.25V_RUN_ON
46 Battery Selector & Charger
+1.05V_VCCP +1.05V 3,4,5,6,8,9,11,14,48,56 CPU/CALISTOGA/ICH8 POWER 1.05V_RUN_ON
48 1.05VCCP / 1.5VRUJN
49 DDR2_1.8VSUS, 0.9V +VCC_CORE +0.7V~+1.77V 4,51,56 CPU CORE POWER IMVP_VR_ON
51 CPU_ISL6266(2phase) LCDVCC_TST_EN
+LCDVCC +3.3V 26 LCD Power & ENVDD
52 MAX8744 (+5.5V,+3,3V)
53 RUN Power Switch +5V_MOD +5V 36 Module Power MODC_EN#
54 DCIN,Batt
+5V_HDD +5V 36 HDD Power HDDC_EN#
55 PAD& SCREW
56 EMI CAP +PBATT +10V~+17V MAIN BATTERY CHG_PBATT
57 SMBUS BLOCK
+SBATT +10V~+17V SECOND BATTERY CHG_SBATT
58 Power Block Dianram
C C

GND PLANE PAGE DESCRIPTION


8731AGND
46
AGND_0.9V
49
AGND_DC/DC
52
AGND_DC2
48
AGND_DDR
49
AGND_ISL6260
51

GND ALL

D D

QUANTA
Title
COMPUTER
Index & Power Status

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, May 27, 2008 Sheet 2 of 53


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H_A#[3..16] U22A H_D#[0..63] U22B H_D#[0..63]


5 H_A#[3..16] 5 H_D#[0..63] H_D#[0..63] 5
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
H_A#4 A[3]# ADS# H_ADS# 5 H_D#1 D[0]# D[32]# H_D#33
L5 A[4]# BNR# E2 H_BNR# 5 F24 D[1]# D[33]# AB24
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
H_A#6 A[5]# BPRI# H_BPRI# 5 H_D#3 D[2]# D[34]# H_D#35
K5 A[6]# G22 D[3]# D[35]# V26
H_A#7 M3 H5 H_D#4 F23 V23 H_D#36
A[7]# DEFER# H_DEFER# 5 D[4]# D[36]#
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
H_A#9 A[8]# DRDY# H_DRDY# 5 H_D#6 D[5]# D[37]# H_D#38
J1 A[9]# DBSY# E1 H_DBSY# 5 E25 D[6]# D[38]# U25
H_A#10 N3 +1.05V_VCCP H_D#7 E23 U23 H_D#39
A[10]# H_BR0# 5 D[7]# D[39]#

ADDR GROUP 0

DATA GRP 0
H_A#11 Layout Note: H_D#8 H_D#40

DATA GRP 2
P5 A[11]# BR0# F1 K24 D[8]# D[40]# Y25
H_A#12 P2 R62 56 Place R44 H_D#9 G24 W22 H_D#41
A[12]# D[9]# D[41]#

1
H_A#13 L2 D20 H_IERR# 1 2 H_D#10 J24 Y23 H_D#42
+1.05V_VCCP

CONTROL
A
H_A#14 P4
A[13]# IERR#
B3 R40 close to H_D#11 J23
D[10]# D[42]#
W24 H_D#43 A
A[14]# INIT# H_INIT# 11 D[11]# D[43]#
H_A#15 P1 H_LOCK# 5
51/F CPU. H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1
M1
A[16]# LOCK# H4 10 H_D#14
F26
K22
D[13]# D[45]# AA23
AA24 H_D#46
5 H_ADSTB#0

2
H_REQ#[0..4] ADSTB[0]# R41 H_D#15 D[14]# D[46]# H_D#47
5 H_REQ#[0..4] RESET# C1 1 2 0 0603 H_RESET# 5 H23 D[15]# D[47]# AB25
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 5 5 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 5
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 5 5 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 5
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 5 5 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 5
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 5 H_D#[0..63] H_D#[0..63]
H_REQ#4 L1
H_A#[17..35] REQ[4]# 5 H_D#[0..63] H_D#[0..63] 5
G6 H_D#16 N22 AE24 H_D#48
5 H_A#[17..35] HIT# H_HIT# 5 D[16]# D[48]#
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 5 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AB22
H_A#20 W6 AD3 Layout Note: H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#

ADDR GROUP 1
H_A#21 U4 AD1 H_D#21 M24 AC26 H_D#53
Place voltage

XDP/ITP SIGNALS
H_A#22 A[21]# BPM[2]# H_D#22 D[21]# D[53]# H_D#54
Y5 AC4 L22 AD20
A[22]# BPM[3]# divider within D[22]# D[54]#

DATA GRP 1
H_A#23 H_D#23 H_D#55

DATA GRP 3
U1 A[23]# PRDY# AC2 M23 D[23]# D[55]# AE22
H_A#24 R4 AC1 0.5" of GTLREF H_D#24 P25 AF23 H_D#56
H_A#25 A[24]# PREQ# ITP_TCK H_D#25 D[24]# D[56]# H_D#57
T5 A[25]# TCK AC5 pin P23 D[25]# D[57]# AC25
H_A#26 T3 AA6 ITP_TDI H_D#26 P22 AE21 H_D#58
H_A#27 A[26]# TDI ITP_TDO H_D#27 D[26]# D[58]# H_D#59
W2 A[27]# TDO AB3 T24 D[27]# D[59]# AD21
H_A#28 W5 AB5 ITP_TMS +1.05V_VCCP H_D#28 R24 AC22 H_D#60
H_A#29 A[28]# TMS ITP_TRST# H_D#29 D[28]# D[60]# H_D#61
Y4 A[29]# TRST# AB6 L25 D[29]# D[61]# AD23
H_A#30 U2 C20 ITP_DBRESET# H_D#30 T25 AF22 H_D#62
A[30]# DBR# ITP_DBRESET# 13 D[30]# D[62]#

2
H_A#31 V4 H_D#31 N25 AC23 H_D#63
H_A#32 A[31]# R67 R380 D[31]# D[63]#
W3 A[32]# 56 5 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 5
H_A#33 AA4 THERMAL 2 1 1K/F M26 AF24
A[33]# +1.05V_VCCP 5 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 5
H_A#34 AB2 N24 AC20
A[34]# 5 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 5
B H_A#35 AA3 D21 H_PROCHOT# B
PAD T3

1
A[35]# PROCHOT# H_THERMDA V_CPU_GTLREF COMP0
5 H_ADSTB#1 V1 ADSTB[1]# THERMDA A24 H_THERMDA 31 AD26 GTLREF COMP[0] R26 Note:
B25 H_THERMDC CPU_TEST1 C23 MISC COMP[1] U26 COMP1 H_DPRTSTP need to daisy chain
THERMDC H_THERMDC 31 TEST1

1
A6 CPU_TEST2 D25 AA1 COMP2
11 H_A20M# A20M# TEST2 COMP[2] from ICH8 to IMVP6 to CPU.
A5 C7 H_THERM R379 CPU_TEST3 C24 Y1 COMP3
11 H_FERR# FERR# THERMTRIP# TEST3 COMP[3]
ICH

C4 R44 56 2K/F CPU_TEST4 AF26


11 H_IGNNE# IGNNE# TEST4
1 2 CPU_TEST5 AF1 E5
+1.05V_VCCP TEST5 DPRSTP# H_DPRSTP# 6,11,39
D5 H CLK CPU_TEST6 A26 B5

2
11 H_STPCLK# STPCLK# TEST6 DPSLP# H_DPSLP# 11
11 H_INTR C6 LINT0 DPWR# D24 H_DPWR# 5
11 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 17 6,17 CPU_MCH_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGOOD 11
11 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 17 6,17 CPU_MCH_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 5
6,17 CPU_MCH_BSEL2 C21 BSEL[2] PSI# AE6 H_PSI# 39
M4 RSVD[01]
N5 RSVD[02]
T2 C487 *2200P_NC 47387-4784
RSVD[03] H_THERMDA H_THERMDC R75 *1K/F_NC
V3 RSVD[04] 1 2
RESERVED

B2 2 1 CPU_TEST1
RSVD[05] 50 R74 *1K/F_NC PAD T145 CPU_TEST3
C3 RSVD[06]
D2 Voltage Level shift 2 1 CPU_TEST2 PAD T146 CPU_TEST5
RSVD[07] C509 *0.1U_NC
D22 RSVD[08]
For EA test use D3 +1.05V_VCCP +3.3V_ALW 2 1 CPU_TEST4 For the purpose of testability, route these signals
RSVD[09]
F6 RSVD[10] through a ground referenced Z0 = 55ohm trace that
H_DSTBN#0 10
ET11 1 For EA test use CPU_TEST6 ends in a via that is near a GND via and is

2
H_DSTBN#2 R373 *0_NC
ET17 1
ET16 1 H_DSTBP#2
ET5 1 H_ADSTB#0 accessible through an oscilloscope connection.
1 H_D#41 47387-4784 1 H_A#14 R50 Place C close to the
ET15 H_DSTBN#3 ET12 H_A#16
1 1 *2.2K_NC CPU_TEST4 pin. Make sure
ET22 ET1

2
1 H_DSTBP#3 1 H_ADSTB#1

1
ET21 H_D#50 ET4 H_A#21 CPU_TEST4 routing is
ET20 1 ET6 1
ET19 1 H_D#58
ET7 1 H_A#26 H_PROCHOT# 1 3 CPU_PROCHOT#
reference to GND and away FSB BCLK BSEL2 BSEL1 BSEL0
C C
from other noisy signal.
Q7 533 133 0 0 1
*2N7002W_NC
Populate ITP700Flex for bringup 667 166 0 1 1
+3.3V_RUN 800 200 0 1 0
H_THERMTRIP# 6,23,31,40
R19

+1.05V_VCCP 2 1 ITP_TDI 4
R51 COMP0
150 10M COMP1
3
R18 Q5 COMP2
2 1 ITP_TMS 2 2N7002W COMP3
3

39/F
1

H_THERM 2
R13
1

2
C68
2 1 ITP_TDO Q6 0.1U R36 R35 R38 R42
1

MMST3904-7-F 10 54.9/F 27.4/F 54.9/F 27.4/F


51

1
R3 150
2 1 ITP_DBRESET# Comp0,2 connect with Zo=27.4ohm,Comp1,3
+3.3V_SUS
connect with Zo=55ohm, make those traces
Signal ITP disable guidelines length shorter than 0.5".Trace should be
at least 25 mils away from any other
R15 27/F TDI Resistor Value toggling signal.
ITP_TCK 2 1
D TMS 150 ohm +/- 5% Connect To Resistor Placement D

R16 649/F TRST# 39 ohm +/- 5% VTT Within 2.0" of the ITP
ITP_TRST# 2 1

Layout Note:
TCK 680 ohm +/- 5% VTT Within 2.0" of the ITP QUANTA
Place R74,R26,
R19, R23, R16
TDO
ITP_EN
Open
27 ohm +/- 5% GND
GND
Within 2.0" of the ITP
Within 2.0" of the ITP Title
COMPUTER
, R17 close to CPU Merom Processor (HOST BUS)
R268 Depop VTT Within 2.0" of the ITP
Size Document Number Rev
+3VRUN Close to CK410M Pin8 VM9/VM8 1A

Date: Monday, June 23, 2008 Sheet 3 of 53


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+VCC_CORE +VCC_CORE U22D


U22C A4 P6
VSS[001] VSS[082]
A7 VCC[001] VCC[068] AB20 A8 VSS[002] VSS[083] P21
A9 VCC[002] VCC[069] AB7 A11 VSS[003] VSS[084] P24
+VCC_CORE All use 10U 4V(+-20%,X6S,0805)Pb-Free. A10 VCC[003] VCC[070] AC7 A14 VSS[004] VSS[085] R2
A12 VCC[004] VCC[071] AC9 A16 VSS[005] VSS[086] R5
55 A13
A15
VCC[005] VCC[072] AC12
AC13
A19
A23
VSS[006] VSS[087] R22
R25
VCC[006] VCC[073] VSS[007] VSS[088]
1

1
A17 VCC[007] VCC[074] AC15 AF2 VSS[008] VSS[089] T1
C50 C49 C48 C47 C46 A18 AC17 B6 T4
*10U_NC 10U 10U 10U 10U VCC[008] VCC[075] VSS[009] VSS[090]
A20 AC18 B8 T23
2

2
A
0805 0805 0805 0805 0805 VCC[009] VCC[076] VSS[010] VSS[091] A
B7 VCC[010] VCC[077] AD7 B11 VSS[011] VSS[092] T26
4 4 4 4 4 B9 AD9 B13 U3
VCC[011] VCC[078] VSS[012] VSS[093]
B10 VCC[012] VCC[079] AD10 B16 VSS[013] VSS[094] U6
B12 VCC[013] VCC[080] AD12 B19 VSS[014] VSS[095] U21
+VCC_CORE B14 AD14 B21 U24
VCC[014] VCC[081] VSS[015] VSS[096]
55 B15
B17
VCC[015] VCC[082] AD15
AD17
B24
C5
VSS[016] VSS[097] V2
V5
VCC[016] VCC[083] VSS[017] VSS[098]
B18 VCC[017] VCC[084] AD18 C8 VSS[018] VSS[099] V22
1

1
B20 VCC[018] VCC[085] AE9 C11 VSS[019] VSS[100] V25
C45 C44 C43 C52 C53 C9 AE10 C14 W1
10U 10U *10U_NC 10U 10U VCC[019] VCC[086] VSS[020] VSS[101]
C10 AE12 C16 W4
2

2
0805 0805 0805 0805 0805 VCC[020] VCC[087] VSS[021] VSS[102]
C12 VCC[021] VCC[088] AE13 C19 VSS[022] VSS[103] W23
4 4 4 4 4 C13 AE15 C2 W26
VCC[022] VCC[089] VSS[023] VSS[104]
C15 VCC[023] VCC[090] AE17 C22 VSS[024] VSS[105] Y3
8 inside cavity, north side, secondary layer. C17 VCC[024] VCC[091] AE18 C25 VSS[025] VSS[106] Y6
C18 VCC[025] VCC[092] AE20 D1 VSS[026] VSS[107] Y21
D9 VCC[026] VCC[093] AF9 D4 VSS[027] VSS[108] Y24
+VCC_CORE D10 AF10 D8 AA2
VCC[027] VCC[094] VSS[028] VSS[109]
D12 VCC[028] VCC[095] AF12 D11 VSS[029] VSS[110] AA5
D14 VCC[029] VCC[096] AF14 D13 VSS[030] VSS[111] AA8
D15 VCC[030] VCC[097] AF15 D16 VSS[031] VSS[112] AA11
1

1
D17 VCC[031] VCC[098] AF17 D19 VSS[032] VSS[113] AA14
C71 C76 C73 C503 C60 D18 AF18 D23 AA16
10U 10U 10U 10U 10U VCC[032] VCC[099] +1.05V_VCCP VSS[033] VSS[114]
E7 AF20 D26 AA19
2

2
0805 0805 0805 0805 0805 VCC[033] VCC[100] VSS[034] VSS[115]
4 4 4 4 4
E9
E10
VCC[034]
G21
55 E3
E6
VSS[035] VSS[116] AA22
AA25
VCC[035] VCCP[01] VSS[036] VSS[117]
E12 VCC[036] VCCP[02] V6 E8 VSS[037] VSS[118] AB1

1
E13 VCC[037] VCCP[03] J6 E11 VSS[038] VSS[119] AB4
+VCC_CORE E15 K6 + C502 E14 AB8
VCC[038] VCCP[04] 220U VSS[039] VSS[120]
B E17 VCC[039] VCCP[05] M6 E16 VSS[040] VSS[121] AB11 B
E18 J21 7343 E19 AB13

2
VCC[040] VCCP[06] 2.5 VSS[041] VSS[122]
E20 VCC[041] VCCP[07] K21 E21 VSS[042] VSS[123] AB16
1

1
F7 VCC[042] VCCP[08] M21 E24 VSS[043] VSS[124] AB19
C499 C500 C69 C496 C497 F9 N21 F5 AB23
*10U_NC *10U_NC *10U_NC *10U_NC *10U_NC VCC[043] VCCP[09] VSS[044] VSS[125]
F10 N6 F8 AB26
2

2
0805 0805 0805 0805 0805 VCC[044] VCCP[10] VSS[045] VSS[126]
F12 VCC[045] VCCP[11] R21 F11 VSS[046] VSS[127] AC3
4 4 4 4 4 F14 R6 +1.5V_RUN F13 AC6
VCC[046] VCCP[12] VSS[047] VSS[128]
F15 VCC[047] VCCP[13] T21 F16 VSS[048] VSS[129] AC8
8 inside cavity, south side, secondary layer. F17 VCC[048] VCCP[14] T6 F19 VSS[049] VSS[130] AC11
F18 VCC[049] VCCP[15] V21 F2 VSS[050] VSS[131] AC14
F20 VCC[050] VCCP[16] W21 F22 VSS[051] VSS[132] AC16
AA7 VCC[051] F25 VSS[052] VSS[133] AC19
+VCC_CORE
55 AA9
AA10
VCC[052] VCCA[01] B26
C26
G4
G1
VSS[053] VSS[134] AC21
AC24
VCC[053] VCCA[02] VSS[054] VSS[135]
AA12 VCC[054] G23 VSS[055] VSS[136] AD2

1
AA13 AD6 C493 C494 G26 AD5
VCC[055] VID[0] VID0 39 VSS[056] VSS[137]
1

AA15 AF5 0.01U 10U H3 AD8


VCC[056] VID[1] VID1 39 VSS[057] VSS[138]
C74 C498 C66 C72 C70 C495 AA17 AE5 0805 H6 AD11
VID2 39

2
10U 10U 10U 10U 10U 10U VCC[057] VID[2] 25 4 VSS[058] VSS[139]
AA18 AF4 H21 AD13
2

VCC[058] VID[3] VID3 39 VSS[059] VSS[140]


0805 0805 0805 0805 0805 0805 AA20 AE3 H24 AD16
VCC[059] VID[4] VID4 39 VSS[060] VSS[141]
4 4 4 4 4 4 AB9 AF3 J2 AD19
VCC[060] VID[5] VID5 39 VSS[061] VSS[142]
AC10 VCC[061] VID[6] AE2 VID6 39 J5 VSS[062] VSS[143] AD22
6 inside cavity, north side, primary layer. AB10 VCC[062] J22 VSS[063] VSS[144] AD25
AB12 VCC[063]
Layout Note: J25 VSS[064] VSS[145] AE1
AB14 AF7 VCCSENSE Place C468 near PIN K1 AE4
VCC[064] VCCSENSE VCCSENSE 39 VSS[065] VSS[146]
+VCC_CORE AB15 K4 AE8
AB17
VCC[065] B26. K23
VSS[066] VSS[147]
AE11
VCC[066] VSSSENSE VSS[067] VSS[148]
AB18 VCC[067] VSSSENSE AE7 VSSSENSE 39 K26 VSS[068] VSS[149] AE14
L3 VSS[069] VSS[150] AE16
1

C C
47387-4784 L6 AE19
C508 C507 C506 C504 C505 C75 VSS[070] VSS[151]
. L21 VSS[071] VSS[152] AE23
10U 10U 10U 10U 10U 10U L24 AE26
2

0805 0805 0805 0805 0805 0805 +VCC_CORE VSS[072] VSS[153]


M2 VSS[073] VSS[154] A2
4 4 4 4 4 4 M5 AF6
VSS[074] VSS[155]

1
M22 VSS[075] VSS[156] AF8
6 inside cavity, south side, primary layer. R32 M25 VSS[076] VSS[157] AF11
100/F N1 AF13
VSS[077] VSS[158]
N4 VSS[078] VSS[159] AF16
N23 AF19

2
VSS[079] VSS[160]
N26 VSS[080] VSS[161] AF21
VCCSENSE P3 A25
VSSSENSE VSS[081] VSS[162]
VSS[163] AF25
+PWR_SRC

1
+1.05V_VCCP 47387-4784
R33 .
100/F
63 + C523 + C519 + C518
1

100U *100U_NC *100U_NC

2
C55 C56 C54 C65 C58 C64 25 25 25
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
2

10 10 10 10 10 10 Route VCCSENSE and VSSSENSE


Layout Note: traces at 27.4ohms and
Layout out: Need to add 100uF cap on PWR_SRC for cap singing. length matched to within 25
Place these inside socket cavity on North side secondary. Place on PWR_SRC near +VCC_CORE. mil. Place PU and PD within
2 inch of CPU.
D D

QUANTA
Title
COMPUTER
Merom Processor (POWER)

Size Document Number Rev


VM9/VM8 1A

Date: Friday, May 30, 2008 Sheet 4 of 53


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U20A H_A#[3..35]
H_D#[0..63] H_A#[3..35] 3
J13 H_A#3
3 H_D#[0..63] H_A#_3
H_D#0 E2 B11 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
A
G2 H_D#_1 H_A#_5 C11 A
H_D#2 G7 M11 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
M6 H_D#_3 H_A#_7 C15
H_D#4 H7 F16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H3 H_D#_5 H_A#_9 L13
H_D#6 G4 G17 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
F3 H_D#_7 H_A#_11 C14
H_D#8 N8 K16 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
H2 H_D#_9 H_A#_13 B13
H_D#10 M10 L16 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
N12 H_D#_11 H_A#_15 J17
H_D#12 N9 B14 H_A#16
+1.05V_VCCP H_D#13 H_D#_12 H_A#_16 H_A#17
H5 H_D#_13 H_A#_17 K19
H_D#14 P13 P15 H_A#18
H_D#15 H_D#_14 H_A#_18 H_A#19
K9 H_D#_15 H_A#_19 R17
H_D#16 M2 B16 H_A#20
H_D#_16 H_A#_20
1

H_D#17 W10 H20 H_A#21 +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP


R93 H_D#18 H_D#_17 H_A#_21 H_A#22
Y8 H_D#_18 H_A#_22 L19
221/F H_D#19 V4 D17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
M3 H_D#_20 H_A#_24 M17

2
H_D#21 J1 N16 H_A#25
2

H_SWING H_D#22 H_D#_21 H_A#_25 H_A#26 C131 C113 C145 C142


N5 H_D#_22 H_A#_26 J19
H_D#23 N3 B18 H_A#27 *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC

1
H_D#_23 H_A#_27
1

H_D#24 W6 E19 H_A#28


H_D#_24 H_A#_28
2

R92 H_D#25 W9 B17 H_A#29 10 10 10 10


100/F C107 H_D#26 H_D#_25 H_A#_29 H_A#30
N2 H_D#_26 H_A#_30 B15
0.1U H_D#27 Y7 E17 H_A#31
1

H_D#28 H_D#_27 H_A#_31 H_A#32


Y9 C18
2

10 H_D#29 H_D#_28 H_A#_32 H_A#33


P4 H_D#_29 H_A#_33 A19
H_D#30 W3 B19 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
B N1 H_D#_31 H_A#_35 N19 B
H_D#32 AD12 +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP
H_D#33 H_D#_32
AE3 H_D#_33 H_ADS# G12 H_ADS# 3
H_D#34 AD9 H17
H_D#_34 H_ADSTB#_0 H_ADSTB#0 3
H_D#35 AC9 G20
H_D#_35 H_ADSTB#_1 H_ADSTB#1 3

2
HOST
H_D#36 AC7 C8
H_D#_36 H_BNR# H_BNR# 3
+1.05V_VCCP H_D#37 AC14 E8 C141 C165 C159
H_D#_37 H_BPRI# H_BPRI# 3
H_D#38 AD11 F12 *0.1U_NC *0.1U_NC *0.1U_NC

1
H_D#_38 H_BREQ# H_BR0# 3
H_D#39 AC11 D6
H_D#_39 H_DEFER# H_DEFER# 3
H_D#40 AB2 C10 10 10 10
H_D#_40 H_DBSY# H_DBSY# 3
H_D#41 AD7 AM5
H_D#_41 HPLL_CLK CLK_MCH_BCLK 17
2

H_D#42 AB1 AM7


H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 17
R141 R139 H_D#43 Y3 H8
H_D#_43 H_DPWR# H_DPWR# 3
54.9/F 54.9/F H_D#44 AC6 K7 Layout Note:
H_D#_44 H_DRDY# H_DRDY# 3
H_D#45 AE2 E4 C131 should be near AB1,AB2,AC2,Y3
H_D#_45 H_HIT# H_HIT# 3
H_D#46 AC5 C6
1

H_SCOMP H_D#47 H_D#_46 H_HITM# H_HITM# 3


AG3 H_D#_47 H_LOCK# G10 H_LOCK# 3
H_SCOMP# H_D#48 AJ9 B7 H_TRDY# 3
C90 should be near AD2,AE2,AG3,AE3
H_D#49 H_D#_48 H_TRDY#
AH8 H_D#_49
H_RCOMP H_D#50 AJ14
H_D#51 H_D#_50 C113 should be near
AE9 H_D#_51
2

H_D#52 AE11 AC5,AC6,AD7,AC7,AC9,AD9,AD11,AC11,AD12,AD13,AC14


R91 H_D#53 H_D#_52
AH12 H_D#_53 H_DINV#_0 K5 H_DINV#0 3
24.9/F H_D#54 AJ5 L2 C127 should be near E2,F3,H2,H3,G4,H5,G7,H7
H_D#_54 H_DINV#_1 H_DINV#1 3
H_D#55 AH5 AD13
H_D#_55 H_DINV#_2 H_DINV#2 3
Layout Note: H_D#56 AJ6 AE13
1

H_D#57 H_D#_56 H_DINV#_3 H_DINV#3 3 C129 should be near


H_RCOMP trace should be AE7 H_D#_57
H_D#58 AJ7 M7 M6,L7,K9,M7,N8,N9,M10,M11,N12,P13
10-mil wide with 20-mil H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#0 3
AJ2 H_D#_59 H_DSTBN#_1 K3 H_DSTBN#1 3
spacing. H_D#60 AE5 AD2 H_DSTBN#2 3
C
H_D#61 H_D#_60 H_DSTBN#_2 C149 should be near C
AJ3 H_D#_61 H_DSTBN#_3 AH11 H_DSTBN#3 3
H_D#62 AH2 H_D#_62
H13,J13,L13,M14,L16,K16,J17,H17
H_D#63 AH13 L7
H_D#_63 H_DSTBP#_0 H_DSTBP#0 3
H_DSTBP#_1 K2 H_DSTBP#1 3 C146 should be near
H_DSTBP#_2 AC2 H_DSTBP#2 3
H_SWING B3 AJ10 E13,G17,F16,C15,B14,C11,B11,A11,B12
+1.05V_VCCP H_SWING H_DSTBP#_3 H_DSTBP#3 3
H_RCOMP C2 H_RCOMP
H_REQ#_0 M14 H_REQ#0 3
H_SCOMP W1 E13
H_SCOMP H_REQ#_1 H_REQ#1 3
2

H_SCOMP# W2 A11
H_SCOMP# H_REQ#_2 H_REQ#2 3
R94 H13
H_REQ#_3 H_REQ#3 3
1K/F B6 B12
3 H_RESET# H_CPURST# H_REQ#_4 H_REQ#4 3
3 H_CPUSLP# E5 H_CPUSLP#
E12
1

H_RS#_0 H_RS#0 3
H_RS#_1 D7 H_RS#1 3
H_RS#_2 D8 H_RS#2 3
H_REF B9 H_AVREF
A9 H_DVREF
1

R96 C121 LE82GM965-SLA5T-MM#891181


2K/F 0.1U
2

10
2

Layout Note:
Place the 0.1 uF
decoupling capacitor For EA test use 76
D D
within 100 mils from
GMCH pins. 1 H_DSTBP#0
ET10
1 H_D#7
ET2
ET14
ET9
1
1
H_D#12
H_DSTBN#1
QUANTA
H_DSTBP#1
ET8
ET13
1
1
1
H_D#29
H_D#21 Title
COMPUTER
ET3
1 H_D#32 Crestline (HOST)
ET18
Size Document Number Rev
VM9/VM8 1A

Date: Monday, June 02, 2008 Sheet 5 of 53


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U20B U20C +VCC_PEG

+1.8V_SUS P36 J40 R126 24.9/F


RSVD1 18 BIA_PWM L_BKLT_CTRL
P37 RSVD2 SM_CK_0 AV29 M_CLK_DDR0 15 23 PANEL_BKEN H39 L_BKLT_EN PEG_COMPI N43 VCC3G_PCIE_R 1 2

2
R35 RSVD3 SM_CK_1 BB23 M_CLK_DDR1 15 E39 L_CTRL_CLK PEG_COMPO M43
R179 N35 BA25 E40
RSVD4 SM_CK_3 M_CLK_DDR3 15 L_CTRL_DATA
1K/F AR12 AV23 L_IBG LCD_DDCCLK C37
RSVD5 SM_CK_4 M_CLK_DDR4 15 18 LCD_DDCCLK L_DDC_CLK
AR13 LCD_DDCDAT D35 J51
RSVD6 18 LCD_DDCDAT L_DDC_DATA PEG_RX#_0

2
AM12 AW30 K40 L51

1
RSVD7 SM_CK#_0 M_CLK_DDR#0 15 18 ENVDD L_VDD_EN PEG_RX#_1
SM_RCOMP_VOH AN13 BA23 R123 N47
RSVD8 SM_CK#_1 M_CLK_DDR#1 15 PEG_RX#_2
J12 AW25 2.4K/F L_IBG L41 T45
RSVD9 SM_CK#_3 M_CLK_DDR#3 15 LVDS_IBG PEG_RX#_3
1

1
C238 C232 AR37 AW23 PAD T21 L43 T50
RSVD10 SM_CK#_4 M_CLK_DDR#4 15 LVDS_VBG PEG_RX#_4
0.01U 2.2U AM36 N41 U40

1
A
0805 R178 RSVD11 LVDS_VREFH PEG_RX#_5 A
AL36 BE29 N40 Y44
2

RSVD12 SM_CKE_0 DDR_CKE0_DIMMA 15,16 LVDS_VREFL PEG_RX#_6


25 10 3.01K/F AM37 AY32 D46 Y40
RSVD13 SM_CKE_1 DDR_CKE1_DIMMA 15,16 18 LCD_ACLK- LVDSA_CLK# PEG_RX#_7
2 D20 RSVD14 SM_CKE_3 BD39 DDR_CKE3_DIMMB 15,16 UMA 18 LCD_ACLK+ C45 LVDSA_CLK PEG_RX#_8 AB51

MUXING
SM_CKE_4 BG37 DDR_CKE4_DIMMB 15,16 PAD T19 D44 LVDSB_CLK# PEG_RX#_9 W49
SM_RCOMP_VOL E42 AD44
PAD T11 LVDSB_CLK PEG_RX#_10

LVDS
SM_CS#_0 BG20 DDR_CS0_DIMMA# 7,15,16 PEG_RX#_11 AD40
1

C241 C237 BK16 G51 AG46


SM_CS#_1 DDR_CS1_DIMMA# 15,16 18 LCD_A0- LVDSA_DATA#_0 PEG_RX#_12
0.01U 2.2U R175 BG16 +1.8V_SUS E51 AH49
SM_CS#_2 DDR_CS2_DIMMB# 15,16 18 LCD_A1- LVDSA_DATA#_1 PEG_RX#_13
0805 1K/F H10 BE13 F49 AG45
2

RSVD20 SM_CS#_3 DDR_CS3_DIMMB# 7,15,16 18 LCD_A2- LVDSA_DATA#_2 PEG_RX#_14


25 10 B51 AG41
RSVD21 PEG_RX#_15

1
BJ20 BH18
1

RSVD22 SM_ODT_0 M_ODT0 15,16

RSVD

GRAPHICS
BK22 RSVD23 SM_ODT_1 BJ15 M_ODT1 15,16 18 LCD_A0+ G50 LVDSA_DATA_0 PEG_RX_0 J50
BF19 BJ14 R180 E50 L50
RSVD24 SM_ODT_2 M_ODT2 15,16 18 LCD_A1+ LVDSA_DATA_1 PEG_RX_1

DDR
BH20 BE16 20/F F48 M47
RSVD25 SM_ODT_3 M_ODT3 15,16 18 LCD_A2+ LVDSA_DATA_2 PEG_RX_2
Santa Rosa Platform MOW WW15 BK18 U44

2
RSVD26 SMRCOMPP SMRCOMPP PEG_RX_3
For 4Gb DRAM support, BJ18 RSVD27 SM_RCOMP BL15 PEG_RX_4 T49
BF23 BK14 SMRCOMPN SMRCOMPN G44 T41
change Pin-BJ29 to DDR_A_MA14, RSVD28 SM_RCOMP# PAD T14 LVDSB_DATA#_0 PEG_RX_5
BG23 RSVD29 PAD T4 B47 LVDSB_DATA#_1 PEG_RX_6 W45

1
change Pin-BE24 to DDR_B_MA14. BC23 BK31 SM_RCOMP_VOH
PAD T6 B45 W41
RSVD30 SM_RCOMP_VOH SM_RCOMP_VOL LVDSB_DATA#_2 PEG_RX_7
BD24 RSVD31 SM_RCOMP_VOL BL31 PEG_RX_8 AB50
BJ29 R177 Y48
15,16 DDR_A_MA14 RSVD32 PEG_RX_9
BE24 AR49 V_DDR_MCH_REF 20/F PAD T9 E44 AC45
15,16 DDR_B_MA14 RSVD33 SM_VREF_0 LVDSB_DATA_0 PEG_RX_10
BH39 AW4 PAD T5 A47 AC41

2
RSVD34 SM_VREF_1 LVDSB_DATA_1 PEG_RX_11
AW20 RSVD35 PAD T7 A45 LVDSB_DATA_2 PEG_RX_12 AH47
+3.3V_RUN BK20 AG49
RSVD36 PEG_RX_13
C48 7 AH45

PCI-EXPRESS
R125 1 PM_EXTTS#0 RSVD37 PEG_RX_14
2 10K D47 RSVD38 DPLL_REF_CLK B42 MCH_DREFCLK 17 PEG_RX_15 AG42
R121 1 2 10K PM_EXTTS#1 B44 C42
RSVD39 DPLL_REF_CLK# MCH_DREFCLK# 17 +1.25V_RUN R6 75/F
C44 RSVD40 DPLL_REF_SSCLK H48 DREF_SSCLK 17
E27 TVA_DAC PEG_TX#_0 N45
B A35 H47 R8 75/F G27 U39 B
CLK
RSVD41 DPLL_REF_SSCLK# DREF_SSCLK# 17 R14 75/F TVB_DAC PEG_TX#_1
B37 RSVD42 Non-iAMT K27 TVC_DAC PEG_TX#_2 U47

2
+1.05V_VCCP B36 K44 N51
RSVD43 PEG_CLK CLK_MCH_3GPLL 17 PEG_TX#_3

TV
56 B34 K45 R166 F27 R50
RSVD44 PEG_CLK# CLK_MCH_3GPLL# 17 TVA_RTN PEG_TX#_4
R132 1 THERMTRIP_MCH# 1K/F
2 C34 RSVD45 21 J27
L27
TVB_RTN PEG_TX#_5 T42
Y43
TVC_RTN PEG_TX#_6
W46

1
MCH_CLVREF PEG_TX#_7
Layout Note: DMI_RXN_0 AN47 DMI_MRX_ITX_N0 12 M35 TV_DCONSEL_0 PEG_TX#_8 W38
Location of all MCH_CFG strap DMI_RXN_1 AJ38 DMI_MRX_ITX_N1 12 P33 TV_DCONSEL_1 PEG_TX#_9 AD39

1
AN42 DMI_MRX_ITX_N2 12 AC46
resistors needs to be close to DMI_RXN_2 PEG_TX#_10

2
AN46 C214 R165 AC49
minmize stub. DMI_RXN_3 DMI_MRX_ITX_N3 12 PEG_TX#_11
0.1U 392/F AC42
PEG_TX#_12
AM47 AH39

1
DMI_RXP_0 DMI_MRX_ITX_P0 12 PEG_TX#_13
P27 AJ39 10 AE49
3,17 CPU_MCH_BSEL0 DMI_MRX_ITX_P1 12

2
CFG_0 DMI_RXP_1 PEG_TX#_14
3,17 CPU_MCH_BSEL1 N27 CFG_1 DMI_RXP_2 AN41 DMI_MRX_ITX_P2 12 PEG_TX#_15 AH44
3,17 CPU_MCH_BSEL2 N24 CFG_2 DMI_RXP_3 AN45 DMI_MRX_ITX_P3 12
PAD T15 CFG3 C21 VGA_BLU H32 M45
CFG_3 19 VGA_BLU CRT_BLUE PEG_TX_0
PAD T140 CFG4 C23 AJ46 G32 T38
DMI

CFG_4 DMI_TXN_0 DMI_MTX_IRX_N0 12 CRT_BLUE# PEG_TX_1


R117 2 1 *4.02K/F_NCCFG5 F23 AJ41 VGA_GRN K29 T46
CFG_5 DMI_TXN_1 DMI_MTX_IRX_N1 12 19 VGA_GRN CRT_GREEN PEG_TX_2
PAD T29 CFG6 N23 AM40 J29 N50
CFG_6 DMI_TXN_2 DMI_MTX_IRX_N2 12 CRT_GREEN# PEG_TX_3
PAD T16 CFG7 G23 AM44 VGA_RED F29 R51
CFG_7 DMI_TXN_3 DMI_MTX_IRX_N3 12 19 VGA_RED CRT_RED PEG_TX_4

VGA
PAD T22 CFG8 J20 E29 U43
CFG_8 CRT_RED# PEG_TX_5
CFG

R100 2 1 *4.02K/F_NCCFG9 C20 AJ47 W42


CFG_9 DMI_TXP_0 DMI_MTX_IRX_P0 12 PEG_TX_6
CFG10 R24 AJ42 Y47
PAD T30 CFG_10 DMI_TXP_1 DMI_MTX_IRX_P1 12 PEG_TX_7
PAD T26 CFG11 L23 AM39 K33 Y39
CFG_11 DMI_TXP_2 DMI_MTX_IRX_P2 12 19 G_CLK_DDC2 CRT_DDC_CLK PEG_TX_8
PAD T23 CFG12 J23 AM43 G35 AC38
CFG13 CFG_12 DMI_TXP_3 DMI_MTX_IRX_P3 12 19 G_DAT_DDC2 CRT_DDC_DATA PEG_TX_9
PAD T12 E23 R104 1 2 30/F F33 AD47
CFG_13 19 VGAHSYNC CRT_HSYNC PEG_TX_10
PAD T13 CFG14 E20 R362 1 2 1.3K/F C32 AC50
CFG15 CFG_14 R99 1 CRT_TVO_IREF PEG_TX_11
PAD T24 K23 CFG_15 19 VGAVSYNC 2 30/F E33 CRT_VSYNC PEG_TX_12 AD43
R129 2 1 *4.02K/F_NCCFG16 M20 AG39
C +3.3V_RUN CFG17 CFG_16 PEG_TX_13 C
GRAPHICS VID

PAD T27 M24 CFG_17 PEG_TX_14 AE50


CFG18 L32 AH43
PAD T25
PADT25 CFG_18 PEG_TX_15
R127 2 1 *4.02K/F_NCCFG19 N33
R120 2 *4.02K/F_NCCFG20 CFG_19 R43 *0_NC THERMTRIP_MCH#
1 L35 CFG_20 3,23,31,40 H_THERMTRIP#
LE82GM965-SLA5T-MM#891181
E35 T10 PAD
GFX_VID_0 PAD VGA_BLU +3.3V_RUN
13 PM_BMBUSY# G41 PM_BM_BUSY# GFX_VID_1 A39 T144
VGA_GRN
UMA
L39 C38 T143 PAD UMA
3,11,39 H_DPRSTP# PM_EXTTS#0 PM_DPRSTP# GFX_VID_2 PAD VGA_RED R102 LCD_DDCCLK
15 PM_EXTTS#0 L36 PM_EXT_TS#_0 GFX_VID_3 B39 T142 2 1 2.2K
PM

PM_EXTTS#1 J36 E36 T141 PAD R105 2 1 2.2K LCD_DDCDAT


PM_EXT_TS#_1 GFX_VR_EN
2

15 PM_EXTTS#1 2
AW49 PWROK
13,35 ICH_PWRGD PLTRST#_R AV20 RSTIN#
R116 R119 R103 Layout Note:
THERMTRIP_MCH# N20 150/F 150/F 150/F Place 150 ohm
THERMTRIP#
G36
13,39 DPRSLPVR DPRSLPVR termination resistors
1

AM49 CL_CLK0 13
close to GMCH.
CL_CLK
CL_DATA AK50 CL_DATA0 13
BJ51 AT43 ICH_CL_PWROK 13,23
ME

NC_1 CL_PWROK
BK51 NC_2 CL_RST# AN49 ICH_CL_RST0# 13
BK50 NC_3 CL_VREF AM50 Low=DMIx2
BL50 MCH_CLVREF CFG5 DMI X2 Select High=DMIx4(Default)
NC_4
BL49 NC_5
BL3 NC_6
PCI Express Low= Reveise Lane
BL2 NC_7
CFG9 Graphic Lane High=Normal operation
NC

BK1 NC_8
BJ1 NC_9 SDVO_CTRL_CLK H35 T17 PAD FSB Dynamic Low=Dynamic ODT Disable
E1 NC_10 SDVO_CTRL_DATA K36 T28 PAD CFG16 ODT High=Dynamic ODT Enable(default).
MISC

A5 NC_11 CLK_REQ# G39 CLK_3GPLLREQ# 17


D C51 NC_12 ICH_SYNC# G40 MCH_ICH_SYNC# 13 DMI Lane Low=Normal(default). D
B50 NC_13
CFG19 Reversal High=Lane Reversed
A50 NC_14
A49 A37 Low=Only SDVO or PCIEx1 is
BK2
NC_15
NC_16
TEST_1
TEST_2 R32
CFG20
SDVO/PCIE
Concurrent
operational (defaults) QUANTA
High=SDVO and PCIEx1 are operating
2

LE82GM965-SLA5T-MM#891181 R134 SJ5 Operation simultaneously via PEG port COMPUTER


2

R148 *0_NC 20K Title


12 SB_NB_PCIE_RST#
1

Low=No SDVO Device Present Crestline (VGA,DMI)


R149 (default)
100
1

2 1 PLTRST#_R SDVO_CRTL_DATA SDVO Present. High=SDVO Device Present Size Document Number Rev
12,23,26,34 PLTRST# VM9/VM8 1A

Date: Thursday, June 12, 2008 Sheet 6 of 53


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15 DDR_A_D[0..63] 15 DDR_B_D[0..63]
U20D U20E
DDR_A_D0 AR43 BB19 DDR_A_BS0 DDR_B_D0 AP49 AY17 DDR_B_BS0
SA_DQ_0 SA_BS_0 DDR_A_BS0 15,16 SB_DQ_0 SB_BS_0 DDR_B_BS0 15,16
DDR_A_D1 AW44 BK19 DDR_A_BS1 DDR_B_D1 AR51 BG18 DDR_B_BS1
A
DDR_A_D2 SA_DQ_1 SA_BS_1 DDR_A_BS2 DDR_A_BS1 15,16 DDR_B_D2 SB_DQ_1 SB_BS_1 DDR_B_BS2 DDR_B_BS1 15,16 A
BA45 SA_DQ_2 SA_BS_2 BF29 DDR_A_BS2 15,16 AW50 SB_DQ_2 SB_BS_2 BG36 DDR_B_BS2 15,16
DDR_A_D3 AY46 DDR_B_D3 AW51
DDR_A_D4 SA_DQ_3 DDR_A_CAS# DDR_B_D4 SB_DQ_3 DDR_B_CAS#
AR41 SA_DQ_4 SA_CAS# BL17 DDR_A_CAS# 15,16 AN51 SB_DQ_4 SB_CAS# BE17 DDR_B_CAS# 15,16
DDR_A_D5 AR45 DDR_B_D5 AN50
SA_DQ_5 DDR_A_DM[0..7] 15 SB_DQ_5 DDR_B_DM[0..7] 15
DDR_A_D6 AT42 AT45 DDR_A_DM0 DDR_B_D6 AV50 AR50 DDR_B_DM0
DDR_A_D7 SA_DQ_6 SA_DM_0 DDR_A_DM1 DDR_B_D7 SB_DQ_6 SB_DM_0 DDR_B_DM1
AW47 SA_DQ_7 SA_DM_1 BD44 AV49 SB_DQ_7 SB_DM_1 BD49
DDR_A_D8 BB45 BD42 DDR_A_DM2 DDR_B_D8 BA50 BK45 DDR_B_DM2
DDR_A_D9 SA_DQ_8 SA_DM_2 DDR_A_DM3 DDR_B_D9 SB_DQ_8 SB_DM_2 DDR_B_DM3
BF48 SA_DQ_9 SA_DM_3 AW38 BB50 SB_DQ_9 SB_DM_3 BL39
DDR_A_D10 BG47 AW13 DDR_A_DM4 DDR_B_D10 BA49 BH12 DDR_B_DM4
DDR_A_D11 SA_DQ_10 SA_DM_4 DDR_A_DM5 DDR_B_D11 SB_DQ_10 SB_DM_4 DDR_B_DM5
BJ45 SA_DQ_11 SA_DM_5 BG8 BE50 SB_DQ_11 SB_DM_5 BJ7
DDR_A_D12 BB47 AY5 DDR_A_DM6 DDR_B_D12 BA51 BF3 DDR_B_DM6
DDR_A_D13 SA_DQ_12 SA_DM_6 DDR_A_DM7 DDR_B_D13 SB_DQ_12 SB_DM_6 DDR_B_DM7
BG50 SA_DQ_13 SA_DM_7 AN6 AY49 SB_DQ_13 SB_DM_7 AW2
DDR_A_D14 BH49 DDR_B_D14 BF50
SA_DQ_14 DDR_A_DQS[0..7] 15 SB_DQ_14 DDR_B_DQS[0..7] 15
DDR_A_D15 BE45 AT46 DDR_A_DQS0 DDR_B_D15 BF49 AT50 DDR_B_DQS0
SA_DQ_15 SA_DQS_0 SB_DQ_15 SB_DQS_0

A
DDR_A_D16 AW43 BE48 DDR_A_DQS1 DDR_B_D16 BJ50 BD50 DDR_B_DQS1
SA_DQ_16 SA_DQS_1 SB_DQ_16 SB_DQS_1

B
DDR_A_D17 BE44 BB43 DDR_A_DQS2 DDR_B_D17 BJ44 BK46 DDR_B_DQS2
DDR_A_D18 SA_DQ_17 SA_DQS_2 DDR_A_DQS3 DDR_B_D18 SB_DQ_17 SB_DQS_2 DDR_B_DQS3
BG42 SA_DQ_18 SA_DQS_3 BC37 BJ43 SB_DQ_18 SB_DQS_3 BK39
DDR_A_D19 BE40 BB16 DDR_A_DQS4 DDR_B_D19 BL43 BJ12 DDR_B_DQS4
DDR_A_D20 SA_DQ_19 SA_DQS_4 DDR_A_DQS5 DDR_B_D20 SB_DQ_19 SB_DQS_4 DDR_B_DQS5
BF44 BH6 BK47 BL7

MEMORY
DDR_A_D21 SA_DQ_20 SA_DQS_5 DDR_A_DQS6 DDR_B_D21 SB_DQ_20 SB_DQS_5 DDR_B_DQS6
BH45 BB2 BK49 BE2

MEMORY
DDR_A_D22 SA_DQ_21 SA_DQS_6 DDR_A_DQS7 DDR_B_D22 SB_DQ_21 SB_DQS_6 DDR_B_DQS7
BG40 SA_DQ_22 SA_DQS_7 AP3 DDR_A_DQS#[0..7] 15 BK43 SB_DQ_22 SB_DQS_7 AV2 DDR_B_DQS#[0..7] 15
DDR_A_D23 BF40 AT47 DDR_A_DQS#0 DDR_B_D23 BK42 AU50 DDR_B_DQS#0
DDR_A_D24 SA_DQ_23 SA_DQS#_0 DDR_A_DQS#1 DDR_B_D24 SB_DQ_23 SB_DQS#_0 DDR_B_DQS#1
AR40 SA_DQ_24 SA_DQS#_1 BD47 BJ41 SB_DQ_24 SB_DQS#_1 BC50
DDR_A_D25 AW40 BC41 DDR_A_DQS#2 DDR_B_D25 BL41 BL45 DDR_B_DQS#2
DDR_A_D26 SA_DQ_25 SA_DQS#_2 DDR_A_DQS#3 DDR_B_D26 SB_DQ_25 SB_DQS#_2 DDR_B_DQS#3
AT39 SA_DQ_26 SA_DQS#_3 BA37 BJ37 SB_DQ_26 SB_DQS#_3 BK38
DDR_A_D27 AW36 BA16 DDR_A_DQS#4 DDR_B_D27 BJ36 BK12 DDR_B_DQS#4
DDR_A_D28 SA_DQ_27 SA_DQS#_4 DDR_A_DQS#5 DDR_B_D28 SB_DQ_27 SB_DQS#_4 DDR_B_DQS#5
AW41 SA_DQ_28 SA_DQS#_5 BH7 BK41 SB_DQ_28 SB_DQS#_5 BK7
DDR_A_D29 AY41 BC1 DDR_A_DQS#6 DDR_B_D29 BJ40 BF2 DDR_B_DQS#6
DDR_A_D30 SA_DQ_29 SA_DQS#_6 DDR_A_DQS#7 DDR_B_D30 SB_DQ_29 SB_DQS#_6 DDR_B_DQS#7
AV38 SA_DQ_30 SA_DQS#_7 AP2 BL35 SB_DQ_30 SB_DQS#_7 AV3
B DDR_A_D31 AT38 DDR_B_D31 BK37 B
SA_DQ_31 DDR_A_MA[0..13] 15,16 SB_DQ_31 DDR_B_MA[0..13] 15,16
DDR_A_D32 AV13 BJ19 DDR_A_MA0 DDR_B_D32 BK13 BC18 DDR_B_MA0
DDR_A_D33 SA_DQ_32 SA_MA_0 DDR_A_MA1 DDR_B_D33 SB_DQ_32 SB_MA_0 DDR_B_MA1
AT13 BD20 BE11 BG28
SYSTEM

DDR_A_D34 SA_DQ_33 SA_MA_1 DDR_A_MA2 DDR_B_D34 SB_DQ_33 SB_MA_1 DDR_B_MA2


AW11 BK27 BK11 BG25

SYSTEM
DDR_A_D35 SA_DQ_34 SA_MA_2 DDR_A_MA3 DDR_B_D35 SB_DQ_34 SB_MA_2 DDR_B_MA3
AV11 SA_DQ_35 SA_MA_3 BH28 BC11 SB_DQ_35 SB_MA_3 AW17
DDR_A_D36 AU15 BL24 DDR_A_MA4 DDR_B_D36 BC13 BF25 DDR_B_MA4
DDR_A_D37 SA_DQ_36 SA_MA_4 DDR_A_MA5 DDR_B_D37 SB_DQ_36 SB_MA_4 DDR_B_MA5
AT11 SA_DQ_37 SA_MA_5 BK28 BE12 SB_DQ_37 SB_MA_5 BE25
DDR_A_D38 BA13 BJ27 DDR_A_MA6 DDR_B_D38 BC12 BA29 DDR_B_MA6
DDR_A_D39 SA_DQ_38 SA_MA_6 DDR_A_MA7 DDR_B_D39 SB_DQ_38 SB_MA_6 DDR_B_MA7
BA11 SA_DQ_39 SA_MA_7 BJ25 BG12 SB_DQ_39 SB_MA_7 BC28
DDR_A_D40 BE10 BL28 DDR_A_MA8 DDR_B_D40 BJ10 AY28 DDR_B_MA8
DDR_A_D41 SA_DQ_40 SA_MA_8 DDR_A_MA9 DDR_B_D41 SB_DQ_40 SB_MA_8 DDR_B_MA9
BD10 SA_DQ_41 SA_MA_9 BA28 BL9 SB_DQ_41 SB_MA_9 BD37
DDR_A_D42 BD8 BC19 DDR_A_MA10 DDR_B_D42 BK5 BG17 DDR_B_MA10
DDR_A_D43 SA_DQ_42 SA_MA_10 DDR_A_MA11 DDR_B_D43 SB_DQ_42 SB_MA_10 DDR_B_MA11
AY9 SA_DQ_43 SA_MA_11 BE28 BL5 SB_DQ_43 SB_MA_11 BE37
DDR_A_D44 BG10 BG30 DDR_A_MA12 DDR_B_D44 BK9 BA39 DDR_B_MA12
DDR_A_D45 SA_DQ_44 SA_MA_12 DDR_A_MA13 DDR_B_D45 SB_DQ_44 SB_MA_12 DDR_B_MA13
AW9 SA_DQ_45 SA_MA_13 BJ16 BK10 SB_DQ_45 SB_MA_13 BG13
DDR_A_D46 BD7 DDR_B_D46 BJ8
DDR

DDR_A_D47 SA_DQ_46 DDR_B_D47 SB_DQ_46 DDR_B_RAS#


BB9 BJ6 AV16

DDR
SA_DQ_47 SB_DQ_47 SB_RAS# DDR_B_RAS# 15,16
DDR_A_D48 BB5 BE18 DDR_A_RAS# DDR_B_D48 BF4 AY18
SA_DQ_48 SA_RAS# DDR_A_RAS# 15,16 SB_DQ_48 SB_RCVEN# T39 PAD
DDR_A_D49 AY7 AY20 DDR_B_D49 BH5
SA_DQ_49 SA_RCVEN# T38 PAD SB_DQ_49
DDR_A_D50 AT5 DDR_B_D50 BG1 BC17 DDR_B_WE#
SA_DQ_50 SB_DQ_50 SB_WE# DDR_B_WE# 15,16
DDR_A_D51 AT7 BA19 DDR_A_WE# DDR_B_D51 BC2
DDR_A_D52 SA_DQ_51 SA_WE# DDR_A_WE# 15,16 DDR_B_D52 SB_DQ_51
AY6 SA_DQ_52 BK3 SB_DQ_52
DDR_A_D53 BB7 DDR_B_D53 BE4
DDR_A_D54 SA_DQ_53 DDR_B_D54 SB_DQ_53
AR5 SA_DQ_54 BD3 SB_DQ_54
DDR_A_D55 AR8 DDR_B_D55 BJ2
DDR_A_D56 SA_DQ_55 DDR_B_D56 SB_DQ_55
AR9 SA_DQ_56 BA3 SB_DQ_56
DDR_A_D57 AN3 DDR_B_D57 BB3
DDR_A_D58 SA_DQ_57 DDR_B_D58 SB_DQ_57
AM8 SA_DQ_58 AR1 SB_DQ_58
DDR_A_D59 AN10 DDR_B_D59 AT3
DDR_A_D60 SA_DQ_59 DDR_B_D60 SB_DQ_59
C
AT9 SA_DQ_60 AY2 SB_DQ_60 C
DDR_A_D61 AN9 DDR_B_D61 AY3
DDR_A_D62 SA_DQ_61 DDR_B_D62 SB_DQ_61
AM9 SA_DQ_62 AU2 SB_DQ_62
DDR_A_D63 AN11 DDR_B_D63 AT2
SA_DQ_63 SB_DQ_63

LE82GM965-SLA5T-MM#891181 LE82GM965-SLA5T-MM#891181

76 For EA test use 76 For EA test use


1 DDR_A_CAS# 1 DDR_B_CAS#
ET42 ET36
1 DDR_A_RAS# 1 DDR_B_RAS#
ET37 ET29
1 DDR_A_WE# 1 DDR_B_WE#
ET31 ET33
1 DDR_CS0_DIMMA# 1 DDR_CS3_DIMMB#
ET39 DDR_CS0_DIMMA# 6,15,16 ET38 DDR_CS3_DIMMB# 6,15,16
1 DDR_A_MA9 1 DDR_B_MA11
ET32 ET35
1 DDR_A_MA13 1 DDR_B_MA1
ET44 ET41
1 DDR_A_DQS0 1 DDR_B_DQS0
ET28 ET24
1 DDR_A_DQS#0 1 DDR_B_DQS#0
ET27 ET25
1 DDR_A_D63 1 DDR_B_D6
ET23 ET30
1 DDR_A_D55 1 DDR_B_D8
ET26 DDR_A_D22 ET34 DDR_B_D41
ET40 1 ET43 1

D D

QUANTA
Title
COMPUTER
Crestline (DDR2)

Size Document Number Rev


VM9/VM8 1A

Date: Friday, May 30, 2008 Sheet 7 of 53


1 2 3 4 5 6 7 8

hexainf@hotmail.com
GRATIS - FOR FREE
5 4 3 2 1

+3.3V_RUN
+1.05V_VCCP U20G U20F
R86 10 D8
AT35 1 2 +VCC_GMCH_L 1 2 AB33
VCC_1 VCC_NCTF_1
AT34 VCC_2 VCC_AXG_NCTF_1 T17 AB36 VCC_NCTF_2
AH28 T18 SDMK0340L-7-F AB37
VCC_3 VCC_AXG_NCTF_2 VCC_NCTF_3
AC32 VCC_5 VCC_AXG_NCTF_3 T19 AC33 VCC_NCTF_4 VSS_NCTF_1 T27
AC31 VCC_4 VCC_AXG_NCTF_4 T21 AC35 VCC_NCTF_5 VSS_NCTF_2 T37
AK32 T22 AC36 U24

VCC CORE
VCC_6 VCC_AXG_NCTF_5 VCC_NCTF_6 VSS_NCTF_3
AJ31 VCC_7 VCC_AXG_NCTF_6 T23 AD35 VCC_NCTF_7 VSS_NCTF_4 U28
AJ28 T25 +1.05V_VCCP AD36 V31
VCC_8 VCC_AXG_NCTF_7 VCC_NCTF_8 VSS_NCTF_5
AH32
AH31
VCC_9 VCC_AXG_NCTF_8 U15
U16
65 AF33
AF36
VCC_NCTF_9 VSS_NCTF_6 V35
AA19
D VCC_10 VCC_AXG_NCTF_9 VCC_NCTF_10 VSS_NCTF_7 D
AH29 VCC_11 VCC_AXG_NCTF_10 U17 AH33 VCC_NCTF_11 VSS_NCTF_8 AB17
AF32 VCC_12 VCC_AXG_NCTF_11 U19 AH35 VCC_NCTF_12 VSS_NCTF_9 AB35

VSS NCTF
VCC_AXG_NCTF_12 U20 AH36 VCC_NCTF_13 VSS_NCTF_10 AD19

1
U21 + AH37 AD37
VCC_AXG_NCTF_13 C468 C151 C155 C181 C168 VCC_NCTF_14 VSS_NCTF_11
VCC_AXG_NCTF_14 U23 AJ33 VCC_NCTF_15 VSS_NCTF_12 AF17
R30 U26 Layout Note: 220U 22U 0.22U 0.22U 0.1U AJ35 AF35

2
VCC_13 VCC_AXG_NCTF_15 7343 0805 0603 0603 VCC_NCTF_16 VSS_NCTF_13
VCC_AXG_NCTF_16 V16 370 mils from edge. AK33 VCC_NCTF_17 VSS_NCTF_14 AK17
V17 2.5 4 10 10 10 AK35 AM17
VCC_AXG_NCTF_17 VCC_NCTF_18 VSS_NCTF_15
VCC_AXG_NCTF_18 V19 Layout Note: AK36 VCC_NCTF_19 VSS_NCTF_16 AM24
VCC_AXG_NCTF_19 V20 Inside GMCH cavity. AK37 VCC_NCTF_20 VSS_NCTF_17 AP26
VCC_AXG_NCTF_20 V21 AD33 VCC_NCTF_21 VSS_NCTF_18 AP28
VCC_AXG_NCTF_21 V23 AJ36 VCC_NCTF_22 VSS_NCTF_19 AR15
VCC_AXG_NCTF_22 V24 AM35 VCC_NCTF_23 VSS_NCTF_20 AR19

VCC NCTF
Y15 Layout Note: AL33 AR28
+1.8V_SUS
POWER VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
Y16
Y17
370 mils from edge. +1.05V_VCCP AL35
AA33
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VSS_NCTF_21

AU32 VCC_SM_1 VCC_AXG_NCTF_26 Y19 AA35 VCC_NCTF_27


AU33 VCC_SM_2 VCC_AXG_NCTF_27 Y20 AA36 VCC_NCTF_28
AU35 VCC_SM_3 VCC_AXG_NCTF_28 Y21 AP35 VCC_NCTF_29

1
AV33 VCC_SM_4 VCC_AXG_NCTF_29 Y23 AP36 VCC_NCTF_30
AW33 Y24 + C124 + C114 + C136 + C477 AR35
VCC_SM_5 VCC_AXG_NCTF_30 *220U_NC *220U_NC *220U_NC *220U_NC VCC_NCTF_31
AW35 VCC_SM_6 VCC_AXG_NCTF_31 Y26 AR36 VCC_NCTF_32
AY35 Y28 7343 7343 7343 7343 Y32

2
VCC_SM_7 VCC_AXG_NCTF_32 2.5 2.5 6.3 6.3 VCC_NCTF_33
BA32 Y29 Y33
BA33
BA35
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
AA16
AA17 55
Y35
Y36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
POWER
BB33 VCC_SM_11 VCC_AXG_NCTF_36 AB16 Y37 VCC_NCTF_37 VSS_SCB1 A3
BC32 AB19 T30 B2

VSS SCB
VCC_SM_12 VCC_AXG_NCTF_37 VCC_NCTF_38 VSS_SCB2
BC33 VCC_SM_13 VCC_AXG_NCTF_38 AC16 T34 VCC_NCTF_39 VSS_SCB3 C1
C BC35 VCC_SM_14 VCC_AXG_NCTF_39 AC17 T35 VCC_NCTF_40 VSS_SCB4 BL1 C
BD32 VCC_SM_15 VCC_AXG_NCTF_40 AC19 Layout Note: U29 VCC_NCTF_41 VSS_SCB5 BL51
BD35 AD15 +1.05V_VCCP U31 A51
VCC_SM_16 VCC_AXG_NCTF_41 Inside GMCH cavity for VCC_AXG. VCC_NCTF_42 VSS_SCB6
BE32 VCC_SM_17 VCC_AXG_NCTF_42 AD16 U32 VCC_NCTF_43
BE33 VCC_SM_18 VCC_AXG_NCTF_43 AD17 U33 VCC_NCTF_44
BE35 VCC_SM_19 VCC_AXG_NCTF_44 AF16 U35 VCC_NCTF_45
VCC GFX NCTF

BF33 AF19 U36


VCC SM

VCC_SM_20 VCC_AXG_NCTF_45 VCC_NCTF_46

1
BF34 VCC_SM_21 VCC_AXG_NCTF_46 AH15 V32 VCC_NCTF_47
BG32 AH16 C167 C170 C161 C182 C158 C150 V33
VCC_SM_22 VCC_AXG_NCTF_47 0.1U 0.1U 0.47U 1U 10U 22U VCC_NCTF_48
BG33 AH17 2 V36

2
VCC_SM_23 VCC_AXG_NCTF_48 0603 0603 0603 0805 VCC_NCTF_49 +1.05V_VCCP
BG35 VCC_SM_24 VCC_AXG_NCTF_49 AH19 V37 VCC_NCTF_50
BH32 AJ16 10 10 10 10 6.3 4
VCC_SM_25 VCC_AXG_NCTF_50
BH34 VCC_SM_26 VCC_AXG_NCTF_51 AJ17 VCC_AXM_1 AT33
BH35 AJ19 AT31

VCC AXM
VCC_SM_27 VCC_AXG_NCTF_52 VCC_AXM_2
BJ32 VCC_SM_28 VCC_AXG_NCTF_53 AK16 VCC_AXM_3 AK29
BJ33 VCC_SM_29 VCC_AXG_NCTF_54 AK19 VCC_AXM_4 AK24
BJ34 VCC_SM_30 VCC_AXG_NCTF_55 AL16 Layout Note: VCC_AXM_5 AK23
BK32 AL17 +1.05V_VCCP AL24 AJ26
VCC_SM_31 VCC_AXG_NCTF_56 Inside GMCH cavity. VCC_AXM_NCTF_1 VCC_AXM_6
BK33 VCC_SM_32 VCC_AXG_NCTF_57 AL19 AL26 VCC_AXM_NCTF_2 VCC_AXM_7 AJ23
BK34 VCC_SM_33 VCC_AXG_NCTF_58 AL20 AL28 VCC_AXM_NCTF_3
BK35 VCC_SM_34 VCC_AXG_NCTF_59 AL21 AM26 VCC_AXM_NCTF_4
BL33 VCC_SM_35 VCC_AXG_NCTF_60 AL23 AM28 VCC_AXM_NCTF_5

VCC AXM NCTF


AU30 VCC_SM_36 VCC_AXG_NCTF_61 AM15 AM29 VCC_AXM_NCTF_6
AM16 C178 C177 C179 AM31
VCC_AXG_NCTF_62 0.1U 0.1U 0.1U VCC_AXM_NCTF_7
AM19 AM32

2
+1.05V_VCCP VCC_AXG_NCTF_63 VCC_AXM_NCTF_8
VCC_AXG_NCTF_64 AM20 AM33 VCC_AXM_NCTF_9
AM21 10 10 10 AP29
R20
VCC_AXG_NCTF_65
AM23
Non-iAMT AP31
VCC_AXM_NCTF_10
VCC_AXG_1 VCC_AXG_NCTF_66 VCC_AXM_NCTF_11
T14 VCC_AXG_2 VCC_AXG_NCTF_67 AP15 AP32 VCC_AXM_NCTF_12
B
W13 VCC_AXG_3 VCC_AXG_NCTF_68 AP16 AP33 VCC_AXM_NCTF_13 B
W14 VCC_AXG_4 VCC_AXG_NCTF_69 AP17 AL29 VCC_AXM_NCTF_14
Y12 VCC_AXG_5 VCC_AXG_NCTF_70 AP19 AL31 VCC_AXM_NCTF_15

1
AA20 VCC_AXG_6 VCC_AXG_NCTF_71 AP20 AL32 VCC_AXM_NCTF_16
AA23 AP21 C458 C188 C187 AR31
VCC_AXG_7 VCC_AXG_NCTF_72 22U 0.22U 0.22U VCC_AXM_NCTF_17
AA26 AP23 AR32

2
VCC_AXG_8 VCC_AXG_NCTF_73 0805 0603 0603 VCC_AXM_NCTF_18
AA28 VCC_AXG_9 VCC_AXG_NCTF_74 AP24 AR33 VCC_AXM_NCTF_19
AB21 AR20 4 10 10
VCC_AXG_10 VCC_AXG_NCTF_75
AB24 VCC_AXG_11 VCC_AXG_NCTF_76 AR21
AB29 VCC_AXG_12 VCC_AXG_NCTF_77 AR23 Layout Note:
AC20 VCC_AXG_13 VCC_AXG_NCTF_78 AR24 Place close to GMCH edge.
AC21 AR26 LE82GM965-SLA5T-MM#891181
VCC_AXG_14 VCC_AXG_NCTF_79
VCC GFX

AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26


AC24 VCC_AXG_16 VCC_AXG_NCTF_81 V28
AC26 VCC_AXG_17 VCC_AXG_NCTF_82 V29
+1.8V_SUS
AC28
AC29
VCC_AXG_18 VCC_AXG_NCTF_83 Y31 55 VCC_SM
VCC_AXG_19
AD20 VCC_AXG_20
AD23 VCC_AXG_21

1
AD24 AW45 VCCSM_LF1
VCC SM LF

VCC_AXG_22 VCC_SM_LF1

1
AD28 BC39 VCCSM_LF2 +
VCC_AXG_23 VCC_SM_LF2 VCCSM_LF3 C204 C451 C235 C224
AF21 VCC_AXG_24 VCC_SM_LF3 BE39
AF26 BD17 VCCSM_LF4 0.1U 220U 22U 22U

2
VCC_AXG_25 VCC_SM_LF4 VCCSM_LF5 10 7343 0805 0805
AA31 VCC_AXG_26 VCC_SM_LF5 BD4
AH20 AW8 VCCSM_LF6 2.5 4 4
VCC_AXG_27 VCC_SM_LF6 VCCSM_LF7
AH21 VCC_AXG_28 VCC_SM_LF7 AT6 Layout Note:
AH23 VCC_AXG_29 Place C195 where LVDS
1

AH24 VCC_AXG_30 and DDR2 taps. Layout Note:


AH26 C192 C191 C219 C218 C216 C215 C202 Place on the edge.
VCC_AXG_31 0.1U 0.1U 0.22U 0.22U 0.47U 1U 1U
AD31
2

VCC_AXG_32 0603 0603 0603 0603 0603


A AJ20 VCC_AXG_33
A
AN14 10 10 10 10 10 10 10
VCC_AXG_34

QUANTA
LE82GM965-SLA5T-MM#891181 Title
COMPUTER
Crestline (VCC,NCTF)

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, May 27, 2008 Sheet 8 of 53


2 1

hexainf@hotmail.com
GRATIS - FOR FREE
5 4 3 2 1

+3.3V_RUN
U20H
+1.05V_VCCP +1.05V_VCCP
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC VCC_HV
J32 VCCSYNC VTT_1 U13

2
L33 BLM18PG181SN1D R361 0 U12
+VCCA_CRTDAC +VCCA_CRTDAC_R +VCCA_CRTDAC_R VTT_2
+3.3V_RUN 1 2 A33 VCCA_CRT_DAC_1 VTT_3 U11

1
0603 B33 U9 C137 C134 D9
VCCA_CRT_DAC_2 VTT_4

1
3 1 U8 2.2U 4.7U *SDMK0340L-7-F_NC

CRT
VTT_5

1
C133 U7 0603 0603

1
C482 C473 0.1U +VCC_TVBG_R VTT_6 6.3 6.3 +VCC_HV_L
A30 U5

2
0.1U *22nF_NC 10 VCCA_DAC_BG VTT_7
U3

2
VTT_8

1
B32 VSSA_DAC_BG VTT_9 U2
10 U1 +1.05V_VCCP R89
D VTT_10 D
VTT_11 T13 Place on the edge. *10_NC
+VCCA_DPLLA B49 T11
VCCA_DPLLA VTT_12

VTT
T10

2
+VCCA_DPLLB VTT_13
H49 VCCA_DPLLB VTT_14 T9 65
Non-iAMT 45mA MAx. 40mA MAx. T7

PLL
VTT_15

1
+VCCA_HPLL AL2 T6
FB_120ohm+-25%_100mHz +1.25V_RUN
10uH+-20%_100mA
VCCA_HPLL VTT_16
T5 C138 C157 + C461 Non-
+1.25V_RUN VTT_17
L32 10uH +VCCA_MPLL AM2 T3 0.47U 4.7U 220U iAMT +3.3V_RUN

2
_200mA_0.2ohm DC 2 1 +VCCA_DPLLA C99 VCCA_MPLL VTT_18
T2 0603 7343

2
L15 BLM11A05S 0805 1000P 50 VTT_19 6.3 6.3 2.5
R3

A LVDS
VTT_20

1
+VCCA_HPLL 2 1 +VCC_TX_LVDS A41 R2 +1.25V_RUN
VCCA_LVDS VTT_21

1
0603 + C469 C471 R1 +1.25V_RUN
VTT_22
55 220U 0.1U B41 VSSA_LVDS
Place on the edge.
1

C459 7343 +3.3V_RUN

2
22U C173 2.5 10 +VCC_AXD_L +VCC_AXD_R
1206 0.1U
65 VCC_AXD_1 AT23
AU28
2

10 VCC_AXD_2
K50 VCCA_PEG_BG VCC_AXD_3 AU24 Reserved L81 pad for

1
10 L31 10uH AT29

A PEG
VCC_AXD_4 C242 inductor.

AXD
2 1 +VCCA_DPLLB K49 AT25 C201
L16 BLM11A05S 0805 VSSA_PEG_BG VCC_AXD_5 1U 22U
AT30

2
VCC_AXD_6

1
+VCCA_MPLL C132 0603 1206

1
0603 0.1Caps should be + C467 C466 0.1U +VCCA_PEG_PLL U51 AR29 10 10 Place caps close
VCCA_PEG_PLL VCC_AXD_NCTF

1
R147 0.5/F placed 200 mils 220U 0.1U 10 to VCC_AXD.

2
1 2 7343 C117 C111

2
with in its pins.
1

0603 2.5 10 AW18 B23 +1.25V_RUN 1U 10U

2
+VCCA_MPLL_L C185 VCCA_SM_1 VCC_AXF_1 0603 0603
AV19 B21

AXF
VCCA_SM_2
POWER VCC_AXF_2
1

0.1U AU19 A21 10 6.3


2

C457 VCCA_SM_3 VCC_AXF_3


AU18 VCCA_SM_4
22U 10 AU17 AJ50 +1.25V_RUN
2

VCCA_SM_5 VCC_DMI
C 1206
55 Place caps close C

A SM

1
10 +VCCA_SM AT22
+1.25V_RUN VCCA_SM_7 +VCC_SM_CK C230
to VCC_AXF
AT21 BK24

SM CK
VCCA_SM_8 VCC_SM_CK_1
1

AT19 BK23 0.1U

2
VCCA_SM_9 VCC_SM_CK_2
2

1
+ C454 C189 C212 C211 C180 AT18 BJ24 10
*100U_NC 4.7U 22U 22U 1U VCCA_SM_10 VCC_SM_CK_3
AT17 VCCA_SM_11 VCC_SM_CK_4 BJ23
7343 0603 0805 0805 0603
Non-iAMT AR17 55
2

2
6.3 6.3 4 4 10 VCCA_SM_NCTF_1 +1.8V_SUS
AR16 VCCA_SM_NCTF_2
A43 +VCC_TX_LVDS R87 1 2 0 1206

A CK
VCC_TX_LVDS
BC29 VCCA_SM_CK_1

1
+VCCA_SM_CK BB29 +3.3V_RUN C105 C476 For EMI
+1.25V_RUN VCCA_SM_CK_2

1
C40 1000P + *220U_NC fine tune.
+VCC_TVDACA_R VCC_HV_1 7343
C25 B40

HV
VCCA_TVA_DAC_1 VCC_HV_2
1

C220 C206 C209 1 C222 B25 50 4

2
VCCA_TVA_DAC_2

1
22U 1U 1U 0.1U +VCC_TVDACB_R C27
0805 0603 0603 VCCA_TVB_DAC_1 C106
B27 AD51

TV
2

+1.25V_RUN 4 10 10 10 +VCC_TVDACC_R VCCA_TVB_DAC_2 VCC_PEG_1 0.1U +VCC_PEG +1.05V_VCCP


B28 W50

2
BLM21P221SGPT VCCA_TVC_DAC_1 VCC_PEG_2
A28 VCCA_TVC_DAC_2 VCC_PEG_3 W51

PEG
L14 +VCCA_PEG_PLL 10
V49 65

D TV/CRT
0805 VCC_PEG_4 R349 1
VCC_PEG_5 V50 2 0 1206
1

+VCCD_TVDAC_R M32 For EMI


VCCD_CRT

1
L29 VCCD_TVDAC fine tune.

1
FB_220ohm+-25%_100MHz R131 AH50 +VCC_RXR_DMI
Non-iAMT +

DMI
1/F +1.25V_RUN +VCCQ_TVDAC_R VCC_RXR_DMI_1 C460 C146
N28 AH51
_2A_0.1ohm DC VCCD_QDAC VCC_RXR_DMI_2
1

0603 220U 10U


1 2

2
C147 AN2 7343 0603
0.1U VCCD_HPLL +VTTLF1 2.5 6.3 +1.05V_VCCP
A7

VTTLF
2

C140 +VCCA_PEG_PLL VTTLF1 +VTTLF2


U48 VCCD_PEG_PLL VTTLF2 F2
10U 10 AH1 +VTTLF3

LVDS
2

VTTLF3
1

B B
0603 +1.8V_SUS +VCCD_LVDS J41 R348 1 2 0 1206
6.3 C176 C148 VCCD_LVDS_1
H42 VCCD_LVDS_2

1
0.1U 0.1U
55 For EMI
2

1
10 10 + fine tune.
1

C455 C456
C127 C130 LE82GM965-SLA5T-MM#891181 *220U_NC 10U

2
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC 1U *10U_NC 7343 0603
2

0603 0603 4 6.3


R360 0 10 6.3
L10 +VCC_TVDACA 1 2 +VCC_TVDACA_R +VTTLF1
+3.3V_RUN
BLM18PG181SN1D +VTTLF2
0603 1 3 +VTTLF3
1

22nF & 0.1uF for


1

1
C101 C475 C474 +1.8V_SUS
VCC_TVDACA:C_R should
2

10U 0.1U *22nF_NC C166 C109 C108


2

be placed with in 250 0603 10 0.47U 0.47U 0.47U +VCC_SM_CK R184 1 2 0 1206
2

2
mils from Crestline. 7 6.3 0603 0603 0603

1
10 10 10 For EMI
fine tune.
R370 0 R69 0.033/F R358 0 R183

1
+VCC_TVBG_R 2 1 +VCC_TVBG 2 1 +VCC_TVDACB 1 2 +VCC_TVDACB_R 1/F
2010 C245 C221 0603

1 2
3 1 1 3 +1.5V_RUN 22U 0.1U +VCC_SM_CK_L

2
1

R350 0 1206
C483 C81 C480 C478 1 2 +VCCD_TVDAC_R 10 10 C246
2

*22nF_NC 0.1U 0.1U *22nF_NC 10U


2

2
1

10 10 C465 1 3 0603
0.1U +VCCQ_TVDAC_R 6.3
10 C463
2

A *22nF_NC A
R368 0
+1.5V_RUN +3.3V_RUN +VCC_TVDACC 1 2 +VCC_TVDACC_R R352 100 R351 0
1 2 +VCCQ_TVDAC 1 2
D7
R49 *10_NC 1 3 QUANTA
1

2 1 +VCC_TVDAC_L 1 2 C462 1 3
C485 C484 1U
COMPUTER
2

0.1U *22nF_NC 0603 C464


2

*SDMK0340L-7-F_NC 10 10 *22nF_NC Title


TV DAC Voltage Follower Circuit -700 mV. Crestline (POWER)

Size Document Number Rev


VM9/VM8 1A

Date: Monday, June 02, 2008 Sheet 9 of 53


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U20I U20J
C46 VSS_199 VSS_287 W11
A13 VSS_1 VSS_100 AW24 C50 VSS_200 VSS_288 W39
A15 VSS_2 VSS_101 AW29 C7 VSS_201 VSS_289 W43
A17 VSS_3 VSS_102 AW32 D13 VSS_202 VSS_290 W47
A24 VSS_4 VSS_103 AW5 D24 VSS_203 VSS_291 W5
AA21 VSS_5 VSS_104 AW7 D3 VSS_204 VSS_292 W7
AA24 VSS_6 VSS_105 AY10 D32 VSS_205 VSS_293 Y13
AA29 VSS_7 VSS_106 AY24 D39 VSS_206 VSS_294 Y2
D
AB20 VSS_8 VSS_107 AY37 D45 VSS_207 VSS_295 Y41 D
AB23 VSS_9 VSS_108 AY42 D49 VSS_208 VSS_296 Y45
AB26 VSS_10 VSS_109 AY43 E10 VSS_209 VSS_297 Y49
AB28 VSS_11 VSS_110 AY45 E16 VSS_210 VSS_298 Y5
AB31 VSS_12 VSS_111 AY47 E24 VSS_211 VSS_299 Y50
AC10 VSS_13 VSS_112 AY50 E28 VSS_212 VSS_300 Y11
AC13 VSS_14 VSS_113 B10 E32 VSS_213 VSS_301 P29
AC3 VSS_15 VSS_114 B20 E47 VSS_214 VSS_302 T29
AC39 VSS_16 VSS_115 B24 F19 VSS_215 VSS_303 T31
AC43 VSS_17 VSS_116 B29 F36 VSS_216 VSS_304 T33
AC47 VSS_18 VSS_117 B30 F4 VSS_217 VSS_305 R28
AD1 VSS_19 VSS_118 B35 F40 VSS_218
AD21 VSS_20 VSS_119 B38 F50 VSS_219
AD26 VSS_21 VSS_120 B43 G1 VSS_220
AD29 VSS_22 VSS_121 B46 G13 VSS_221 VSS_306 AA32
AD3 VSS_23 VSS_122 B5 G16 VSS_222 VSS_307 AB32
AD41 VSS_24 VSS_123 B8 G19 VSS_223 VSS_308 AD32
AD45 VSS_25 VSS_124 BA1 G24 VSS_224 VSS_309 AF28
AD49 VSS_26 VSS_125 BA17 G28 VSS_225 VSS_310 AF29
AD5 VSS_27 VSS_126 BA18 G29 VSS_226 VSS_311 AT27
AD50 VSS_28 VSS_127 BA2 G33 VSS_227 VSS_312 AV25
AD8 VSS_29 VSS_128 BA24 G42 VSS_228 VSS_313 H50
AE10 VSS_30 VSS_129 BB12 G45 VSS_229
AE14 VSS_31 VSS_130 BB25 G48 VSS_230
AE6 VSS_32 VSS_131 BB40 G8 VSS_231
AF20 BB44 H24
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
H28
H4
VSS_232
VSS_233
VSS_234
AF31 VSS_36 VSS_135 BC16 H45 VSS_235
AG2 VSS_37 VSS_136 BC24 J11 VSS_236
C AG38 VSS_38 VSS_137 BC25 J16 VSS_237
C
AG43 VSS_39 VSS_138 BC36 J2 VSS_238
AG47 VSS_40 VSS_139 BC40 J24 VSS_239
AG50 VSS_41 VSS_140 BC51 J28 VSS_240
AH3 BD13 J33
AH40
AH41
VSS_42
VSS_43
VSS_44
VSS_141
VSS_142
VSS_143
BD2
BD28
J35
J39
VSS_241
VSS_242
VSS_243
VSS
AH7 VSS_45 VSS_144 BD45
AH9 VSS_46 VSS_145 BD48 K12 VSS_245
AJ11 VSS_47 VSS_146 BD5 K47 VSS_246
AJ13 VSS_48 VSS_147 BE1 K8 VSS_247
AJ21 VSS_49 VSS_148 BE19 L1 VSS_248
AJ24 VSS_50 VSS_149 BE23 L17 VSS_249
AJ29 VSS_51 VSS_150 BE30 L20 VSS_250
AJ32 VSS_52 VSS_151 BE42 L24 VSS_251
AJ43 VSS_53 VSS_152 BE51 L28 VSS_252
AJ45 VSS_54 VSS_153 BE8 L3 VSS_253
AJ49 VSS_55 VSS_154 BF12 L33 VSS_254
AK20 VSS_56 VSS_155 BF16 L49 VSS_255
AK21 VSS_57 VSS_156 BF36 M28 VSS_256
AK26 VSS_58 VSS_157 BG19 M42 VSS_257
AK28 VSS_59 VSS_158 BG2 M46 VSS_258
AK31 VSS_60 VSS_159 BG24 M49 VSS_259
AK51 VSS_61 VSS_160 BG29 M5 VSS_260
AL1 VSS_62 VSS_161 BG39 M50 VSS_261
AM11 VSS_63 VSS_162 BG48 M9 VSS_262
AM13 VSS_64 VSS_163 BG5 N11 VSS_263
AM3 VSS_65 VSS_164 BG51 N14 VSS_264
AM4 VSS_66 VSS_165 BH17 N17 VSS_265
B
AM41 VSS_67 VSS_166 BH30 N29 VSS_266 B
AM45 VSS_68 VSS_167 BH44 N32 VSS_267
AN1 VSS_69 VSS_168 BH46 N36 VSS_268
AN38 VSS_70 VSS_169 BH8 N39 VSS_269
AN39 VSS_71 VSS_170 BJ11 N44 VSS_270
AN43 VSS_72 VSS_171 BJ13 N49 VSS_271
AN5 VSS_73 VSS_172 BJ38 N7 VSS_272
AN7 VSS_74 VSS_173 BJ4 P19 VSS_273
AP4 VSS_75 VSS_174 BJ42 P2 VSS_274
AP48 VSS_76 VSS_175 BJ46 P23 VSS_275
AP50 VSS_77 VSS_176 BK15 P3 VSS_276
AR11 VSS_78 VSS_177 BK17 P50 VSS_277
AR2 VSS_79 VSS_178 BK25 R49 VSS_278
AR39 VSS_80 VSS_179 BK29 T39 VSS_279
AR44 VSS_81 VSS_180 BK36 T43 VSS_280
AR47 VSS_82 VSS_181 BK40 T47 VSS_281
AR7 VSS_83 VSS_182 BK44 U41 VSS_282
AT10 VSS_84 VSS_183 BK6 U45 VSS_283
AT14 VSS_85 VSS_184 BK8 U50 VSS_284
AT41 VSS_86 VSS_185 BL11 V2 VSS_285
AT49 VSS_87 VSS_186 BL13 V3 VSS_286
AU1 VSS_88 VSS_187 BL19
AU23 VSS_89 VSS_188 BL22
AU29 BL37 LE82GM965-SLA5T-MM#891181
VSS_90 VSS_189
AU3 VSS_91 VSS_190 BL47
AU36 VSS_92 VSS_191 C12
AU49 VSS_93 VSS_192 C16
AU51 VSS_94 VSS_193 C19
AV39 VSS_95 VSS_194 C28
AV48 VSS_96 VSS_195 C29
A AW1 VSS_97 VSS_196 C33 A
AW12 VSS_98 VSS_197 C36
AW16 VSS_99 VSS_198 C41

LE82GM965-SLA5T-MM#891181
QUANTA
Title
COMPUTER
Crestline (VSS)

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, May 27, 2008 Sheet 10 of 53


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1 2 3 4 5 6 7 8

+1.05V_VCCP
32.768KHZ R322 10M +RTC_CELL +RTC_CELL
2 1

2
W2
R231 R227 R222 R218 R223 R224
ICH_RTCX1 1 4 ICH_RTCX2 332K/F 332K/F *56_NC *56_NC 56 56

2
2 3 ICH_INTVRMEN ICH_LAN100_SLP

1
1

1
H_DPRSTP#
C440 32.768KHZ C439 H_DPSLP#
A A
12P 12P R236 R210 H_FERR#

2
*0_NC *0_NC THERMTRIP#_ICH
50 50

+RTC_CELL ICH8M Internal VR Enable Strap ICH8M LAN100 SLP Strap


(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5) (Internal VR for VccLAN1.05 and VccCL1.05) +3.3V_RUN
Low = Internal VR Disabled Low = Internal VR Disabled

2
ICH_INTVRMEN High = Internal VR Enabled(Default) ICH_LAN100_SLP High = Internal VR Enabled(Default)

2
R225 R202
1M 20K R337 R338
U19A 10K 10K
2

1
ICH_RTCRST# ICH_RTCX1 AG25 E5
RTCX1 FWH0/LAD0 LPC_LAD0 23,26
ICH_INTRUDER# ICH_RTCX2 AF24 F5

1
RTCX2 FWH1/LAD1 LPC_LAD1 23,26 SIO_A20GATE
FWH2/LAD2 G8 LPC_LAD2 23,26
1
ICH_RTCRST# AF23 F6 SIO_RCIN#
RTCRST# FWH3/LAD3 LPC_LAD3 23,26
C266

LPC
RTC
1U ICH_INTRUDER# AD22 C4
2
INTRUDER# FWH4/LFRAME# LPC_LFRAME# 23,26
0603
10 ICH_INTVRMEN AF25 G9
INTVRMEN LDRQ0# PAD T85
ICH_LAN100_SLP AD21
38 LAN100_SLP LDRQ1#/GPIO23 E6 PAD T88

T99 PAD GLAN_CLK B24 AF13 SIO_A20GATE


GLAN_CLK A20GATE SIO_A20GATE 23
R328 1 2 33 ACZ_BIT_CLK AG26
32 ICH_AZ_CODEC_BITCLK A20M# H_A20M# 3
D22 LAN_RSTSYNC
2

Reserved for AF26 H_DPRSTP#


DPRSTP# H_DPRSTP# 3,6,39
B L37 Intel NinevehT100 PAD LAN_RXD0 C21 AE26 H_DPSLP# B

LAN / GLAN
LAN_RXD0 DPSLP# H_DPSLP# 3
22uH T101 PAD LAN_RXD1 B21
design. T93 LAN_RXD2 C22
LAN_RXD1
AD24 H_FERR#
0402 PAD LAN_RXD2 FERR# H_FERR# 3
T92 PAD LAN_TXD0
T82 LAN_TXD1 D21 AG29
PAD
2 1

LAN_TXD2 LAN_TXD0 CPUPWRGD/GPIO49 H_PWRGOOD 3


T94 PAD E20 LAN_TXD1
C20 LAN_TXD2 IGNNE# AF27
C445 R325 *10K_NC H_IGNNE# 3

CPU
27P +3.3V_SUS 1 2 AH21 AE24
1

GLAN_DOCK#/GPIO13 INIT# H_INIT# 3


50 AC20
INTR H_INTR 3
R272 24.9/F D25 AH14 SIO_RCIN#
GLAN_COMPI RCIN# SIO_RCIN# 23
+1.5V_PCIE_ICH 1 2 GLAN_COMP C25 GLAN_COMPO
NMI AD23 H_NMI 3
R329 1 2 33 ACZ_SYNC ACZ_BIT_CLK AJ16 AG28
32 ICH_AZ_CODEC_SYNC HDA_BIT_CLK SMI# H_SMI# 3
ACZ_SYNC AJ15
R199 1 ACZ_RST# HDA_SYNC
23,32 ICH_AZ_CODEC_RST# 2 33 STPCLK# AA24 H_STPCLK# 3
ACZ_RST# AE14
R200 1 ACZ_SDOUT HDA_RST# THERMTRIP#_ICH
32 ICH_AZ_CODEC_SDOUT 2 33 THRMTRIP# AE27
32 ICH_AZ_CODEC_SDIN0 AJ17 HDA_SDIN0
T127 PAD AH17 AA23

IHDA
HDA_SDIN1 TP8 PAD T65
T124 PAD AH15 HDA_SDIN2
Place all series terms close to ICH8 except for SDIN input T56 PAD AD13 HDA_SDIN3 DD0 V1 PAD T115
lines,which should be close to source. U2 PAD T111
ACZ_SDOUT DD1 PAD T113
AE13 HDA_SDOUT DD2 V3
T1 PAD T109
R209 2 DD3
+3.3V_SUS 1 *10K_NC AE10 HDA_DOCK_EN#/GPIO33 DD4 V4 PAD T110
R331 2 1 *10K_NC AG14 T5 PAD T71
HDA_DOCK_RST#/GPIO34 DD5 PAD T121
DD6 AB2
AF10 T6 PAD T70
30 SATA_ACT# SATALED# DD7
T3 PAD T107
C DD8 PAD T105
C
28 SATA_RX0- AF6 SATA0RXN DD9 R2
AF5 T4 PAD T72
28 SATA_RX0+ SATA0RXP DD10
SATA_TX0-_C AH5 V6 PAD T64
SATA_TX0+_C SATA0TXN DD11 PAD T62
AH6 SATA0TXP DD12 V5
C433 2 1 3900P 25 SATA_TX0-_C U1 PAD T112

IDE
28 SATA_TX0- DD13
C432 2 1 3900P 25 SATA_TX0+_C AG3 V2 PAD T114
28 SATA_TX0+ 28 SATA_RX1- SATA1RXN DD14
AG4 U6 PAD T68
28 SATA_RX1+ SATA1RXP DD15
SATA_TX1-_C AJ4
SATA_TX1+_C SATA1TXN PAD T58
AJ3 AA4

SATA
C429 SATA_TX1-_C SATA1TXP DA0
28 SATA_TX1- 2 1 3900P 25
DA1 AA1 PAD T120
C430 2 1 3900P 25 SATA_TX1+_C AF2 AB3 PAD T119
28 SATA_TX1+ SATA2RXN DA2
AF1 SATA2RXP
T51 PAD AE4 Y6 PAD T67
T50 SATA2TXN DCS1# PAD T60
PAD AE3 SATA2TXP DCS3# Y5
Distance between the ICH-8 M and cap on the "P"
signal should be identical distance between the AB7 W4 PAD T116
17 CLK_PCIE_SATA# SATA_CLKN DIOR#
AC6 W3 PAD T117
ICH-8 M and cap on the "N" signal for same pair. 17 CLK_PCIE_SATA SATA_CLKP DIOW#
Y2 PAD T118
DDACK# IDE_IRQ
Place within 500mils R321 24.9/F AG1 SATARBIAS# IDEIRQ Y3 R235 2 1 8.2K +3.3V_RUN
of ICH8 ball 1 2 SATABIAS AG2 Y1 IDE_DIORDY R319 2 1 4.7K
SATARBIAS IORDY
DDREQ W5 PAD T66
NH82801HBM-SLA5Q-MM#888654

+3.3V_RUN
1

D XOR Chain Entrance Strap R189 D


*1K_NC
ICH RSVD HDA SDOUT Description
QUANTA
2

0 0 RSVD ACZ_SDOUT
ICH_RSVD 13
0 1 Enter XOR Chain
COMPUTER
1

1 0 Normal Operation (Default) R326 Title


*1K_NC ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
1 1 Set PCIE port config bit 1
Size Document Number Rev
2

VM9/VM8 1A

Date: Thursday, June 12, 2008 Sheet 11 of 53


6 7 8

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GRATIS - FOR FREE
1 2 3 4 5 6 7 8

U19D
Place TX DC blocking caps close ICH8. P27 PERN1 DMI0RXN V27 DMI_MTX_IRX_N0 6
P26 V26 DMI_MTX_IRX_P0 6

Direct Media Interface


PERP1 DMI0RXP
N29 PETN1 DMI0TXN U29 DMI_MRX_ITX_N0 6
MiniWWAN N28 PETP1 DMI0TXP U28 DMI_MRX_ITX_P0 6

26 PCIE_RX2- M27 PERN2 DMI1RXN Y27 DMI_MTX_IRX_N1 6


C323 1 2 0.1U 10 PCIE_TXN2_C M26 Y26
26 PCIE_TX2- PCIE_TXP2_C 26 PCIE_RX2+ PCIE_TXN2_C PERP2 DMI1RXP DMI_MTX_IRX_P1 6
C324 1 2 0.1U 10 L29 W29
26 PCIE_TX2+ PETN2 DMI1TXN DMI_MRX_ITX_N1 6
MiniWLAN PCIE_TXP2_C L28 W28
PETP2 DMI1TXP DMI_MRX_ITX_P1 6
K27 AB26

PCI-Express
PERN3 DMI2RXN DMI_MTX_IRX_N2 6
C333 1 2 0.1U 10 GLAN_TXN_C K26 AB25
A 34 PCIE_TX6-/GLAN_TX- GLAN_TXP_C PERP3 DMI2RXP DMI_MTX_IRX_P2 6 A
C326 1 2 0.1U 10 J29 AA29
34 PCIE_TX6+/GLAN_TX+ PETN3 DMI2TXN DMI_MRX_ITX_N2 6
MiniWPAN J28 PETP3 DMI2TXP AA28 DMI_MRX_ITX_P2 6
H27 PERN4 DMI3RXN AD27 DMI_MTX_IRX_N3 6
H26 AD26
76 G29
PERP4 DMI3RXP
AC29
DMI_MTX_IRX_P3 6
PETN4 DMI3TXN DMI_MRX_ITX_N3 6
For EA test use Express Card G28 PETP4 DMI3TXP AC28 DMI_MRX_ITX_P3 6
F27 PERN5 DMI_CLKN T26 CLK_PCIE_ICH# 17
1 PCIE_RX2+ F26 T25
ET45 PERP5 DMI_CLKP CLK_PCIE_ICH 17
1 PCIE_RX6-/GLAN_RX- E29
ET51 PETN5
1 PCIE_RX6+/GLAN_RX+ E28 Y23 R242 24.9/F
ET50 PETP5 DMI_ZCOMP
Y24 DMI_COMP 1 2 Place within 500mils of ICH8
DMI_IRCOMP +1.5V_PCIE_ICH
34 PCIE_RX6-/GLAN_RX- D27 PERN6/GLAN_RXN
34 PCIE_RX6+/GLAN_RX+ D26 PERP6/GLAN_RXP USBP0N G3 ICH_USBP0- 27
GLAN_TXN_C C29 G2 ICH_USBP0+ 27
Side pair Top / left
GLAN_TXP_C PETN6/GLAN_TXN USBP0P
10/100 LOM C28 PETP6/GLAN_TXP USBP1N H5 ICH_USBP1- 27
Side pair bottom / right
USBP1P H4 ICH_USBP1+ 27
ICH_SPI_CS1#_R Boot BIOS Strap T91 PAD C23 H2
SPI_CLK USBP2N PAD T78 Pair 1 top / left
PCI_GNT0# T98 PAD B23 H1
ICH_SPI_CS1#_R SPI_CS0# USBP2P PAD T102
GNT0# SPI_CS1# E22 J3

SPI
SPI_CS1# USBP3N PAD T76 Pair 1 bottom / right
2

USBP3P J2 PAD T77


R259 LPC 11 No stuff No stuff T87 PAD D23 K5 ICH_USBP4- 18
R264 *1K_NC T95 PAD SPI_MOSI USBP4N Camera
F21 SPI_MISO USBP4P K4 ICH_USBP4+ 18
*1K_NC PCI 10 No stuff Stuff USBP5N K2 PAD T104 PCI Pullups
USB_OC0_1# AJ19 K1 Mini Card (WWAN)
1

27 USB_OC0_1# OC0# USBP5P PAD T103


SPI 01 Stuff No stuff AG16 OC1#/GPIO40 USBP6N L3 ICH_USBP6- 26
Bluetooth 8
OC2#
OC3#
AG15
AE15
OC2#/GPIO41 USB USBP6P L2
M5
ICH_USBP6+ 26
+3.3V_RUN
OC3#/GPIO42 USBP7N PAD T74 Express Card RP40
B OC4# AF15 M4 B
OC4#/GPIO43 USBP7P PAD T73
OC5# AG17 M2 ICH_USBP8- 26 PCI_STOP# 6 5
OC6# OC5#/GPIO29 USBP8N Mini Card (WLAN) PCI_DEVSEL# PCI_FRAME#
AD12 OC6#/GPIO30 USBP8P M1 ICH_USBP8+ 26 7 4
OC7# AJ18 N3 PCI_REQ1# 8 3 ICH_IRQH_GPIO5
OC7#/GPIO31 USBP9N PAD T106 Biometric
OC8# AD14 N2 PCI_PIRQD# 9 2 PCI_TRDY#
OC8# USBP9P PAD T108
OC9# AH18 10 1 PCI_SERR#
OC9# +3.3V_RUN
USBRBIAS# F2
F3 USBRBIAS 8.2KX8
USBRBIAS +3.3V_RUN
RP39
NH82801HBM-SLA5Q-MM#888654
WWAN Noise - ICH improvements PCI_PIRQE# 6 5
Non-iAMT

2
+3.3V_SUS Short F2 and F3 at the package PCI_REQ0# 7 4 PCI_PIRQC#
OC3# C249 *0.1U_NC 10 RP41 R260 PCI_PLOCK# PCI_PIRQB#
1 2 and keep length to less than 8 3
OC6# C253 1 2 *0.1U_NC 10 OC6# 6 5 22.6/F PCI_PERR# 9 2 PCI_PIRQA#
OC4# C251 1 2 *0.1U_NC 10 OC2# 7 4 OC5# 500mils. Trace Impedance 10 1 PCI_IRDY#
OC5# C436 *0.1U_NC 10 OC8# OC7# should be 60ohms +/- 15%. +3.3V_RUN
1 2 8 3

1
OC7# C435 1 2 *0.1U_NC 10 OC4# 9 2 OC9# 8.2KX8
OC8# C252 1 2 *0.1U_NC 10 10 1 USB_OC0_1# PCI_REQ2# R279 2 1 8.2K
+3.3V_SUS +3.3V_RUN
OC2# C441 1 2 *0.1U_NC 10 PCI_REQ3# R310 2 1 8.2K
USB_OC0_1# C431 1 2 *0.1U_NC 10 10KX8
OC9# C434 1 2 *0.1U_NC 10 OC3# R188 1 2 10K +3.3V_SUS

U19B SB_WLAN_PCIE_RST# R257 2 1 20K


20,25 PCI_AD[0..31]
PCI_AD0 D20 A4 PCI_REQ0#
PCI_AD1 AD0 REQ0# PCI_GNT0# PCI_REQ0# 20 SB_NB_PCIE_RST# R263 2 1 20K
PCI_AD2
E19
D19
AD1 PCI GNT0# D7
E18 PCI_REQ1#
PCI_GNT0# 20
C AD2 REQ1#/GPIO50 PCI_REQ1# 25 C
PCI_AD3 A20 C18 PCI_GNT1# BIOS should not enable the
AD3 GNT1#/GPIO51 PCI_GNT1# 25
PCI_AD4 D17 B19 PCI_REQ2#
PCI_AD5 AD4 REQ2#/GPIO52 PCI_GNT2#
internal GPIO pull up resistor.
A21 AD5 GNT2#/GPIO53 F18 PAD T86
PCI_AD6 A19 A11 PCI_REQ3# PCI_GNT3#
PCI_AD7 AD6 REQ3#/GPIO54 PCI_GNT3#
C19 AD7 GNT3#/GPIO55 C10 PAD T89

1
PCI_AD8 A18
PCI_AD9 B16
AD8
C17 R271 Non-iAMT +3.3V_SUS Add Buffers as needed for
AD9 C/BE0# PCI_C_BE0# 20,25
PCI_AD10 A12 E15 *1K_NC Loading and fanout concerns.
AD10 C/BE1# PCI_C_BE1# 20,25
PCI_AD11 E16 F16 C335 1 2
AD11 C/BE2# PCI_C_BE2# 20,25
PCI_AD12 A14 E17 0.047U 10
PCI_C_BE3# 20,25

2
PCI_AD13 AD12 C/BE3#
G16 AD13

5
PCI_AD14 A15 C8 PCI_IRDY# U14
AD14 IRDY# PCI_IRDY# 20,25
PCI_AD15 B6 D9 2
PCI_AD16 AD15 PAR PCI_RST#_G PCI_PAR 20,25
C11 AD16 PCIRST# G6 A16 away override strap. 4 PCI_RST# 20,25
PCI_AD17 A9 D16 PCI_DEVSEL# PCI_RST#_G 1
AD17 DEVSEL# PCI_DEVSEL# 20,25
PCI_AD18 D11 A7 PCI_PERR# Low = A16 swap override enabled.
AD18 PERR# PCI_PERR# 20,25
PCI_AD19 B12 B7 PCI_PLOCK# SB_NB_PCIE_RST# TC7SZ32FU(T5L,F,T)
AD19 PLOCK# PCI_PLOCK# High = Default.
PCI_AD20 C12 F10 PCI_SERR#
AD20 SERR# PCI_SERR# 20,25
PCI_AD21 D10 C16 PCI_STOP# +3.3V_SUS
AD21 STOP# PCI_STOP# 20,25
PCI_AD22 C7 C9 PCI_TRDY#
AD22 TRDY# PCI_TRDY# 20,25
PCI_AD23 F13 A17 PCI_FRAME# C247 1 2
AD23 FRAME# PCI_FRAME# 20,25
PCI_AD24 E11 For EA test use 0.047U 10
PCI_AD25 AD24
E13 AD25 PLTRST# AG24 PCI_PLTRST#

5
PCI_AD26 E12 B10 CLK_PCI_ICH 1 PCI_AD1 CLK_PCI_ICH U13
AD26 PCICLK CLK_PCI_ICH 17 ET47
PCI_AD27 D8 G7 2
AD27 PME# ICH_PME# 20,23,25

2
PCI_AD28 A6 1 PCI_AD3 4
PCI_AD29 AD28 ET60 PCI_AD7 PCI_PLTRST# PLTRST# 6,23,26,34
E8 AD29 ET55 1 1
PCI_AD30 D6 1 PCI_AD14 R275
PCI_AD31 AD30 ET59 PCI_AD29
A3 1 *10_NC TC7SZ32FU(T5L,F,T)
AD31 ET48
D 1 PCI_AD13 D
ET46

2 1
PCI_AD19
PCI_PIRQA# F9
Interrupt I/F F8 PCI_PIRQE#
ET57 1
1 PCI_IRDY#
20 PCI_PIRQA# PIRQA# PIRQE#/GPIO2 PCI_PIRQE# 25 ET53
PCI_PIRQB# B5 G11 SB_WLAN_PCIE_RST# 1 PCI_TRDY# C344
20
20
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQC# C5
PIRQB# PIRQF#/GPIO3
F12 SB_NB_PCIE_RST# SB_WLAN_PCIE_RST# 26
SB_NB_PCIE_RST# 6
ET56
ET58 1 PCI_FRAME# *8.2P_NC QUANTA

1
PCI_PIRQD# PIRQC# PIRQG#/GPIO4 ICH_IRQH_GPIO5 PCI_STOP#
25 PCI_PIRQD# A10 PIRQD# PIRQH#/GPIO5 B3 PAD T96 ET54 1
PCI_DEVSEL#
NH82801HBM-SLA5Q-MM#888654
ET52
ET49
1
1
1
PCI_GNT0#
PCI_REQ0#
Reserved for
16

Title
COMPUTER
ET61 EMI.Place
ICH8-M (USB,DMI,PCIE,PCI)
resister and cap
close to ICH. Size Document Number Rev
VM9/VM8 1A

Date: Friday, May 30, 2008 Sheet 12 of 53


6 7 8

hexainf@hotmail.com
GRATIS - FOR FREE
1 2 3 4 5 6 7 8

+3.3V_SUS
Non-iAMT
RP23
1 2 ICH_SMBDATA
3 4 ICH_SMBCLK Place these close to ICH8.
2.2KX2
CLK_ICH_48M
+3.3V_SUS Non-iAMT

1
A A
R193 *10K_NC RSV_ICH_CL_RST1# +3.3V_RUN R256
Non-iAMT ASF 2.0 R195
1
2
2
1 10K ICH_RI# *10_NC
+3.3V_SUS R238 2 1 10K SIO_EXT_SCI#
R190 2 1 1K PCIE_WAKE#

1 2
2
RP22
1 2 ICH_SMLINK0
3 4 ICH_SMLINK1 R206 C321
8.2K *4.7P_NC

2
*10KX2_NC

1
U19C 50
ICH_SMBCLK ICH_SMLINK0 ICH_SMBCLK AJ26 AJ12
ICH_SMBDATA ICH_SMLINK1 26 ICH_SMBCLK ICH_SMBDATA SMBCLK SATA0GP/GPIO21
AD19 SMBDATA SATA1GP/GPIO19 AJ10

SATA
GPIO
26 ICH_SMBDATA RSV_ICH_CL_RST1# CLK_ICH_14M
AG21 AF11

SMB
T43 PAD LINKALERT# SATA2GP/GPIO36
T61 PAD ICH_SMLINK0 AC17 AG11
SMLINK0 SATA3GP/GPIO37

2
T69 PAD ICH_SMLINK1 AE19 SMLINK1 CLK_ICH_14M R201
CLK14 AG9 CLK_ICH_14M 17

Clocks
+3.3V_RUN ICH_RI# AF17 G5 CLK_ICH_48M *10_NC
RI# CLK48 CLK_ICH_48M 17
RSV_LPCPD# F4 D3 ICH_SUSCLK
T84 PAD PAD T90

1 1
SUS_STAT#/LPCPD# SUSCLK
2

3 ITP_DBRESET# AD15 SYS_RESET#


SLP_S3# AG23 SIO_SLP_S3# 23
R340 AG12 AF21 C250
6 PM_BMBUSY# BMBUSY#/GPIO0 SLP_S4# PAD T52
8.2K AD18 *4.7P_NC
SIO_SLP_S5# 23

2
USB_MCARD1_DET# SLP_S5#
AG22
1

CLKRUN# 26 USB_MCARD1_DET# SMBALERT#/GPIO11


AH27 50
S4_STATE#/GPIO26
AE20

GPIO
17 H_STP_PCI# STP_PCI#/GPIO15
1

AG18 AE23 ICH_PWRGD

SYS
17 H_STP_CPU# STP_CPU#/GPIO25 PWROK ICH_PWRGD 6,35
R333 DPRSLPVR
DPRSLPVR 6,39
*10_NC CLKRUN#
B AH11 AJ14 6 B

Power MGT
20,23,25 CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 R219 8.2K
PCIE_WAKE# AE17 AE21 ICH_BATLOW# 2 1 +3.3V_SUS
2

26,34 PCIE_WAKE# WAKE# BATLOW#


IRQ_SERIRQ AF12
20,23,25 IRQ_SERIRQ THERM_ALERT# SERIRQ
31 THERM_ALERT# AC13 THRM# PWRBTN# C2 SIO_PWRBTN# 23
Option to " Disable " ICH_PWRGD R211 2 1 10K
IMVP_PWRGD AJ20 AH20 RSV_ICH_LAN_RST#
clkrun. Pulling it down 23,35,39 IMVP_PWRGD VRMPWRGD LAN_RST# PAD T40
DPRSLPVR R330 1 2 100K
will keep the clks AJ22 AG27 ICH_RSMRST#
T125 PAD TP7 RSMRST# ICH_RSMRST# 23
running. ICH_RSMRST# R323 1 2 10K
T41 PAD AJ8 TACH1/GPIO1 CK_PWRGD E1 CLK_PWRGD 17
T128 PAD AJ9 RSV_ICH_LAN_RST# R192 2 1 10K
TACH2/GPIO6 ICH_CL_PWROK
23 SIO_EXT_WAKE# AH9 TACH3/GPIO7 CLPWROK E3 ICH_CL_PWROK 6,23
SIO_EXT_SMI# AE16 ICH_CL_PWROK R265 2 1 1M
23 SIO_EXT_SMI#
SIO_EXT_SCI# AC19
GPIO8
AJ25
Non-iAMT
23 SIO_EXT_SCI# GPIO12 SLP_M# PAD T130
T46 PAD AG8 TACH0/GPIO17
PCIE_MCARD1_DET# AH12 F23

Controller Link
26 PCIE_MCARD1_DET# GPIO18 CL_CLK0 CL_CLK0 6
AE11 AE18 RSV_ICH_CL_CLK1

GPIO
T53 PAD GPIO20 CL_CLK1 PAD T55
T44 PAD AG10 SCLOCK/GPIO22
26 WLAN_RADIO_DIS# AH25 QRT_STATE0/GPIO27 CL_DATA0 F22 CL_DATA0 6
AD16 AF19 RSV_ICH_CL_DATA1 +3.3V_SUS
T54 PAD QRT_STATE1/GPIO28 CL_DATA1 PAD T48
17 SATA_CLKREQ# AG13 SATACLKREQ#/GPIO35
PLTRST_DELAY# AF9 D24 CL_VREF0 RSV_GPIO10 R187 2 1 10K
T49 PAD SLOAD/GPIO38 CL_VREF0
T126 PAD AJ11 AH23 CL_VREF1
SDATAOUT0/GPIO39 CL_VREF1 PAD T42
T57 PAD AD10 SDATAOUT1/GPIO48
CL_RST# AJ23 ICH_CL_RST0# 6
SPKR AD9
32 SPKR SPKR
AJ27

MISC
MCH_ICH_SYNC#_R MEM_LED/GPIO24 RSV_GPIO10
6 MCH_ICH_SYNC# AJ13 MCH_SYNC# ME_EC_ALERT/GPIO10 AJ24 PAD T131
AF22 RSV_GPIO14
C EC_ME_ALERT/GPIO14 PAD T63 C
AJ21 AG19 RSV_WOL_EN
11 ICH_RSVD TP3 WOL_EN/GPIO9 PAD T45
NH82801HBM-SLA5Q-MM#888654 R228 8.2K
2 1 +3.3V_SUS
+3.3V_RUN +3.3V_SUS
R208 2 1*10K_NC PLTRST_DELAY# Non-iAMT

2
+3.3V_RUN +3.3V_RUN R258 R205
Non-iAMT 3.24K/F *3.24K/F_NC
SMbus address D2
1

1
2
+3.3V_RUN R220 4
*1K_NC These are for CL_VREF0 CL_VREF1
R324 2 1 *2.2K_NC IMVP_PWRGD backdrive issue. RP15
2.2KX2
2

1
R339 10K PCIE_MCARD1_DET# SPKR
2

1
C325 R262 R203
1
3

0.1U 453/F C256 *453/F_NC


No Reboot strap. 26 ICH_SMBDATA 3 1 MEM_SDATA 15 *0.1U_NC

2
10

2
Low = Default. Q10 10
+3.3V_RUN SPKR 2N7002W
High = No Reboot.
R327 1 2 *10K_NC MCH_ICH_SYNC#_R +3.3V_RUN
R198 2 1 10K IRQ_SERIRQ
R197 2 1 10K THERM_ALERT#
2

D D
26 ICH_SMBCLK 3 1 MEM_SCLK 15
Q13
+3.3V_SUS 2N7002W QUANTA
R196 2
R191
1 10K
10K
SIO_EXT_SMI#
USB_MCARD1_DET# Title
COMPUTER
R194 2 1 10K RSV_WOL_EN ICH8-M (PM,GPIO,SMB,CL)

Size Document Number Rev


VM9/VM8 1A

Date: Saturday, June 21, 2008 Sheet 13 of 53


6 7 8

hexainf@hotmail.com
GRATIS - FOR FREE
1 2 3 4 5 6 7 8

2 U19E
+RTC_CELL +1.05V_VCCP
A23 VSS[001] VSS[099] K7

2
C254 C283 C255 A5 L1
VSS[002] VSS[100]

2
1U 0.1U *0.1U_NC C319 C286 AA2 L13
0603 0.1U 0.1U VSS[003] VSS[101]
AA7 L15

1
R311 100 10 10 10 U19F +1.05V_VCCP +1.5V_RUN VSS[004] VSS[102]
A25 L26

1
10 10 VSS[005] VSS[103]
+5V_RUN 1 2 AD25 VCCRTC VCC1_05[01] A13 AB1 VSS[006] VSS[104] L27
VCC1_05[02] B13 1 AB24 VSS[007] VSS[105] L4
D22 A16 C13 R244 10 AC11 L5
+ICH_V5REF_RUN V5REF[1] VCC1_05[03] VSS[008] VSS[106]
+3.3V_RUN 2 1 T7 V5REF[2] VCC1_05[04] C14 3 1 2 AC14 VSS[009] VSS[107] M12
VCC1_05[05] D14 AC25 VSS[010] VSS[108] M13

1
SDMK0340L-7-F C403 0805
G4 V5REF_SUS VCC1_05[06] E14 2 AC26 VSS[011] VSS[109] M14
1U F14 AC27 M15
A
0603 VCC1_05[07] D17 BAT54C T/R VSS[012] VSS[110] A
AA25 G14 AD17 M16

2
10 VCC1_5_B[01] VCC1_05[08] VSS[013] VSS[111]
Non-iAMT R313 100
AA26
AA27
VCC1_5_B[02] VCC1_05[09] L11
L12
AD20
AD28
VSS[014] VSS[112] M17
M23
VCC1_5_B[03] VCC1_05[10] VSS[015] VSS[113]
+5V_SUS 1 2 AB27 VCC1_5_B[04] VCC1_05[11] L14 AD29 VSS[016] VSS[114] M28
AB28 VCC1_5_B[05] VCC1_05[12] L16 AD3 VSS[017] VSS[115] M29
D23 AB29 L17 AD4 M3
+ICH_V5REF_SUS VCC1_5_B[06] VCC1_05[13] VSS[018] VSS[116]
+3.3V_SUS 2 1 D28 VCC1_5_B[07] VCC1_05[14] L18 AD6 VSS[019] VSS[117] N1
D29 VCC1_5_B[08] VCC1_05[15] M11 AE1 VSS[020] VSS[118] N11
1

CORE
SDMK0340L-7-F E25 M18 AE12 N12
C406 VCC1_5_B[09] VCC1_05[16] VSS[021] VSS[119]
E26 VCC1_5_B[10] VCC1_05[17] P11 1uH+-20%_800mA AE2 VSS[022] VSS[120] N13
1U E27 P18 AE22 N14
2

0603 VCC1_5_B[11] VCC1_05[18] +1.5V_RUN VSS[023] VSS[121]


F24 VCC1_5_B[12] VCC1_05[19] T11 AD1 VSS[024] VSS[122] N15
10 F25 T18 L25 1uH R316 1 AE25 N16
VCC1_5_B[13] VCC1_05[20] +1.5V_DMIPLL +1.5V_DMIPLL_R 2 VSS[025] VSS[123]
G24 VCC1_5_B[14] VCC1_05[21] U11 1 AE5 VSS[026] VSS[124] N17
H23 VCC1_5_B[15] VCC1_05[22] U18 AE6 VSS[027] VSS[125] N18
H24 VCC1_5_B[16] VCC1_05[23] V11 AE9 VSS[028] VSS[126] N26

2
J23 V12 C413 C295 AF14 N27
VCC1_5_B[17] VCC1_05[24] 0.01U 10U VSS[029] VSS[127]
J24 VCC1_5_B[18] VCC1_05[25] V14 AF16 VSS[030] VSS[128] N4
K24 V16 0603 AF18 N5

1
VCC1_5_B[19] VCC1_05[26] 25 6.3 VSS[031] VSS[129]
K25 VCC1_5_B[20] VCC1_05[27] V17 AF3 VSS[032] VSS[130] N6
+1.5V_RUN L23 V18 AF4 P12
VCC1_5_B[21] VCC1_05[28] VSS[033] VSS[131]
L24 VCC1_5_B[22] AG5 VSS[034] VSS[132] P13

VCCA3GP
L25 VCC1_5_B[23] VCCDMIPLL R29 AG6 VSS[035] VSS[133] P14
M24 VCC1_5_B[24] AH10 VSS[036] VSS[134] P15
L21 FB_330ohm+-25%_100mHz_ M25 AE28 +1.25V_RUN AH13 P16
VCC1_5_B[25] VCC_DMI[1] VSS[037] VSS[135]
BLM21PG331SN1D N23 AE29 Place C364,C373,C367 AH16 P17
1.5A_0.09 ohm DC VCC1_5_B[26] VCC_DMI[2] VSS[038] VSS[136]

1
0805 N24 +1.05V_VCCP +1.05V_VCCP AH19 P23
VCC1_5_B[27] close to AC23/AC24. VSS[039] VSS[137]
N25 AC23 C267 C418 AH2 P28
+1.5V_PCIE_ICH VCC1_5_B[28] V_CPU_IO[1] 0.1U 22U VSS[040] VSS[138]
P24 AC24 AF28 P29

2
VCC1_5_B[29] V_CPU_IO[2] 1206 VSS[041] VSS[139]
B
55 P25
R24
VCC1_5_B[30]
AF29 10 10
AH22
AH24
VSS[042] VSS[140] R11
R12
B

VCC1_5_B[31] VCC3_3[01] +3.3V_RUN VSS[043] VSS[141]

1
R25 C284 C277 C281 AH26 R13
VCC1_5_B[32] VSS[044] VSS[142]
1

R26 AD2 0.1U 0.1U 4.7U AH3 R14


VCC1_5_B[33] VCC3_3[02] VSS[045] VSS[143]
1

+ R27 AH4 R15

2
VCC1_5_B[34] VSS[046] VSS[144]

2
C405 C297 C340 C315 T23 AC8 10 10 10 AH8 R16
220U 22U 22U 2.2U VCC1_5_B[35] VCC3_3[03] C268 C273 VSS[047] VSS[145]
65 T24 AD8 AJ5 R17
2

VCCP_CORE
7343 1206 1206 0805 VCC1_5_B[36] VCC3_3[04] 0.1U 0.1U VSS[048] VSS[146]
T27 AE8 B11 R18

1
2.5 10 10 10 VCC1_5_B[37] VCC3_3[05] VSS[049] VSS[147]
T28 VCC1_5_B[38] VCC3_3[06] AF8 B14 VSS[050] VSS[148] R28
T29 10 10 B17 R4
VCC1_5_B[39] VSS[051] VSS[149]
U24 VCC1_5_B[40] VCC3_3[07] AA3 WWAN Noise - ICH improvements0805 B2 VSS[052] VSS[150] T12
U25 VCC1_5_B[41] VCC3_3[08] U7 B20 VSS[053] VSS[151] T13
V23 V7 +3.3V_RUN B22 T14
VCC1_5_B[42] VCC3_3[09] VSS[054] VSS[152]

2
V24 VCC1_5_B[43] VCC3_3[10] W1 B8 VSS[055] VSS[153] T15
V25 W6 C322 C24 T16
IDE

+1.5V_RUN VCC1_5_B[44] VCC3_3[11] 0.1U VSS[056] VSS[154]


W25 W7 C26 T17

1
VCC1_5_B[45] VCC3_3[12] VSS[057] VSS[155]

1
Y25 VCC1_5_B[46] VCC3_3[13] Y7 C27 VSS[058] VSS[156] T2
10 C282 C279 C276 C338 C6 U12
+VCCSATPLL 0.1U 0.1U 0.1U 0.1U VSS[059] VSS[157]
AJ6 A8 D12 U13

2
VCCSATAPLL VCC3_3[14] VSS[060] VSS[158]
VCC3_3[15] B15 D15 VSS[061] VSS[159] U14
+1.5V_RUN AE7 B18 10 10 10 10 D18 U15
VCC1_5_A[01] VCC3_3[16] VSS[062] VSS[160]

2
+VCCSATPLL_L AF7 B4 D2 U16
VCC1_5_A[02] VCC3_3[17] VSS[063] VSS[161]
ARX

AG7 B9 C329 C336 C287 D4 U17


VCC1_5_A[03] VCC3_3[18] VSS[064] VSS[162]
1

AH7 C15 0.1U 0.1U 0.1U E21 U23

1
VCC1_5_A[04] VCC3_3[19] VSS[065] VSS[163]
1

C274 AJ7 D13 E24 U26


PCI

L18 1U VCC1_5_A[05] VCC3_3[20] 10 10 10 VSS[066] VSS[164]


D5 E4 U27
2

10uH 0603 VCC3_3[21] VSS[067] VSS[165]


AC1 VCC1_5_A[06] VCC3_3[22] E10 E9 VSS[068] VSS[166] U3
0805 10uH+-20%_100mA 10 AC2 E7 F15 U5
VCC1_5_A[07] VCC3_3[23] +3.3V_SUS +3.3V_RUN VSS[069] VSS[167]
ATX

AC3 VCC1_5_A[08] VCC3_3[24] F11 Non-iAMT E23 VSS[070] VSS[168] V13


AC4 F28 V15
2

C
+VCCSATPLL VCC1_5_A[09] VSS[071] VSS[169] C
+1.5V_RUN AC5 VCC1_5_A[10] VCCHDA AC12 F29 VSS[072] VSS[170] V28
F7 VSS[073] VSS[171] V29
1

AC10 VCC1_5_A[11] VCCSUSHDA AD11 G1 VSS[074] VSS[172] W2

2
C265 C257 C278 AC9 E2 W26
VCC1_5_A[12] VSS[075] VSS[173]

2
1U 10U 1U J6 TP_VCCSUS1.05_1 C280 G10 W27
2

0603 0603 0603 VCCSUS1_05[1] TP_VCCSUS1.05_2 PAD T75 C275 0.1U VSS[076] VSS[174]
AA5 AF20 G13 Y28

1
10 6.3 10 VCC1_5_A[13] VCCSUS1_05[2] PAD T47 0.1U VSS[077] VSS[175]
AA6 G19 Y29

1
VCC1_5_A[14] TP_VCCSUS1.5_1 10 VSS[078] VSS[176]
VCCSUS1_5[1] AC16 PAD T59 G23 VSS[079] VSS[177] Y4
G12 10 G25 AB4
VCC1_5_A[15] TP_VCCSUS1.5_2 +3.3V_SUS VSS[080] VSS[178]
G17
H7
VCC1_5_A[16] VCCSUS1_5[2] J7 PAD T79 Non-iAMT G26
G27
VSS[081] VSS[179] AB23
AB5
VCC1_5_A[17] +VCCSUS3_3[0~6] VSS[082] VSS[180]
VCCSUS3_3[01] C3 H25 VSS[083] VSS[181] AB6
AC7 VCC1_5_A[18] H28 VSS[084] VSS[182] AD5

1
+1.5V_RUN AD7 AC18 C337 C248 H29 U4
VCC1_5_A[19] VCCSUS3_3[02] 0.022U 0.022U VSS[085] VSS[183]
VCCSUS3_3[03] AC21 H3 VSS[086] VSS[184] W24
D1 AC22 0603 0603 H6

2
VCCPSUS

VCCUSBPLL VCCSUS3_3[04] 16 16 VSS[087]


VCCSUS3_3[05] AG20 J1 VSS[088] VSS_NCTF[01] A1
+1.5V_RUN F1 VCC1_5_A[20] VCCSUS3_3[06] AH28 J25 VSS[089] VSS_NCTF[02] A2
USB CORE

L6 VCC1_5_A[21] J26 VSS[090] VSS_NCTF[03] A28


2

L7 VCC1_5_A[22] VCCSUS3_3[07] P6 J27 VSS[091] VSS_NCTF[04] A29


C407 C409 M6 P7 WWAN Noise - ICH improvements J4 AH1
0.1U 0.1U VCC1_5_A[23] VCCSUS3_3[08] VSS[092] VSS_NCTF[05]
M7 C1 J5 AH29
1

VCC1_5_A[24] VCCSUS3_3[09] +VCCSUS3_3[7~19] VSS[093] VSS_NCTF[06]


VCCSUS3_3[10] N7 K23 VSS[094] VSS_NCTF[07] AJ1
10 10 W23 P1 K28 AJ2
VCC1_5_A[25] VCCSUS3_3[11] VSS[095] VSS_NCTF[08]
1

1
P2 C288 C310 C311 C314 C296 K29 AJ28
TP_VCCSUSLAN1 F17 VCCSUS3_3[12] *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC 0.1U VSS[096] VSS_NCTF[09]
T83 P3 K3 AJ29
VCCPUSB

PAD TP_VCCSUSLAN2 G18 VCCLAN1_05[1] VCCSUS3_3[13] VSS[097] VSS_NCTF[10]


Non-iAMT T81 P4 K6 B1
2

2
PAD VCCLAN1_05[2] VCCSUS3_3[14] 10 10 10 10 10 VSS[098] VSS_NCTF[11]
VCCSUS3_3[15] P5 VSS_NCTF[12] B29
+3.3V_RUN F19 VCCLAN3_3[1] VCCSUS3_3[16] R1
D G20 R3 NH82801HBM-SLA5Q-MM#888654 D
VCCLAN3_3[2] VCCSUS3_3[17]
2

C320 +1.5V_RUN R5
0.1U VCCSUS3_3[18]
A24 VCCGLANPLL VCCSUS3_3[19] R6
2

QUANTA
1

GLAN POWER

10 C343 A26 G22 TP_VCCCL1.05


+1.5V_PCIE_ICH 0.1U VCCGLAN1_5[1] VCCCL1_05 PAD T80
A27
1

VCCGLAN1_5[2] +VCCCL1_5
B26 VCCGLAN1_5[3] VCCCL1_5 A22
COMPUTER
2

10 B27 C342 C350


VCCGLAN1_5[4] *0.1U_NC *1U_NC Title
B28 VCCGLAN1_5[5] VCCCL3_3[1] F20 +3.3V_RUN
1

C404 G21 0603 ICH8-M (POWER,GND)


1

4.7U VCCCL3_3[2] 10 10
B25 VCCGLAN3_3 Non-iAMT Size Document Number Rev
2

6.3 NH82801HBM-SLA5Q-MM#888654 VM9/VM8 1A


+3.3V_RUN
Date: Tuesday, June 17, 2008 Sheet 14 of 53
6 7 8

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GRATIS - FOR FREE
1 2 3 4 5 6 7 8

A is required to route to Top +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS


DDR_A_DM[0..7] 7
SoDIMM for AMTto function. DDR_A_D[0..63] 7 DDR_B_DM[0..7] 7
V_DDR_MCH_REF V_DDR_MCH_REF
DDR_A_DQS[0..7] 7 DDR_B_D[0..63] 7
Ch.A SODIMM needs to be DDR_A_DQS#[0..7] 7 DDR_B_DQS[0..7] 7
populated for Intel AMT support. DDR_A_MA[0..13] 7,16 DDR_B_DQS#[0..7] 7
CN6 CN4
DDR_B_MA[0..13] 7,16
1 VREF VSS46 2 1 VREF VSS46 2
3 4 DDR_A_D4 V_DDR_MCH_REF 3 4 DDR_B_D4
DDR_A_D0 VSS47 DQ4 DDR_A_D5 DDR_B_D0 VSS47 DQ4 DDR_B_D1 V_DDR_MCH_REF
5 DQ0 DQ5 6 5 DQ0 DQ5 6
DDR_A_D1 7 8 DDR_B_D5 7 8
DQ1 VSS15 DDR_A_DM0 DQ1 VSS15 DDR_B_DM0
9 VSS37 DM0 10 9 VSS37 DM0 10
DDR_A_DQS#0 11 12 DDR_B_DQS#0 11 12
DQS#0 VSS5 DQS#0 VSS5

1
DDR_A_DQS0 13 14 DDR_A_D7 DDR_B_DQS0 13 14 DDR_B_D6
DQS0 DQ6 DQS0 DQ6

1
A A
15 16 DDR_A_D6 C316 C312 15 16 DDR_B_D3
DDR_A_D3 VSS48 DQ7 0.1U 2.2U DDR_B_D2 VSS48 DQ7 C294 C298
17 18 17 18

2
DDR_A_D2 DQ2 VSS16 DDR_A_D13 0603 DDR_B_D7 DQ2 VSS16 DDR_B_D12 0.1U 2.2U
19 20 19 20

2
DQ3 DQ12 DDR_A_D9 10 6.3 DQ3 DQ12 DDR_B_D13 0603
21 VSS38 DQ13 22 21 VSS38 DQ13 22
DDR_A_D12 23 24 DDR_B_D8 23 24 10 6.3
DDR_A_D8 DQ8 VSS17 DDR_A_DM1 DDR_B_D9 DQ8 VSS17 DDR_B_DM1
25 DQ9 DM1 26 25 DQ9 DM1 26
27 VSS49 VSS53 28 27 VSS49 VSS53 28
DDR_A_DQS#1 29 30 DDR_B_DQS#1 29 30
DQS#1 CK0 M_CLK_DDR0 6 DQS#1 CK0 M_CLK_DDR3 6
DDR_A_DQS1 31 32 DDR_B_DQS1 31 32
DQS1 CK0# M_CLK_DDR#0 6 DQS1 CK0# M_CLK_DDR#3 6
33 VSS39 VSS41 34 33 VSS39 VSS41 34
DDR_A_D10 35 36 DDR_A_D14 DDR_B_D10 35 36 DDR_B_D14
DDR_A_D11 DQ10 DQ14 DDR_A_D15 DDR_B_D11 DQ10 DQ14 DDR_B_D15
37 DQ11 DQ15 38 37 DQ11 DQ15 38
39 VSS50 VSS54 40 39 VSS50 VSS54 40

41 42 41 42

PC4800 DDR2 SDRAM


DDR_A_D21 VSS18 VSS20 DDR_A_D20 DDR_B_D17 VSS18 VSS20 DDR_B_D16
43 DQ16 DQ20 44 43 DQ16 DQ20 44
DDR_A_D17 45 46 DDR_A_D16 DDR_B_D20 45 46 DDR_B_D21
DQ17 DQ21 DQ17 DQ21
47 VSS1 VSS6 48 47 VSS1 VSS6 48
DDR_A_DQS#2 49 50 PM_EXTTS#0 DDR_B_DQS#2 49 50 PM_EXTTS#1

PC4800 DDR2 SDRAM


DQS#2 NC3 PM_EXTTS#0 6 DQS#2 NC3 PM_EXTTS#1 6
DDR_A_DQS2 51 52 DDR_A_DM2 DDR_B_DQS2 51 52 DDR_B_DM2

DDR_A_D22
53
55
DQS2
VSS19 SO-DIMM (200P)DM2
VSS21 54
56 DDR_A_D18 DDR_B_D22
53
55
DQS2
VSS19
DM2
VSS21 54
56 DDR_B_D18 +1.8V_SUS Place these Caps near So-Dimm1.
DDR_A_D23 DQ18 DQ22 DDR_A_D19 DDR_B_D19 DQ18 DQ22 DDR_B_D23
57 DQ19 DQ23 58 57 DQ19 DQ23 58

SO-DIMM (200P)
59 VSS22 VSS24 60 59 VSS22 VSS24 60
DDR_A_D24 61 62 DDR_A_D29 DDR_B_D29 61 62 DDR_B_D24
DDR_A_D25 DQ24 DQ28 DDR_A_D28 DDR_B_D28 DQ24 DQ28 DDR_B_D25
63 DQ25 DQ29 64 63 DQ25 DQ29 64

1
65 66 65 66 C347 C345 C348 C346 C425
DDR_A_DM3 VSS23 VSS25 DDR_A_DQS#3 DDR_B_DM3 VSS23 VSS25 DDR_B_DQS#3 2.2U 2.2U 2.2U 2.2U 2.2U
67 DM3 DQS#3 68 67 DM3 DQS#3 68
69 70 DDR_A_DQS3 69 70 DDR_B_DQS3 0603 0603 0603 0603 0603

2
NC4 DQS3 NC4 DQS3 6.3 6.3 6.3 6.3 6.3
B 71 VSS9 VSS10 72 71 VSS9 VSS10 72 B
DDR_A_D30 73 74 DDR_A_D31 DDR_B_D26 73 74 DDR_B_D31
DDR_A_D26 DQ26 DQ30 DDR_A_D27 DDR_B_D27 DQ26 DQ30 DDR_B_D30
75 DQ27 DQ31 76 75 DQ27 DQ31 76
77 VSS4 VSS8 78 77 VSS4 VSS8 78
79 80 79 80 +1.8V_SUS
6,16 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 6,16 6,16 DDR_CKE3_DIMMB CKE0 CKE1 DDR_CKE4_DIMMB 6,16
81 VDD7 VDD8 82 81 VDD7 VDD8 82
83 NC1 A15 84 83 NC1 A15 84 Place these Caps near So-Dimm2.
DDR_A_BS2 85 86 DDR_B_BS2 85 86
7,16 DDR_A_BS2 A16_BA2 A14 DDR_A_MA14 6,16 7,16 DDR_B_BS2 A16_BA2 A14 DDR_B_MA14 6,16
87 VDD9 VDD11 88 87 VDD9 VDD11 88
DDR_A_MA12 89 90 DDR_A_MA11 DDR_B_MA12 89 90 DDR_B_MA11
A12 A11 A12 A11

1
DDR_A_MA9 91 92 DDR_A_MA7 DDR_B_MA9 91 92 DDR_B_MA7 C420 C422 C423 C424 C421
DDR_A_MA8 A9 A7 DDR_A_MA6 DDR_B_MA8 A9 A7 DDR_B_MA6 2.2U 2.2U 2.2U 2.2U 2.2U
93 A8 A6 94 93 A8 A6 94
95 96 95 96 0603 0603 0603 0603 0603

2
DDR_A_MA5 VDD5 VDD4 DDR_A_MA4 DDR_B_MA5 VDD5 VDD4 DDR_B_MA4 6.3 6.3 6.3 6.3 6.3
97 A5 A4 98 97 A5 A4 98
DDR_A_MA3 99 100 DDR_A_MA2 DDR_B_MA3 99 100 DDR_B_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0 DDR_B_MA1 A3 A2 DDR_B_MA0
101 A1 A0 102 101 A1 A0 102
103 VDD10 VDD12 104 103 VDD10 VDD12 104
DDR_A_MA10 105 106 DDR_A_BS1 DDR_B_MA10 105 106 DDR_B_BS1
DDR_A_BS0 A10/AP BA1 DDR_A_RAS# DDR_A_BS1 7,16 DDR_B_BS0 A10/AP BA1 DDR_B_RAS# DDR_B_BS1 7,16
107 108 107 108 +1.8V_SUS
7,16 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 7,16 7,16 DDR_B_BS0 BA0 RAS# DDR_B_RAS# 7,16
DDR_A_WE# 109 110 DDR_B_WE# 109 110 Place these Caps near So-Dimm1.
7,16 DDR_A_WE# WE# S0# DDR_CS0_DIMMA# 6,7,16 7,16 DDR_B_WE# WE# S0# DDR_CS2_DIMMB# 6,16
111 VDD2 VDD1 112 111 VDD2 VDD1 112
DDR_A_CAS# 113 114 M_ODT0 DDR_B_CAS# 113 114 M_ODT2
7,16 DDR_A_CAS# CAS# ODT0 M_ODT0 6,16 7,16 DDR_B_CAS# CAS# ODT0 M_ODT2 6,16
115 116 DDR_A_MA13 115 116 DDR_B_MA13
6,16 DDR_CS1_DIMMA# S1# A13 6,7,16 DDR_CS3_DIMMB# S1# A13

1
117 118 117 118 + C452
M_ODT1 VDD3 VDD6 M_ODT3 VDD3 VDD6 C356 C352 C353 C355 *330U_NC
6,16 M_ODT1 119 ODT1 NC2 120 6,16 M_ODT3 119 ODT1 NC2 120
121 122 121 122 0.1U 0.1U 0.1U 0.1U 7343

2
DDR_A_D36 VSS11 VSS12 DDR_A_D33 DDR_B_D32 VSS11 VSS12 DDR_B_D36 6.3
123 DQ32 DQ36 124 123 DQ32 DQ36 124
DDR_A_D37 125 126 DDR_A_D32 DDR_B_D33 125 126 DDR_B_D37 10 10 10 10
DQ33 DQ37 DQ33 DQ37
127 VSS26 VSS28 128 127 VSS26 VSS28 128
DDR_A_DQS#4 129 130 DDR_A_DM4 DDR_B_DQS#4 129 130 DDR_B_DM4 +1.8V_SUS
C
DDR_A_DQS4 DQS#4 DM4 DDR_B_DQS4 DQS#4 DM4 C
131 DQS4 VSS42 132 131 DQS4 VSS42 132 Place these Caps near So-Dimm2.
133 134 DDR_A_D34 133 134 DDR_B_D38
DDR_A_D35 VSS2 DQ38 DDR_A_D39 DDR_B_D34 VSS2 DQ38 DDR_B_D39
135 DQ34 DQ39 136 135 DQ34 DQ39 136
DDR_A_D38 137 138 +3.3V_RUN DDR_B_D35 137 138
DQ35 VSS55 Non-iAMT DQ35 VSS55

1
139 140 DDR_A_D44 139 140 DDR_B_D44
DDR_A_D41 VSS27 DQ44 DDR_A_D45 DDR_B_D41 VSS27 DQ44 DDR_B_D45 C349 C359 C357 C351
141 DQ40 DQ45 142 141 DQ40 DQ45 142
DDR_A_D40 143 144 DDR_B_D40 143 144 0.1U 0.1U 0.1U 0.1U

2
DQ41 VSS43 DQ41 VSS43
1

145 146 DDR_A_DQS#5 145 146 DDR_B_DQS#5


DDR_A_DM5 VSS29 DQS#5 DDR_A_DQS5 C269 C272 DDR_B_DM5 VSS29 DQS#5 DDR_B_DQS5 10 10 10 10
147 DM5 DQS5 148 147 DM5 DQS5 148
149 150 2.2U 0.1U 149 150
2

DDR_A_D42 VSS51 VSS56 DDR_A_D43 0603 DDR_B_D47 VSS51 VSS56 DDR_B_D43


151 DQ42 DQ46 152 151 DQ42 DQ46 152
DDR_A_D46 153 154 DDR_A_D47 6.3 10 DDR_B_D42 153 154 DDR_B_D46
DQ43 DQ47 DQ43 DQ47
155 VSS40 VSS44 156 155 VSS40 VSS44 156
DDR_A_D48 157 158 DDR_A_D52 DDR_B_D52 157 158 DDR_B_D48
DDR_A_D53 DQ48 DQ52 DDR_A_D49 DDR_B_D49 DQ48 DQ52 DDR_B_D55
159 DQ49 DQ53 160 159 DQ49 DQ53 160
161 VSS52 VSS57 162 161 VSS52 VSS57 162
163 NCTEST CK1 164 M_CLK_DDR1 6 163 NCTEST CK1 164 M_CLK_DDR4 6
165 VSS30 CK1# 166 M_CLK_DDR#1 6 165 VSS30 CK1# 166 M_CLK_DDR#4 6
DDR_A_DQS#6 167 168 DDR_B_DQS#6 167 168 +3.3V_RUN
DDR_A_DQS6 169
DQS#6 VSS45
170 DDR_A_DM6 DDR_B_DQS6 169
DQS#6 VSS45
170 DDR_B_DM6 Non-iAMT
DQS6 DM6 DQS6 DM6
171 VSS31 VSS32 172 171 VSS31 VSS32 172
DDR_A_D50 173 174 DDR_A_D51 DDR_B_D54 173 174 DDR_B_D53
DQ50 DQ54 DQ50 DQ54

1
DDR_A_D54 175 176 DDR_A_D55 DDR_B_D51 175 176 DDR_B_D50
DQ51 DQ55 DQ51 DQ55 C299 C313
177 VSS33 VSS35 178 177 VSS33 VSS35 178
DDR_A_D56 179 180 DDR_A_D60 DDR_B_D56 179 180 DDR_B_D61 2.2U 0.1U

2
DDR_A_D61 DQ56 DQ60 DDR_A_D57 DDR_B_D57 DQ56 DQ60 DDR_B_D60 0603
181 DQ57 DQ61 182 181 DQ57 DQ61 182
183 184 183 184 6.3 10
DDR_A_DM7 VSS3 VSS7 DDR_A_DQS#7 DDR_B_DM7 VSS3 VSS7 DDR_B_DQS#7
185 DM7 DQS#7 186 185 DM7 DQS#7 186
187 188 DDR_A_DQS7 187 188 DDR_B_DQS7
D DDR_A_D59 189
VSS34 DQS7
190 DDR_B_D62 189
VSS34 DQS7
190
Non-iAMT D
DDR_A_D62 DQ58 VSS36 DDR_A_D58 DDR_B_D59 DQ58 VSS36 DDR_B_D58
191 DQ59 DQ62 192 Non-iAMT 191 DQ59 DQ62 192
193 194 DDR_A_D63 193 194 DDR_B_D63
MEM_SDATA VSS14 DQ63 MEM_SDATA VSS14 DQ63 +3.3V_RUN
195 196 195 196
13
13
MEM_SDATA
MEM_SCLK
+3.3V_RUN
MEM_SCLK 197
199
SDA
SCL
VSS13
SA0 198
200 +3.3V_RUN
MEM_SCLK 197
199
SDA
SCL
VSS13
SA0 198
200
R276 10K
2 1
QUANTA
VDD(SPD) SA1 VDD(SPD) SA1
COMPUTER
2

DDR2_SODIMM 2-1734073-2
SMbus address A0 R239 R246 SMbus address A4 R277 Title
10K 10K 10K DDR2 SO-DIMM (200P) X 2
Non-iAMT CLOCK 0,1 CLOCK 2,3
Size Document Number Rev
CKE 0,1 CKE 2,3
1

VM9/VM8 1A

Date: Friday, May 30, 2008 Sheet 15 of 53


6 7 8

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1 2 3 4 5 6 7 8

+0.9V_DDR_VTT Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.

A A

1
C334 C301 C305 C306 C307 C302 C308 C293 C318 C291 C292 C309 C303 C304
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U

2
10 10 10 10 10 10 10 10 10 10 10 10 10 10

+0.9V_DDR_VTT

1
C261 C262 C258 C290 C263 C317 C259 C271 C270 C264 C260 C327 C300 C285
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
2

2
10 10 10 10 10 10 10 10 10 10 10 10 10 10

7,15 DDR_A_MA[0..13]
B B
+0.9V_DDR_VTT
DDR_B_MA[0..13] 7,15
RP27 RP38
DDR_A_MA7 2 1 1 2 DDR_B_MA7
DDR_A_MA11 4 3 3 4 DDR_B_MA11

56x2 56x2
RP28 RP37
DDR_A_MA4 2 1 1 2 DDR_B_MA6
DDR_A_MA6 4 3 3 4 DDR_B_MA4

56x2 56x2
RP25 RP35
DDR_A_RAS# 2 1 1 2 DDR_B_RAS#
7,15 DDR_A_RAS# DDR_A_BS1 DDR_B_BS1 DDR_B_RAS# 7,15
7,15 DDR_A_BS1 4 3 3 4 DDR_B_BS1 7,15
56x2 56x2
RP24 RP34
DDR_A_MA13 2 1 1 2 M_ODT2
M_ODT0 DDR_B_MA13 M_ODT2 6,15
6,15 M_ODT0 4 3 3 4

56x2 56x2
RP20 RP31
DDR_A_BS2 2 1 1 2 DDR_B_MA3
7,15 DDR_A_BS2 DDR_A_MA12 DDR_B_MA1
4 3 3 4

56x2 56x2
RP19 RP33
C C
DDR_A_MA9 2 1 1 2 DDR_B_MA8
Please these resistor DDR_A_MA8 4 3 3 4 DDR_B_MA12 Please these resistor
closely DIMMB,all closely DIMMA,all
56x2 56x2
trace length<750 mil. RP18 RP32 trace length<750 mil.
DDR_A_MA3 2 1 1 2 DDR_B_MA5
DDR_A_MA5 4 3 3 4 DDR_B_MA9

56x2 56x2
RP17 RP30
DDR_A_MA10 2 1 1 2 DDR_B_WE#
DDR_A_BS0 DDR_B_BS0 DDR_B_WE# 7,15
7,15 DDR_A_BS0 4 3 3 4 DDR_B_BS0 7,15
56x2 56x2
RP16 RP29
DDR_A_CAS# 2 1 1 2 DDR_B_CAS#
7,15 DDR_A_CAS# DDR_B_CAS# 7,15
DDR_A_WE# 4 3 3 4 DDR_B_MA10
7,15 DDR_A_WE#
56x2 56x2
RP26 RP36
DDR_A_MA0 2 1 1 2 DDR_B_MA0
DDR_A_MA2 4 3 3 4 DDR_B_MA2

56x2 56x2
R212 1 2 56 R253 2 1 56
6,15 M_ODT1 M_ODT3 6,15
DDR_A_MA1 R214 1 2 56 R251 2 1 56
DDR_B_BS2 7,15
R243 1 2 56 R268 2 1 56
6,7,15 DDR_CS0_DIMMA# DDR_CS2_DIMMB# 6,15
R213 1 2 56 R254 2 1 56
6,15 DDR_CS1_DIMMA# DDR_CS3_DIMMB# 6,7,15
R215 1 2 56 R255 2 1 56
6,15 DDR_CKE0_DIMMA DDR_CKE3_DIMMB 6,15
D R233 1 2 56 R269 2 1 56 D
6,15 DDR_CKE1_DIMMA DDR_CKE4_DIMMB 6,15
R245 1 2 56 R267 2 1 56
6,15 DDR_A_MA14 DDR_B_MA14 6,15

QUANTA
Title
COMPUTER
DDR2 RES ARRAY

Size Document Number Rev


VM9/VM8 1A

Date: Friday, May 30, 2008 Sheet 16 of 53


6 7 8

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GRATIS - FOR FREE
1 2 3 4 5 6 7 8

Add capacitor pads for improving WWAN.

C82 20P 50 CLK_ICH_48M U5


C59 1 2 *27P_NC 50 CLK_ICH_14M
C62 1 2 *27P_NC 50 CLK_PCI_8512
C61 1 2 *27P_NC 50 CLK_PCI_PCCARD +CK_VDD_PCI 9 61 CPU_BCLK 4 3 RP5
CLK_PCI_ICH VDD_PCI CPU-0 CPU_BCLK# CLK_CPU_BCLK 3
C63 1 2 *27P_NC 50 4 60 2 1 0x2
VDD_REF CPU-0# CLK_CPU_BCLK# 3
+CK_VDD_PLL3 23
+CK_VDD_48 VDD_PLL3 MCH_BCLK
16 VDD_48 CPU-1 58 4 3 RP6 CLK_MCH_BCLK 5
+CK_VDD_SRC 46 57 MCH_BCLK# 2 1 0x2
VDD_SRC CPU-1# CLK_MCH_BCLK# 5
62
A
+CK_VDD_MAIN 19
VDD_CPU

VDD_IO
CK505 SRC-8/CPU_ITP
SRC-8#/CPU_ITP#
54
53
PCIE_MINI1
PCIE_MINI1#
4
2
3 RP8
1 0x2
CLK_PCIE_MINI1 26
CLK_PCIE_MINI1# 26
A

Y2 27
CLK_XTAL_IN 1 2 CLK_XTAL_OUT 33
VDD_IO
VDD_IO
QFN64
43 20 DOT96_SSC 3 4 RP4
VDD_IO SRC-0/DOT96 MCH_DREFCLK 6
14.318MHZ 52 21 DOT96_SSC# 1 2 0x2
VDD_IO SRC-0#/DOT96# MCH_DREFCLK# 6
2

2
C67 C77 56
33P 33P VDD_IO 27M_SS
SRC-1/SE1 24 3 4 RP7 DREF_SSCLK 6
15 25 27M_NSS 1 2 0x2 +3.3V_RUN
1

1
GND SRC-1#/SE2 DREF_SSCLK# 6
50 50 18
14.318MHz 22
GND
28 PCIE_SATA 2 1 RP9
GND SRC-2/SATA CLK_PCIE_SATA 11
26 29 PCIE_SATA# 4 3 0x2
GND SRC-2#/SATA# CLK_PCIE_SATA# 11
30 H_STP_PCI# R80 2 1 *10K_NC
GND H_STP_CPU# R81
36 GND CR#_C/SRC-3 31 2 1 *10K_NC
SATA_CLKREQ# R60 1 2 475/F 49 32
13 SATA_CLKREQ# GND CR#_D/SRC-3#
CLK_3GPLLREQ# R63 1 2 475/F 59
6 CLK_3GPLLREQ# GND MCH_3GPLL 1 RP12
1 GND SRC-4 34
35 MCH_3GPLL#
2
4 3 0x2
CLK_MCH_3GPLL 6 Silego need pull up
SRC-4# CLK_MCH_3GPLL# 6
25,26 CLK_LPC_DEBUG
CLK_LPC_DEBUG R46
CLK_PCI_PCCARD R56
1 2 *22_NC SATA_CLKREQ#_C
CLK_3GPLLREQ#_C
8 CR#_A/PCI-0 but other?
20 CLK_PCI_PCCARD 2 1 33 10 CR_B/PCI-1 PCI_STOP#/SRC-5 45 H_STP_PCI# 13
PCI_PCCARD 11 44
TME/PCI-2 CPU_STOP#/SRC5-5# H_STP_CPU# 13
CLK_PCI_8512 R64 2 1 33 PCI_SIO 12
23 CLK_PCI_8512 27M_SEL SRC5_EN/PCI-3
13 27M_SEL/PCI-4 SRC-6 48
CLK_PCI_ICH R54 2 1 33 PCI_ICH 14 47
12 CLK_PCI_ICH ITP_EN/PCIF-5# SRC-6#
CLK_ICH_48M R72 2 1 33 51 MINI1CLK_REQ#_C R76 1 2 475/F MINI1CLK_REQ#
13 CLK_ICH_48M CR#_F/SRC-7 MINI1CLK_REQ# 26
50 SRC-7#
L6 R68 FSA CR#_E/SRC-7#
3,6 CPU_MCH_BSEL0 1 2 8.2K 17 FSA/USB48
BLM18AG601SN1D R73 1 2 8.2K FSB 64 37
3,6 CPU_MCH_BSEL1 FSB/TEST_MODE SRC-9
B L5 R61 1 2 8.2K FSC 5 38 B
3,6 CPU_MCH_BSEL2 FSC/TEST_SEL/REF SRC-9#
BLM18AG601SN1D
CLK_ICH_14M R52 2 1 33 55 41 PCIE_ICH 2 1 RP10
13 CLK_ICH_14M RESET# SRC-10 CLK_PCIE_ICH 12
63 42 PCIE_ICH# 4 3 0x2
13 CLK_PWRGD CK_PWRGD/PD# SRC-10# CLK_PCIE_ICH# 12
CLK_XTAL_OUT 2 40 PCIE_LOM 4 3 RP11
XOUT CR#_H/SRC-11 CLK_PCIE_LOM 34
CLK_XTAL_IN 3 XIN CR#_G/SRC-11# 39 PCIE_LOM# 2 1 0x2 CLK_PCIE_LOM# 34
CLK_SDATA 6
CLK_SCLK SDATA
7 SCLK GND 65

+3.3V_RUN
SLG8SP513V
CLK_3GPLLREQ# R55 2 1 10K
SATA_CLKREQ# R47 2 1 10K
SRC-7# R79 2 1 10K
MINI1CLK_REQ# R77 2 1 10K
PCI_PCCARD R45 1 2 *10K_NC

+3.3V_RUN
+3.3V_RUN UMA without iAMT
PCI_SIO R57 1 2 *10K_NC
L8 BLM21PG600SN1D

2
+CK_VDD_MAIN
0805 R59
120 ohms@100Mhz *10K_NC
1

C87 C83 C90 C89 C86 C88 C91 FSC FSB FSA CPU SRC PCI

1
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U *10U_NC
2

0603 PCI_ICH 1 0 1 100 100 33


C C
10 10 10 10 10 10 6.3
0 0 1 133 100 33

2
L9 BLM21PG600SN1D R65 2.2 +3.3V_RUN 0 1 1 166 100 33
1 2 +CK_VDD_PCI Non-iAMT R53
0805 0 1 0 200 100 33
SMbus address D2 *10K_NC
1

120 ohms@100Mhz
2
4
C78 0 0 0 266 100 33

1
0.1U These are for
2

backdrive issue. RP3 1 0 0 333 100 33


10 2.2KX2
R83 2.2 1 1 0 400 100 33
2

1 2 +CK_VDD_PLL3 R185 POP: For Internal pull-low.


1
3

R439 POP: For internal pull-high. 1 1 1 RSVD 100 33


1

3 1 CLK_SDATA
18,23,31 SMBDAT1
C85
Q4
0.1U 27M_SEL
2

2N7002W
10 +3.3V_RUN
27M_SEL PIN20 PIN21 PIN24 PIN25
R66 2.2
1 2 +CK_VDD_48 (PIN13)

2
96/ 96/
+3.3V_RUN R48 0=UMA DOT96T DOT96C 100M_T 100M_C
1

*10K_NC
C80 C79
0.1U 4.7U 1 = Disc.
2

1
0603
10 6.3 27M_SEL GRFX down SRCT0 SRCC0 27Mout 27MSSout
D D

R376 2.2
2

2
1 2 +CK_VDD_SRC
R58 QUANTA
1

3 1 CLK_SCLK 10K
18,23,31 SMBCLK1
C84
0.1U Q3
COMPUTER
2

2N7002W Title
10 CLOCK GENERATOR

Size Document Number Rev


VM9/VM8 1A

Date: Friday, May 30, 2008 Sheet 17 of 53


6 7 8

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GRATIS - FOR FREE
5 4 3 2 1

+LCDVCC +3.3V_RUN
J2
+15V_ALW +3.3V_RUN +LCDVCC 40
Q37 40
39 39 LCD_ACLK- 6
FDC655BN 38
38 LCD_ACLK+ 6

1
6 37 37

2
5 4 36 C98 C95 C489
36 LCD_A2- 6
R365 2 35 0.1U 0.047U 0.1U

2
35 LCD_A2+ 6
330K 1 34
34

2
33 10 10 10
33 LCD_A1- 6

2
R357 32

3
D 32 LCD_A1+ 6 D
47 C472 C92 31
LCDVCC_ON 0805 22U 0.01U 31
30

1
30 LCD_A0- 6
1206 29

1
29 LCD_A0+ 6

2
10 25 28
28

2
27 27 LCD_DDCCLK 6
R369 C479 26
26 LCD_DDCDAT 6
*100K_NC 0.01U 25

1
25 25 USBP4_D+ GFX_PWR_SRC +5V_RUN
24

1
24 USBP4_D-
23 23
22
34
+3.3V_RUN +3.3V_SUS 22
21 21 +5V_RUN

3
20 20 DMIC_CLK 32

1
2 2 19 19 DMIC_DATA 32
Q31 18 C103 C112 C481
18

1
Q30 2N7002W 17 0.1U 0.1U 0.1U

1
+3.3V_RUN

2
R371 R353 2N7002W 17 0603 0603 0603
16 16
R377 *47K_NC 47K 15 50 50 50
*0_NC 15 +LCDVCC
14 14
Support the new imbeded 13

2
13 LCD_TST 23
12
diagnostics. 12
11
11 GFX_PWR_SRC
10 10

3
1 9 BACKLITEON Adress : A9H --Contrast
6 ENVDD 9
8
3 EN_LCDVCC 2
8
7 AAH --Backlight
Q38 7
6 6 SMBCLK1 17,23,31
2 D25 DDTC124EUA-7-F 5
23 LCDVCC_TST_EN 5 SMBDAT1 17,23,31
BAT54C T/R 4

1
4 INVERTER_CBL_DET# 23
3 3 LCD_BAK# 23
C
2 2 PWM_VADJ 23
C

1 1 LCD_CBL_DET# 23
20439-040E

1
C122 C123
*47P_NC *47P_NC

2
50 50

UMA
Populate R351 for DPST L7 1206
12 ICH_USBP4+ 4 3 USBP4_D+
implementation only. USBP4_D-
12 ICH_USBP4- 1 2
+PWR_SRC
Populate R346 for *PLW3216S900SQ2T1_NC GFX_PWR_SRC
SJ15
platform without DPST 40mil 1 2
40mil
support. No Stuff for 1 2
Discrete DSPT support
48 1
R70
2
*0_NC
due to back up plan.
1 2
R71 *0_NC
+3.3V_RUN
2

R356
B *10K_NC B
1

BACKLITEON
6 BIA_PWM

A A

QUANTA
Title
COMPUTER
LCD CONN & CK-SSCD

Size Document Number Rev


VM9/VM8 1A

Date: Thursday, June 12, 2008 Sheet 18 of 53


2 1

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GRATIS - FOR FREE
A B C D E

4 4

+3.3V_RUN +5V_RUN

2
1

2
D1
SDM10K45-7-F

1
Layout Note:
Setting R,G,B treac D27 D28 D29
60
44

3
impedance to 50 ohm. *DA204U_NC *DA204U_NC *DA204U_NC
+5V_CRT_REF
L35 BLM18BB750SN1D RED
6 VGA_RED
0603

16
L34 BLM18BB750SN1D GREEN JVGA1
6 VGA_GRN
0603 070546FR015S205ZL
6
1 11 M_SEN#_R T2 PAD
L36 BLM18BB750SN1D BLUE 7
6 VGA_BLU
0603 2 12
2

3 1 8 3

1
R393 R388 R394 C525 C524 C526 C527 C528 C529 3 13
150/F 150/F 150/F *22P_NC *22P_NC *22P_NC *10P_NC *10P_NC *10P_NC 9
PAD T1 M_ID2# 4 14
2

2
50 50 50 50 50 50 10
1

5 15

17
+3.3V_RUN CRT_VCC

3
1

3
1
2
RP2 C6 RP1
2.2KX2 0.01U 2.2KX2
Q1

1
BSS138_NL 25
+5V_RUN CRT_VCC

4
2

4
2
1 3 G_DAT_DDC2_C
6 G_DAT_DDC2
D2
R7 1K
2 1 2 1

2
+3.3V_RUN
5

SDM10K45-7-F

2
U2
R1 10
2 4 VGAHSYNC_R 1 2 1 3 G_CLK_DDC2_C
6 VGAHSYNC 6 G_CLK_DDC2

1
2 2
74AHCT1G125GW Q2
BSS138_NL C2 C1
C5 0.1U Place near *10P_NC *10P_NC

2
2 1 U1,U3 < 200
50 50
mil L2 BLM11A05S
HSYNC JVGA_HS
5

10 0603
U1
R2 10 L1 BLM11A05S
2 4 VGAVSYNC_R 1 2 VSYNC JVGA_VS
6 VGAVSYNC
0603

1
74AHCT1G125GW
C8 C7 C3 C4
*10P_NC *10P_NC 10P 10P
2

2
50 50 50 50

Place near JVGA1 connector <


200 mil

1 1

QUANTA
Title
COMPUTER
CRT&TV CONN

Size Document Number Rev


VM9/VM8 1A

Date: Friday, May 30, 2008 Sheet 19 of 53


D E

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GRATIS - FOR FREE
A B C D E

2 +3.3V_R5C847
AS CLOSE AS POSSIBLE TO DEVICE TERMINALS

1
C144 C164 C174 C149
10U 0.01U 0.01U *0.01U_NC
1 0603 25 25 25 1

2
6.3

+3.3V_R5C847
+3.3V_R5C847 2
AS CLOSE AS POSSIBLE TO DEVICE TERMINALS U10A Place the power caps close +3.3V_RUN +3.3V_R5C847
to the relation pins. SJ12
W3 F5 1 2
VCC_PCI1 VCC_3V1 1 2

1
C153 C183 C186 C190 R11 J19
10U 0.1U 0.01U *0.01U_NC VCC_PCI2 VCC_3V2
R12 K19
VCC_PCI3 VCC_3V3

1
0603 G5 C162 C194 C196 C195 C171 C139

2
6.3 10 25 25 VCC_3V4 *0.01U_NC 0.01U *0.01U_NC 0.01U 0.01U 10U
25 25 25 25 25 0603

2
R6 6.3
VCC_RIN1
AS CLOSE AS POSSIBLE TO DEVICE TERMINALS E13
VCC_RIN2 2
L1
E14
VCC_ROUT1 2
VCC_ROUT2
1

1
C175 C198 C199 C169
2
0.01U 0.01U 0.47U *0.47U_NC
2

2
25 25 0603 0603
10 10
A4
VCC_MD

12,25 PCI_AD[31..0] J1
GND1
J5
PCI_AD31 GND2
PCI Bus M2
AD31 GND3
K5
PCI_AD30 M1 E9
PCI_AD29 AD30 GND4
N5 R10
2 PCI_AD28 AD29 GND5 2
PowerOnReset for VccCore N4
AD28 GND6
T10
PCI_AD27 N2 V10
PCI_AD26 AD27 GND7
N1 W10
PCI_AD25 AD26 GND8
P5 L15
PCI_AD24 AD25 GND9
P4 M19
PCI_AD23 AD24 GND10
R4 A9
PCI_AD22 AD23 AGND1
R2 B9
+3.3V_R5C847 PCI_AD21 AD22 AGND2
R1 D9
PCI_AD20 AD21 AGND3
T2 D14
PCI_AD19 AD20 AGND4
T1 A15
AD19 AGND5
1

PCI_AD18 U2 B15
PCI_AD17 AD18 AGND6
U1
R152 PCI_AD16 AD17
V1 F4
100K PCI_AD15 AD16 TEST1
T7 R7

PCI / OTHER
PCI_AD14 AD15 TEST2
V7
2

PCI_AD13 AD14
W7
PCI_AD12 AD13
R8
AD12
1

C210 PCI_AD11 T8
1U AD11 R155 1
GBRST# should be asserted only PCI_AD10 V8 F2 CB_HWSPND# 2 10K +3.3V_R5C847
0603 PCI_AD9 AD10 HWSPND# Memory Stick Enable
when system power supply is on. W8
2

10 AD9 R154 2
PCI_AD8 R9
AD8 SPKROUT#
F1 CB_SPKROUT# 1 100K +3.3V_R5C847
PCI_AD7 V9 XD Card Enable
PCI_AD6 AD7
W9
PCI_AD5 AD6
T11 Serial ROM disable
PCI_AD4 AD5
V11
PCI_AD3 AD4
W11
PCI_AD2 AD3 SD Card Enable
PCI Bus T12 AD2
PCI_AD1 V12 G1 MMC Card Enable
PCI_AD0 AD1 UDIO5
W12
AD0 R158 2
12,25 PCI_PAR V6 H5 1 10K
PAR UDIO4
12,25 PCI_C_BE3# P2
C/BE3# R156 2
12,25 PCI_C_BE2# W2 C/BE2# UDIO3 H4 1 10K +3.3V_R5C847
3 W6 3
12,25 PCI_C_BE1# C/BE1#
12,25 PCI_C_BE0# T9 C/BE0# UDIO2 H2
PCI_AD17 R153 100 P1 IDSEL
H1
UDIO1
12 PCI_REQ0# M4 REQ#
12 PCI_GNT0# M5 J4 IRQ_SERIRQ 13,23,25
GNT# UDIO0/SRIRQ#
12,25 PCI_FRAME# V3 FRAME#
12,25 PCI_IRDY# V4
IRDY#
12,25 PCI_TRDY# W4
TRDY# PCI Bus
12,25 PCI_DEVSEL# T5 DEVSEL#
12,25 PCI_STOP# V5 J2 PCI_PIRQA# 12
1394 Interrupt
STOP# INTA#
12,25 PCI_PERR# W5 PERR#
12,25 PCI_SERR# T6 K4 PCI_PIRQC# 12
Media card Interrupt
SERR# INTB#
G2 GBRST# INTC# K2 PCI_PIRQB# 12
12,25 PCI_RST# L4
PCIRST#
17 CLK_PCI_PCCARD K1 PCICLK NC0 L2

13,23,25 CLKRUN# L5 CLKRUN#


12,23,25 ICH_PME# G4
PME#/RI_OUT#

CoreLogic CLOCKRUN#
The ICH schematics need to include a R5C847-V10_1
pull-up resistor to implement CLKRUN#,
and the ICH schematics must have a
pull-down, or constantly drive thesignal
low, in order to disable CLKRUN#. CLK_PCI_PCCARD
4 4
1

R151
*22_NC
QUANTA
1 2

C197
*1P_NC Title
COMPUTER
2

50 5 IN 1 CONTROLLER

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, June 17, 2008 Sheet 20 of 53


A B C D E

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GRATIS - FOR FREE
A B C D E

U10B
+CBS_VPP +CBS_VCC CON1

B19 CBS_CAD31 1 85
CDATA10/CAD31 CBS_CAD30 CBS_CAD0 GND MH1
CDATA9/CAD30 C18 2 D3-CAD0 MH2 86
D19 CBS_CAD29 CBS_CAD1 3 87
CDATA1/CAD29 CBS_CAD28 CBS_CAD3 D4-CAD1 MH3
C1 NC1 CDATA8/CAD28 D18 4 D5-CAD3 MH4 88
E19 CBS_CAD27 CBS_CAD5 5 89
CDATA0/CAD27 CBS_CAD26 CBS_CAD7 D6-CAD5 H1
CADR0/CAD26 E16 6 D7-CAD7 H2 90
D1 F18 CBS_CAD25 CBS_CC/BE0# 7
NC2 CADR1/CAD25 CBS_CAD24 CBS_CAD9 CE1#-CC/BE0#
CADR2/CAD24 F15 8 A10-CAD9
G18 CBS_CAD23 CBS_CAD11 9
CADR3/CAD23 CBS_CAD22 CBS_CAD12 OE#-CAD11
E1 G15 10
NC3 CADR4/CAD22 CBS_CAD21 CBS_CAD14 A11-CAD12
H18 11
1 CADR5/CAD21 CBS_CAD20 CBS_CC/BE1# A9-CAD14 1
H15 12
CADR6/CAD20 CBS_CAD19 CBS_CPAR A8-CC/BE1#
C2 J18 13
NC4 CADR25/CAD19 CBS_CAD18 CBS_CPERR# A13-CPAR
J16 14
CADR7/CAD18 CBS_CAD17 CBS_CGNT# A14-CPERR#
J15 15
CADR24/CAD17 CBS_CAD16 CBS_CINT# WE/PGM-CGNT#
D2 P16 16
NC5 CADR17/CAD16 CBS_CAD15 RDY/BSY-IRQ/CIN
P19 17
IOWR#/CAD15 CBS_CAD14 VCC
R19
CADR9/CAD14 CBS_CAD13
E2 P18 18
NC6 IORD#/CAD13 CBS_CAD12 CBS_CCLK VPP1
R18 19
CADR11/CAD12 CBS_CAD11 CBS_CIRDY# A16-CCLK
T19 20
OE#/CAD11 CBS_CAD10 CBS_CC/BE2# A15-CIRDY#
E4 T18 21
NC7 CE2#/CAD10 CBS_CAD9 CBS_CAD18 A12-CC/BE2#
U19 22
CADR10/CAD9 CBS_CAD8 CBS_CAD20 A7-CAD18
U18 23
CDATA15/CAD8 CBS_CAD7 CBS_CAD21 A6-CAD20
W17 24
CDATA7/CAD7 CBS_CAD6 CBS_CAD22 A5-CAD21
V17 25
CDATA13/CAD6 CBS_CAD5 CBS_CAD23 A4-CAD22
W16 26
CDATA6/CAD5 CBS_CAD4 CBS_CAD24 A3-CAD23
V16 27
CDATA12/CAD4 CBS_CAD3 CBS_CAD25 A2-CAD24
W15 28

CARDBUS / MEDIA CARD


CDATA5/CAD3 CBS_CAD2 CBS_CAD26 A1-CAD25
V15 29
CDATA11/CAD2 CBS_CAD1 CBS_CAD27 A0-CAD26
T15 30
SD/XD/MS_CLK_R CDATA4/CAD1 CBS_CAD0 CBS_CAD29 D0-CAD27
R14 31
CDATA3/CAD0 CBS_CDATA2 D1-CAD29
32
CBS_CC/BE3# CBS_CCLKRUN# D2-RFU
F16 33
REG#/CCBE3# WP/IOIS16-CCLKR
1

K18 CBS_CC/BE2# 34
CADR12/CCBE2# CBS_CC/BE1# GND
P15
R143 CADR8/CCBE1# CBS_CC/BE0#
V19 35
*22_NC CE1#/CCBE0# CBS_CPAR CBS_CCD1# GND
N15 36
CADR13/CPAR CBS_CFRAME# CBS_CAD2 CD1#-CCD1#
K16 37
2

CADR23/CFRAME# CBS_CTRDY# CBS_CAD4 D11-CAD2


L16 38
CADR22/CTRDY# CBS_CIRDY# CBS_CAD6 D12-CAD4
K15 39
CADR15/CIRDY# CBS_CSTOP# CBS_CDATA14 D13-CAD6
M16 40
CADR20/CSTOP# D14-RFU
1

L18 CBS_CDEVSEL# CBS_CAD8 41


2 C163 CADR21/CDEVSEL# CBS_CBLOCK# CBS_CAD10 D15-CAD8 2
N19 42
*10P_NC CADR19 CBS_CPERR# CBS_CVS1 CE2#-CAD10
N18 43
2

50 CADR14/CPERR# CBS_CSERR# CBS_CAD13 VS1#/RFSH-CVS1


G16 44
WAIT#/CSERR# CBS_CREQ# CBS_CAD15 RSVD-CAD13
E8 G19 45
MDIO19 INPACK#/CREQ# CBS_CGNT# CBS_CAD16 RSVD-CAD15
M15 46
WE#/CGNT# CBS_CSTSCHG CBS_CDATA18 A17-CAD16
D8 E18 47
MDIO18 BVD1/CSTSCHG CBS_CCLKRUN# SJ6 CBS_CBLOCK# A18-RFU
A18 48
WP/CCLKRUN# CBS_CCLK_R CBS_CCLK CBS_CSTOP# A19-CBLOCK#
L19 1 2 49 69
CADR16/CCLK CBS_CINT# 1 2 CBS_CDEVSEL# A20-CSTOP# GNDPAD1
B8 M18 50 70
MDIO17 RDY/CINT# CBS_CRST# A21-CDEVSEL# GNDPAD2
A8 H19 51 71
MDIO16 RESET/CRST# CBS_CAUDIO VCC GNDPAD3
E7 F19 72
MDIO15 BVD2/CAUDIO GNDPAD4
D7 52 73
XD_D3/MS_D3/SD_D3 MDIO14 CBS_CCD1# CBS_CTRDY# VPP2/VPP2 GNDPAD5
B7 T14 53 74
XD_D2/MS_D2/SD_D2 MDIO13 CD1#/CCD1# CBS_CCD2# CBS_CFRAME# A22-CTRDY# GNDPAD6
A7 D15 54 75
XD_D1/MS_D1/SD_D1 MDIO12 CD2#/CCD2# CBS_CVS1 CBS_CAD17 A23-CFRAME# GNDPAD7
E6 R16 55 76
XD_D0/MS_D0/SD_D0 MDIO11 VS1#/CVS1 CBS_CVS2 CBS_CAD19 A24-CAD17 GNDPAD8
D6 H16 56 77
MDIO10 VS2#/CVS2 CBS_CVS2 A25-CAD19 GNDPAD9
57 78
XD_RE#/CLK SD/XD/MS_CLK_R CBS_CDATA14 CBS_CRST# VS2#/RSVD-CVS2 GNDPAD10
B6 W18 58 79
MDIO09 CDATA14 CBS_CDATA2 CBS_CSERR# RESET-CRST GNDPAD11
C19 59 80
XD_WE#/MS_BS/SD_CMD CDATA2 CBS_CDATA18 CBS_CREQ# WAIT#-CSERR# GNDPAD12
A6 N16 60 81
MDIO08 CADR18 R130 1 RSVD-CREQ# GNDPAD13
VPPEN0
V13 VPPEN0 2 100K CBS_CC/BE3# 61
REG#-CC/BE3# GNDPAD14
82
D5 W13 VPPEN1 CBS_CAUDIO 62 83
MDIO07 VPPEN1 VCC5EN# CBS_CSTSCHG BVD2/SP-CAUDIO# GNDPAD15
R13 63 84
VCC5EN# VCC3EN# CBS_CAD28 BVD1-STSCHG GNDPAD16
PAD T34 B5 T13 64
MDIO06 VCC3EN# CBS_CAD30 D8-CAD28
65
CBS_CAD31 D9-CAD30
A5 66
MDIO05 CBS_CCD2# D10-CAD31
67 CD2#-CCD2#
MC_PWR_CTRL_0 B4 68
MDIO04 GND
V14
XD_R/B#/SD_WP# USBDP
B3 MDIO03 USBDM W14
WZ21131-G2-8F
A3 MDIO02
3 pci-1ca4a501-tc-a2-68p 3
A2 MDIO01
SD_CDZ B1
MDIO00
R5C847-V10_1

+CBS_VCC +3.3V_R5C847 +CBS_VCC

U7 2

1
C97 C94 C100
0.1U 0.1U 1U

1
10 10 0603 C104

2
10 +5V_RUN 10 *0.1U_NC
NC3 10
7
3 IN 1 CARD READER (SD/MMC/SDIO)

2
NC2
+3.3V_RUN 11 9
3VIN VCCOUT1

1
C110 12
1U VCCOUT2 +CBS_VPP
13 5VIN1 VCCOUT3 14
0603 15

2
5VIN2
1

10 8
+3.3V_RUN_CARD VPPOUT
Q46 6
NC1
1

1
R387 C96
CON3 2N7002W 10K VPPEN1 4 0.1U
XD_D2/MS_D2/SD_D2 XD_RE#/CLK Q44 VPPEN0 EN1 10
1 7 3 5
2

2
DAT2 CLK MC_PWR_CTRL_0# AO3403 VCC3EN# EN0 /FLAG
1 3 2 2
VCC3EN
XD_D3/MS_D3/SD_D3 2 8 VCC5EN# 1 16
DAT3 VSS2 VCC5EN GND
XD_WE#/MS_BS/SD_CMD 3 9 XD_D0/MS_D0/SD_D0
2

4 CMD DAT0 R5531V002-E2-FA 4


3

SD_CDZ XD_D1/MS_D1/SD_D1
4
C/D DAT1
10
30mil
+3.3V_RUN_CARD
5 11 XD_R/B#/SD_WP# MC_PWR_CTRL_0
VSS1 W/P
QUANTA
1

6 12 C513
VDD GND_PAD4 R386 2.2U
GND_PAD3
13 9
14 47 150K 0603
COMPUTER
2

GND_PAD2 6.3
GND_PAD1 15
Title
SDSR09-A0-0015
54 IEEE 1394

Size Document Number Rev


VM9/VM8 1A

Date: Monday, June 23, 2008 Sheet 21 of 53


A B C D E

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GRATIS - FOR FREE
1 2 3 4 5 6 7 8

AS CLOSE AS POSSIBLE TO R5C847 L11 BLM18PG181SN1D


AVCC_PHY3V +3.3V_R5C847
2 2

1
U10C C115 C116 C119 C120 C118
10U *0.1U_NC 0.1U *1000P_NC 1000P
0603 50 50

2
6.3 10 10
AVCC_PHY3V D11 E10
CPS AVCC_PHY1 TPBN0 R390 2 IEEE1394_TPBN0
AVCC_PHY2 E11 1 0
AVCC_PHY3 A17
B17 TPBP0 R391 2 1 0 IEEE1394_TPBP0
AVCC_PHY4
A AS CLOSE AS POSSIBLE TO R5C847 TPAN0 R392 2 1 0 IEEE1394_TPAN0 A
C152 0.33U 16 0603
D12 TPBIAS0 TPAP0 R389 2 1 0 IEEE1394_TPAP0
TPBIAS0

C135 22P 50 C160 0.01U 25


R5C847_XI A16 R142 R140 1 2
XI 56.2/F 56.2/F 56
53
Y3 CN10
24.576MHz A13 TPBN0
C129 22P 50 TPBN0 *NCM900E-TR_NC
R5C847_XO B16 B13 TPBP0 4 5 IEEE1394_TPBN0 4
XO TPBP0 B1- B_1- 4

1
3 6 IEEE1394_TPBP0 3
B1+ B_1+ 3

IEEE1394
2 7 IEEE1394_TPAN0 2
TPAN0 A0- A_0- 2
TPAN0 A12
1 8 IEEE1394_TPAP0 1
TPAP0 A0+ A_0+ 1
A14 FIL0 TPAP0 B12
EB1

5
6
7
8
5
6
7
8
R135 10K/F C143 270P 25
1 2 R5C847_REXT B14 REXT 2 1 CON-1394
R138 R136
56.2/F 56.2/F
C184 0.01U 25
2 1 R5C847_VREF D13 VREF
B R137 B
5.11K/F
E12 Circuit area : As small as possible.
NC8

*TPA/TPA#,TPB/TPB# pair trace : As close as possible.


*TPA/TPA#,TPB/TPB# pair trace : Same length electrically.
*Termination resistor for TPA+/- TPB+/- : As close as possible to its cable driver (device pin out).

NC9 D10

NC10 A11

NC11 B11

NC12 A10

C NC13 B10 C

R5C847-V10_1

D D

QUANTA
Title
COMPUTER
ExpressCard/SmartCard

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, June 17, 2008 Sheet 22 of 53


1 2 3 4 5 6 7 8

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GRATIS - FOR FREE
5 4 3 2 1

U11 +RTC_CELL +3.3V_ALW


29 KSO[0..16] SJ1
29 KSI[0..7]
3 1 2 SMBDAT0 4 3 RP13
ITE8512E VBAT1
VCC 11 +3.3V_RUN
1 2 SMBCLK0 2 1 2.2KX2

2
LQFP-128L

2
57 26 +3.3V_ALW SMBDAT1 4 3 RP14
KSO16 KSO17/GPC5 VSTBY1 R162 C205 SMBCLK1
56 KSO16/GPC3 VSTBY2 50 2 1 10KX2
KSO15 55 92 *0_NC 0.1U

1
KSO14 KSO15 VSTBY3
54 114

1
KSO13 KSO14 VSTBY4 10 SIO_SLP_S5# R115 *100K_NC
53 KSO13 VSTBY5 121
+3.3V_ALW KSO12 52 127
KSO11 KSO12/SLCT VSTBY6
51 KSO11/ERR
KSO10 46
KSO9 KSO10/PE
D 2 KSO8
45
44
KSO9/BUSY
66 HWPG D
KSO8/ACK ADC0/GPI0 HWPG 35
2

2
KSO7 43 67 SUS_ON R133 100K
KSO7/PD7 ADC1/GPI1 IMVP6_PROCHOT# 39
C207 C154 C125 C172 C156 KSO6 42 68 HWPG R112 100K
KSO6/PD6 ADC2/GPI2 PAD T20
10U 0.1U 0.1U *0.1U_NC 0.1U KSO5 41 KEYBOARD 69 LCD_CBL_DET# IMVP_VR_ON R109 *100K_NC
1

1
KSO5/PD5 ADC3/GPI3 LCD_CBL_DET# 18
0603 KSO4 40 70 INVERTER_CBL_DET#
KSO4/PD4 ADC4/GPI4 INVERTER_CBL_DET# 18
6.3 10 10 10 10 KSO3 39 71
KSO3/PD3 ADC5/GPI5 PBAT_PRES# 42
KSO2 38 72 ADP_OC ADP_OC
KSO2/PD2 ADC6/GPI6 IINP 36
Place these caps close to ITE8512. KSO1 37 ADC/DAC 73 SIO_SLP_S5#
KSO1/PD1 ADC7/GPI7 SIO_SLP_S5# 13
KSO0 36 KSO0/PD0
DAC0/GPJ0 76 PAD T138
KSI7 65 77
KSI6 64
KSI7 DAC1/GPJ1
78
SIO_EXT_WAKE# 13 10
16 KSI5 63
KSI6 DAC2/GPJ2
79
PAD T135
PAD T137
KSI4 KSI5 DAC3/GPJ3 +3.3V_RUN
62 KSI4 DAC4/GPJ4 80 ICH_RSMRST# 13
KSI3 61 81 1 2
KSI3/SLIN DAC5/GPJ5 SIO_PWRBTN# 13
R168 *0_NC KSI2 60 D10 SDMK0340L-7-F LCD_CBL_DET# R113 2 1 10K
KSI1 KSI2/INT INVERTER_CBL_DET# R114 2
11,32 ICH_AZ_CODEC_RST# 2 1 59 KSI1/AFD 1 10K
KSI0 58 LCD_BAK# R161 2 1 10K
KSI0/STB
PWM0/GPA0 24 BREATH_LED# 30
R169 0 25
2 1 22
PWM1/GPA1
28
BAT2_LED# 30 46
6,12,26,34 PLTRST# LPCRST/WUI4/GPD2 PWM2/GPA2 FAN1_PWM 31
13 29
17 CLK_PCI_8512
6
LPCCLK PWM3/GPA3
30
PWM_VADJ 18 41
11,26 LPC_LFRAME# LFRAME PWM4/GPA4 BAT1_LED# 30
10 31 KB_BACKLITE_EN
11,26 LPC_LAD0 LAD0 PWM5/GPA5 SCROLL_LED# 30 R163
11,26 LPC_LAD1 9 LAD1 PWM PWM6/GPA6 32 CAP_LED# 30
8 34 EC_FLASH_SPI_CLK_R 2 1
11,26 LPC_LAD2 LAD2 PWM7/GPA7 BEEP 32 EC_FLASH_SPI_CLK 24
11,26 LPC_LAD3 7 LAD3
TACH0/GPD6 47 FAN1_TACH 31 480

2
93 48
C
13,20,25 CLKRUN#
5
CLKRUN/GPH0/ID0
LPC TACH1/GPD7 PANEL_BKEN 6 14 C531 C
13,20,25 IRQ_SERIRQ D13 SDMK0340L-7-F SERIRQ 27P
13 SIO_EXT_SMI# 2 1 15 120 LID_SW# 30

1
D12 SDMK0340L-7-F ECSMI/GPD4 TMRI0/WUI2/GPC4 50
13 SIO_EXT_SCI# 2 1 23 ECSCI/GPD3 TMRI1/WUI3/GPC6 124 PAD T36
D11 2 SDMK0340L-7-F
1 126
11 SIO_A20GATE GA20/GPB5
18 LCD_TST
17 LPCPD/WUI6/GPE6
D14 2 SDMK0340L-7-F
1 4 108 PAD T32 Place R163, C531 close to U11
11 SIO_RCIN# KBRST/GPB6 RXD/GPB0
WRST# 14 109 PAD T134
WRST TXD/GPB1
18 LCD_BAK# 16 PWUREQ/GPC7 CRX0/GPC0 119 PAD T132
IR/UART CTX0/GPB2 123 RUN_ON_1 35
32 NB_MUTE# 19 L80HLAT/GPE0 CRX1/GPH1/ID1 94 PAD T18
12,20,25 ICH_PME# 20 L80LLAT/WUI7/GPE7 CTX1/GPH2/ID2 95 IMVP_VR_ON 39
+3.3V_ALW
Santa Rosa Board ID Straps
Charge and BAT 36,42 SMBCLK0
SMBCLK0
SMBDAT0
110 SMCLK0/GPB3 SUS_ON
36,42 SMBDAT0 111 SMDAT0/GPB4 FLFRAME/GPG2/LF 100 SUS_ON 38,40,41
FLRST/GPG0/TM 106 PAD T31
CLK, LCD and Thermal 17,18,31 SMBCLK1
SMBCLK1
SMBDAT1
115 SMCLK1/GPC1 FLAD3/GPG6 104 ICH_CL_PWROK 6,13 11
17,18,31 SMBDAT1 116 SMDAT1/GPC2 SMBUS LPC/FWH 2

1
G_Thermal FLASH FLAD2/SO 103 EC_FLASH_SPI_DO 24
R111 R124 R122
117 102
and Media button T33 PAD
T35 PAD 118
SMCLK2/GPF6
SMDAT2/GPF7
FLAD1/SI
FLAD0/SCE 101
EC_FLASH_SPI_DIN 24
EC_FLASH_SPI_CS# 24
10K 10K 10K
105 EC_FLASH_SPI_CLK_R
FLCLK 13

2
T8 PAD 85 BID0
PS2CLK0/GPF0 BID1
13,35,39 IMVP_PWRGD 86 PS2DAT0/GPF1 EGAD/GPE1 82 PS_ID 42
EGPC EGCS/GPE2 83 PAD T136
87 84 PAD T139 CHIP_ID
35 RESET_OUT# PS2CLK1/GPF2 EGCLK/GPE3
30 NUM_LED# 88 PS2DAT1/GPF3 PS/2

2
B B

29 CLK_TP_SIO 89 PS2CLK2/GPF4
90 96 CHIP_ID R110 R128 R118
29 DAT_TP_SIO PS2DAT2/GPF5 GPH3/ID3 BID0
97 *10K_NC *10K_NC *10K_NC
+3.3V_ALW GPH4/ID4 BID1
GPIO 98

1
GPH5/ID5 USB_SIDE_EN#
GPH6/ID6 99 USB_SIDE_EN# 27
ITE8512_XTAL1 128 107
CK32K GPG1/ID7 BT_RADIO_DIS# 26
2

ITE8512_XTAL2 2 Dimondville
R172 CK32KE
100K 1 18
ITE8512IX_JX VSS1 RI1/WUI0/GPD0 SIO_SLP_S3# 13
D15 12 21
1

VSS2 RI2/WUI1/GPD1 ACAV_IN 36


1 2 WRST# 27 35 CHIP_ID
3,6,31,40 THERM_STP# VSS3 WUI5/GPE5 PAD T37
49 VSS4
1

SDMK0340L-7-F C228 91 112 PAD T133 1: Santa Rosa


1U VSS5 RING/PWRFAIL/LPCRST/GPB7
113 VSS6
0603 +3.3V_ALW 122 125 0: Dimondville
2

VSS7 PWRSW/GPE4 MAIN_PWR_SW# 30


10 L12 BLM11A05S
74 AVCC GINT/GPD5 33 LCDVCC_TST_EN 18
0603 75 AVSS
2

C128
0.1U ITE8502E BID0 BID1 VM8x/VM9x
32KHz Clock. L13 LQFP128-16X16-4-FX2 0 0 SSI (X00)
1

10 0 1 PT (X01)
ITE8512_XTAL2 0603 12 1 0 ST (X02)
BLM11A05S 9 30 1 1 QT (A00)
0 0 (A01)
0 1

A CLK_PCI_8512 ITE8512IX_JX A
W1
2

4 1 ITE8512_XTAL1
1

R160 R164
3 2 10 C208
0.1U
*0_NC QUANTA
2

C203 32.768KHZ C193 0603


COMPUTER
1

18P 18P
1

50 50 Title
C213 Ultra I/O Controller ECE5028
2.2P ITE8512IX pin12 connect to GND.
2

Size Document Number Rev


50 ITE8512JX pin12 connect to 0.1uF, 1uF. VM9/VM8 1A

Date: Saturday, July 19, 2008 Sheet 23 of 53


2 1

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5 4 3 2 1

16Mbit (2M Byte), SPI RTC BATTERY


+RTC_CELL +3.3V_ALW +PWR_SRC

+3.3V_ALW U18
1 2 3 OUT IN 1
+3.3V_ALW D20 4 5/3#

1
SDMK0340L-7-F

1
D D
C392 2 5 C393
R90 2.2U GND SHDN *1U_NC

1
10K 0603 *MAX1615EUK-T+_NC 0805

2
U6 R84 6.3 25

2
23 EC_FLASH_SPI_CS# 1 CE# VDD 8 10K
R88 1 2 15 6
23 EC_FLASH_SPI_CLK SCK
R95 1 2 15 5 BT1

2
23 EC_FLASH_SPI_DIN SI
23 EC_FLASH_SPI_DO
R85 1 2 15 2 SO HOLD# 7 1 2 +RTC_1 1 2 +RTC 1
D21 R307 1K 2
3 4 SDMK0340L-7-F
WP# VSS

2
C395 HS8202E RTC-BATTERY
SST25VF016B-50-4C-S2AF C93 1U
0.1U 0603

1
10
10

C C

B B

A A

QUANTA
Title
COMPUTER
Ultra I/O Controller ECE5028

Size Document Number Rev


VM9/VM8 1A

Date: Friday, May 30, 2008 Sheet 24 of 53


5 4 3 2 1

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1 2 3 4 5 6 7 8

+3.3V_RUN +3.3V_RUN

CN8
1 TIP RING 2
A A

3 8PMJ-3 8PMJ-1 4
5 8PMJ-6 8PMJ-2 6
7 8PMJ-7 8PMJ-4 8
9 8PMJ-8 8PMJ-5 10
11 LED1_GRNP LED2_YELP 12
12,20 PCI_AD[31..0] 13 LED1_GRNN LED2_YELN 14
15 CHSGND RESERVED3 16
17 18
16 12 PCI_PIRQE#
19
INTB# 5V_2
20
+5V_RUN
3.3V_1 INTA# PCI_PIRQD# 12
21 22
8 23
USBD+ USBD-
24 +3.3V_SUS
CLK_LPC_DEBUG_R GND0 3.3VAUX1
17,26 CLK_LPC_DEBUG 25 CLK RST# 26 PCI_RST# 12,20
27 GND1 3.3V_5 28
12 PCI_REQ1# 29 REQ# GNT# 30 PCI_GNT1# 12
31 3.3V_2 GND9 32
PCI_AD31 33 34
PCI_AD29 AD31 PME# ICH_PME# 12,20,23
35 AD29 BT_ACTIVE 36
37 38 PCI_AD30
PCI_AD27 GND2 AD30
39 AD27 3.3V_6 40
PCI_AD25 PCI_AD28
41
43
AD25 AD28 42
44 PCI_AD26
2
WLAN_ACTIVE AD26 PCI_AD24
12,20 PCI_C_BE3# 45 C/BE3# AD24 46
PCI_AD23 47 48 R37 *100_NC PCI_AD20
AD23 IDSEL
49 GND3 GND10 50
PCI_AD21 51 52 PCI_AD22
PCI_AD19 AD21 AD22 PCI_AD20
53 AD19 AD20 54
55 GND4 PAR 56 PCI_PAR 12,20
PCI_AD17 57 58 PCI_AD18
AD17 AD18 PCI_AD16
B
12,20 PCI_C_BE2# 59 C/BE2# AD16 60 B
12,20 PCI_IRDY# 61 IRDY# GND11 62
63 3.3V_3 FRAME# 64 PCI_FRAME# 12,20
65 66 +3.3V_RUN
13,20,23 CLKRUN# CLKRUN# TRDY# PCI_TRDY# 12,20
12,20 PCI_SERR# 67
69
SERR# STOP# 68
70
PCI_STOP# 12,20 2
GND5 3.3V_7
12,20 PCI_PERR# 71 PERR# DEVSEL# 72 PCI_DEVSEL# 12,20
12,20 PCI_C_BE1# 73 C/BE1# GND12 74

1
PCI_AD14 75 76 PCI_AD15
AD14 AD15 PCI_AD13 C42 C39 C40 C41
77 GND6 AD13 78
PCI_AD12 79 80 PCI_AD11 *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC

2
PCI_AD10 AD12 AD11 0603 0603 0603 0603
81 AD10 GND13 82
83 84 PCI_AD9 50 50 50 50
PCI_AD8 GND7 AD9
85 AD8 C/BE0# 86 PCI_C_BE0# 12,20
PCI_AD7 87 88
AD7 3.3V_8 PCI_AD6
89 3.3V_4 AD6 90
PCI_AD5 91 92 PCI_AD4
AD5 AD4 PCI_AD2
93 RESERVED1 AD2 94
PCI_AD3 95 96 PCI_AD0
AD3 AD0
+5V_RUN 97 5V_1 RESERVED5 98
PCI_AD1 99 100
AD1 RESERVED6 IRQ_SERIRQ 13,20,23
101 GND8 GND14 102
103 AC_SYNC M66EN 104
105 AC_SDATA_IN AC_SDATA_OUT 106
107 AC_BIT_CLK AC_CODEC_ID0# 108
109 AC_CODEC_ID1# AC_RESET# 110
111 MOD_AUDIO_MON RESERVED7 112
113 AUDIO_GND1 GND15 114
115 SYS_AUDIO_OUT SYS_AUDIO_IN 116
C
117 SYS_AUDIO_OUT GND SYS_AUDIO_IN GND 118 C
119 AUDIO_GND2 AUDIO_GND3 120
DEBUG_ENABLE 121 122
T147 RESERVED2 MCPIACT#
+5V_RUN 123 VCC5A 3.3VAUX2 124 +3.3V_SUS
*MINI-PCI_AMP_NC

Place the debug connector on HDD area

CLK_LPC_DEBUG_R
1

C51
*0.1U_NC
2

10

D D

QUANTA
Title
COMPUTER
Debug Port (Mini PCI)

Size Document Number Rev


VM9/VM8 1A

Date: Saturday, July 19, 2008 Sheet 25 of 53


1 2 3 4 5 6 7 8

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TH1 TH2
H-C217D122P2 H-C217D122P2
+3.3V_WLAN +3.3V_RUN L19
MiniCard WLAN connector USBP8 D- 1 2 ICH_USBP8- 12
USBP8 D+ 4 3 ICH_USBP8+ 12
*PLW3216S900SQ2T1_NC

1
1206
For MiniCard nut use.
1 2
R216 0
+3.3V_WLAN +3.3V_WLAN +1.5V_RUN
A
1 2 A
J6 R217 0
13,34 PCIE_WAKE#
COEX2_WLAN_ACTIVE
1
3
WAKE# +3.3V 2
4
FOR DEBUG CARD
COEX1_BT_ACTIVE_MINI Reserved GND
5 Reserved +1.5V 6
MINI1CLK_REQ# 7 8 R252 1 2 *0_NC
17 MINI1CLK_REQ# CLKREQ# Reserved LPC_LFRAME# 11,23
9 10 R250 1 2 *0_NC
GND Reserved LPC_LAD3 11,23
11 12 R249 1 2 *0_NC +3.3V_WLAN
17 CLK_PCIE_MINI1# REFCLK- Reserved LPC_LAD2 11,23
13 14 R248 1 2 *0_NC
17 CLK_PCIE_MINI1 REFCLK+ Reserved LPC_LAD1 11,23
R247 *0_NC
FOR DEBUG CARD 15 GND Reserved 16
SJ2
1
1
2
2 LPC_LAD0 11,23
1 2

4
2
R317 1 PLTRST# 6,12,23,34
2 *0_NC 17 Reserved GND 18
6,12,23,34 PLTRST# R318 1 WLAN_RADIO_OFF#
17,25 CLK_LPC_DEBUG
2 *0_NC 19 Reserved Reserved 20
21 22 R229 *0_NC RP21
GND PERST# 2.2KX2
12 PCIE_RX2- 23 PERn0 +3.3Vaux 24 1 2 SB_WLAN_PCIE_RST# 12
25 26 Q11
12 PCIE_RX2+ PERp0 GND +3.3V_WLAN

2
27 28 *2N7002W_NC

3
1
GND +1.5V WLAN_SMBCLK
29 GND SMB_CLK 30
PCI-Express TX and RX 31 32 WLAN_SMBDATA WLAN_SMBCLK 1 3
12 PCIE_TX2- PETn0 SMB_DATA ICH_SMBCLK 13
direct to connector 12 PCIE_TX2+
33 PETp0 GND 34
35 36 USBP8 D-
GND USB_D- USBP8 D+
13 PCIE_MCARD1_DET# 37 Reserved USB_D+ 38
39 Reserved GND 40 USB_MCARD1_DET# 13 1 2
41 42 R221 *0_NC
Reserved LED_WWAN#
43 Reserved LED_WLAN# 44 LED_WLAN_OUT# 30
45 46 +3.3V_WLAN
T123 PAD Reserved LED_WPAN#
Non-iAMT T122 PAD 47 Reserved +1.5V 48
49 50 Q12
T129 PAD Reserved GND

2
51 52 *2N7002W_NC
Reserved +3.3V
B 1827680-1 WLAN_SMBDATA 1 3 B
ICH_SMBDATA 13

MINI1CLK_REQ# 1 2
+1.5V_RUN +3.3V_WLAN R207 *0_NC
1

C412
220P
2 2 Suport for WoW
2

1
1

2
50 + C443
C416 C427 C411 C415 C428 C426 C419 *330U/6.3V_NC WLAN_RADIO_OFF# 2 1
0.047U 0.047U 0.1U *0.047U_NC 0.1U *0.047U_NC 4.7U 7343 WLAN_RADIO_DIS# 13
2

2
10 0805 6.3 D16
10 10 10 10 10 10 SDMK0340L-7-F

1 2 Prevent backdrive when


Place caps close to R241 *0_NC
WoW is enabled.
connector.

C C

Bluetooth
+3.3V_RUN
J4
1 GND Activity LED 2
3 4 COEX2_WLAN_ACTIVE
3.3V(Logic) COEX2 COEX1_BT_ACTIVE_MINI
23 BT_RADIO_DIS# 5 Radio Enable/Disable# COEX1 6
PAD T97 7 RSVD USB- 8 ICH_USBP6- 12
12 ICH_USBP6+ 9 USB+ GND 10

87213-1000G
1

1
1

C383
C384 C382 R303 R302 33P C381
D 0.1U 100P 10K 10K 50 *0.1U_NC D
2

10 50 10
2

QUANTA
Title
COMPUTER
MDC CONN.

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, June 17, 2008 Sheet 26 of 53


1 2 3 4 5 6 7 8

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1 2 3 4 5 6 7 8

External USB PORT hookup reference. Your design may


need more or less external ports and may be mapped 60 52
differently +USB_SIDE_PWR JUSB1

1
1 A_VCC
L4 1206 C520 USBP0 D- 2
USBP0 D- 0.1U USBP0 D+ A_DATA-
12 ICH_USBP0- 4 3 3

2
USBP0 D+ 10 A_DATA+
12 ICH_USBP0+ 1 2 4 A_GND SHIELD1 9
SHIELD2 10
*PLW3216S900SQ2T1_NC 11
SHIELD3
A SHIELD4 12 A
+USB_SIDE_PWR 5
USBP1 D- B_VCC
1 2 6 B_DATA-

1
R9 0 USBP1 D+ 7
C521 B_DATA+
8 B_GND
1 2 0.1U

2
R10 0 10
UB1112C-KB2VM-7F

L3 1206
4 3 USBP1 D-
12 ICH_USBP1-
1 2 USBP1 D+
12 ICH_USBP1+
*PLW3216S900SQ2T1_NC

1 2
R11 0

1 2
R12 0

Platforms should put in PADS for the USB chokes if they


have the room. Chokes should be NOPOP.
B B

Place ESD diodes as


close as USB connector.

ESD1
Place one 150uF cap by each USBP0 D- 1 6 USBP1 D+
+5V_SUS 1 6 +USB_SIDE_PWR
2 2 5 5
USB connector. USBP0 D+ 3 4 USBP1 D-
3 4
U24 *SRV05-4.TCT_NC
C C
2 IN GND 1

3 7 +USB_SIDE_PWR
23 USB_SIDE_EN# EN1# OUT1
OC1# 8 USB_OC0_1# 12
1

4 6 +USB_SIDE_PWR
C510 C516 EN2# OUT2
OC2# 5
*10U_NC 0.1U
2

0805
10 10 TPS2062DR + C515 + C514
*150U_NC 150U
7343 7343
2

6.3 6.3
Each channel is 1A

D D

QUANTA
Title
COMPUTER
SERIAL PORT & USB

Size Document Number Rev


VM9/VM8 1A

Date: Friday, May 30, 2008 Sheet 27 of 53


1 2 3 4 5 6 7 8

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SATA HDD Connector. SATA ODD Connector.

CON2
FOR VM8x
CN3
GND1 1
2 SATA_TX0+ 11 S1 1
RXP GND1
RXN 3
4
SATA_TX0- 11 51 14
TXP 2
3
SATA_TX1+ 11
GND2 14 TXN SATA_TX1- 11
5 SATA_RXN0_C C243 2 1 3900P 25 4
TXN SATA_RX0- 11 GND2
6 SATA_RXP0_C C244 2 1 3900P 25 5 SATA_RXN1_C_VM8 C398 2 1 3900P 25
A TXP SATA_RX0+ 11 RXN SATA_RXP1_C_VM8 SATA_RX1- 11 A
7 6 C397 2 1 3900P 25
GND3 RXP SATA_RX1+ 11
GND3 7
S7
8 P1 8
3.3V_0 +3.3V_RUN DP
3.3V_1 9 +5V 9 +5V_MOD
3.3V_2 10 +5V 10
GND4 11 15 15 MD 11
GND5 12 GND 12
GND6 13 GND 13
14 P6
5V_0 +5V_HDD
15 SATA_ODD_CON
5V_1
5V_2 16
GND7 17
RSVD 18
19
GND8
20
FOR VM9x
12V_0
12V_1 21
12V_2 22

FOX_LD2822H-SA9L6

+3.3V_RUN

B C236 C227 C225 C231 C239 B


*10U/10V/0805_NC *1U_10V_0603_NC *0.1U/16V_NC *0.1U/16V_NC *1000P/50V_NC

Place caps close to


connector.

+5V_HDD

2 2
C217 C233 C240 C223 C229 C234 Place caps close to
+5V_MOD +5V_RUN
connector.
10U/10V/0805 *1U/10V/0603_NC 0.1U/16V *0.1U/16V_NC 0.1U/16V 1000P/50V SJ14
57 2 1 1 2 2

1
Place caps close to C402 C401 C400 C399

1
connector. +5V_MOD 10U *1U_NC 0.1U 1000P
+5V_HDD +5V_RUN 0805 10 16 50

2
SJ13 10 0603 0402 0402 R308
1 2 *100K_NC
1 2
Place caps close to

2
1

C534 C533 C532 CN3.


2

*1U_NC *0.1U_NC *1000P_NC


C226 R176 10 16 50
4.7U 100K 0603 0402 0402
1

0603
2

C C
6.3
place close to CN1

D D

QUANTA
Title
COMPUTER
SATA (HDD&CD_ROM)

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, June 17, 2008 Sheet 28 of 53


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+5V_RUN 37 KEYBOARD CONNECTOR


Touch Pad
+5V_RUN

1
3
RP42 JKB1
11 KSO10
2

GND1
23 KSO[0..16] 1
4.7KX2 KSO11
35 19 2

1
KSO9
A 35 JP2 C453 C442
23 KSI[0..7] KSO14 3 A

2
4
*0.047U_NC 0.1U KSO13 4

2
L29 0603 BLM18AG601SN1D KSO15 5
1 1 6
TP_CLK 2 10 10 KSO16
23 CLK_TP_SIO 2 7
TP_DATA 3 KSO12
23 DAT_TP_SIO 3 8
L30 0603 BLM18AG601SN1D 4 KSO0
4 KSO2 9
KSO1 10
88513-0401 KSO3 11
12

1
KSO8
13
1

1
C449 C448 KSO6
C447 C450 10P 10P KSO7 14

2
10P 10P KSO4 15
2

50 50 KSO5 16
50 50 KSI0 17
KSI3 18
KSI1 19
KSI5 20
KSI2 21
KSI4 22
23

GND2
KSI6
KSI7 24
25
HRS FH28D-50(25)SB-1SH(86)

B B

CP5 *100PX4_NC CP6 *100PX4_NC


C126 *100P_NC KSI7 8 7 KSO12 8 7 KSO14
50 6 5 KSO16 6 5 KSO9
4 3 KSO15 4 3 KSO11
2 1 KSO13 2 1 KSO10

1206 50 1206 50

CP1 *100PX4_NC CP4 *100PX4_NC


8 7 KSO4 8 7 KSO3
6 5 KSO7 6 5 KSO1
4 3 KSO6 4 3 KSO2
2 1 KSO8 2 1 KSO0

1206 50 1206 50

CP3 *100PX4_NC CP2 *100PX4_NC


8 7 KSI6 8 7 KSI1
6 5 KSI4 6 5 KSI3
4 3 KSI2 4 3 KSI0
C
2 1 KSI5 2 1 KSO5 C
1206 50 1206 50

100P CAPS CLOSE TO JKB1

D D

QUANTA
Title
COMPUTER
TOUCH PAD, BULE TOOTH & FIR

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, June 17, 2008 Sheet 29 of 53


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A B C D E

Keyboard LED Power & Suspend.


+3.3V_RUN

+3.3V_RUN +5V_RUN +3.3V_SUS +5V_SUS +5V_SUS

R346
20
100K

1
Q27 R384
Dash board connector

5
DDTA114YUA-7-F 100K U23
4 47K 4
JP3 TC7SZ04FU(T5L,F,T)
1 3 2 CAP_LED_L 1 3 2 4 BREATH_PWRLED
23 NUM_LED# 1 23 BREATH_LED#
NUM_LED_L
10K 2
SCROLL_LED_L
Q26 POWER_ SW_IN0# 3 Q41

3
2N7002W 4 2N7002W

3
NUM_LED_L 5
6
GB1RF061-1200-8F

+3.3V_RUN

+3.3V_RUN +5V_RUN
+3.3V_ALW
R345 Power Switch
100K

1
Q25
2

DDTA114YUA-7-F R237
47K
100K
23 CAP_LED# 1 3 2
R234 10K POWER_ SW_IN0#
10K
WLAN 23 MAIN_PWR_SW#
Q24 C289
2N7002W 1U
3

CAP_LED_L 0603
3 10 3

+3.3V_RUN

+3.3V_RUN +5V_RUN
+3.3V_RUN
R344
100K
LID Switch

1
+3.3V_RUN +5V_RUN +3.3V_ALW
Q22

2
R347 DDTA114YUA-7-F
47K
100K
1

26 LED_WLAN_OUT# 1 3 2
Q29 10K R20
2

DDTA114YUA-7-F 100K J1
47K
Q20
1 3 2 2N7002W R21 10K 1

3
23 SCROLL_LED# 23 LID_SW#
10K 2
C13
Q28 1U
2N7002W LED_WLAN_OUT#_R 0603 3800N-E002-NNN
3

SCROLL_LED_L 10

2 HDD activity LED. 2


+3.3V_RUN

+3.3V_RUN +5V_RUN

Battery fault +3.3V_ALW


R343
100K
1

Q45

1
DDTA114YUA-7-F
2

D4
47K
Q23 19-217BHCYL2M2TY3T
47K
1 3 2 DDTA114YUA-7-F HDD_LED R22 220 HDD_LED_R 2 1
11 SATA_ACT#
10K 23 BAT2_LED# 2
10K
Q21 D6
2N7002W 19-217BHCYL2M2TY3T
3

HDD_LED LED_WLAN_OUT#_R R28 220 LED_WLAN_OUT 2 1

3
BAT2_LED
D3
19-217BHCYL2M2TY3T
BREATH_PWRLED R17 220 RBREATH_PWR_LED 2 1
+3.3V_ALW
Battery in charging
+3.3V_ALW +5V_ALW2
4
4
R403 Q43 D5
1

1 100K DDTA114YUA-7-F 1
2

BAT2_LED R26 220 RBAT2_LED 3 1


47K

23 BAT1_LED# 1 3 2
10K BAT1_LED R27 220 RBAT1_LED 4 2
QUANTA
Q48
2N7002W Title
COMPUTER
3

LTST-C195TBKFKT-5A SWITCH, KEYBOARD & LED


BAT1_LED
Size Document Number Rev
VM9/VM8 1A

Date: Tuesday, June 10, 2008 Sheet 30 of 53


A B C D E

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1 2 3 4 5 6 7 8

D24 +5V_RUN
*SSM34PT_NC
1 2

2
R372 0 J7
FAN1_VOUT *DA204U_NC
+5V_RUN 1 2 4 4
0805 FAN1_PWM 3 D26
23 FAN1_PWM 3
2

3
2
2

1
1 1
C492 C486
2.2U 0.1U MLX_532610471
1

2
A A
0805 FAN1_PWM
10 10

+5V_RUN R375 4.7K


FAN1_TACH 23

+3.3V_RUN

Place under CPU 10/20mils


REM_DIODE1_P
+3.3V_RUN
U21
3

1
C501 C491 1 10 THERM_SCL
Q40 *2200P_NC 2200P VDD SCL
2

2
MMST3904-7-F 2 9 THERM_SDA

2
DP1 SDA
1

50 REM_DIODE1_N 50 3 8 THERM_ALERT#_C 1 3 THERM_ALERT# THERM_ALERT# 13


B
DN1 ALERT# B
H_THERMDA 4 7 close to ICH
3 H_THERMDA DP2 SYS_SHDN#

1
C490 Q34
5 DN2 GND 6
2200P 2N7002W
EMC1423-1-AIZL-TR

1
H_THERMDC 50 SYS_SHDN#
3 H_THERMDC THERM_STP# 3,6,23,40
C488
0.1U

2
+3.3V_RUN
C527, C525 should close to thermal IC 10

1
R354
1M

3
Q32

2
2 2N7002W

1
3

1
2 C470
0.1U

2
Q33

1
2N7002W 10

+3.3V_RUN +3.3V_RUN

C OTP 85 degree C C
1

R366 R367 R364 1 2 10K/F THERM_ALERT#_C


+3.3V_RUN
Q35 10K 10K
2

2N7002W R363 1 2 6.8K/F SYS_SHDN#


2

3 1 THERM_SDA
17,18,23 SMBDAT1

+3.3V_RUN

Q36
2

2N7002W

3 1 THERM_SCL
17,18,23 SMBCLK1

D D

QUANTA
Title
COMPUTER
FAN & THERMAL

Size Document Number Rev


VM9/VM8 1A

Date: Friday, May 30, 2008 Sheet 31 of 53


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+5V_RUN L23 +5V_SPK_AMP +5V_SPK_AMP


BLM21PG600SN1D AUDIO AMPLIFIER TPA6017A2 GAIN0 GAIN1 GAIN
2 0 0 6dB

2
28 Speakers conn

1
C391 C389 C375 C386 R294 R293 0 1 10dB
10U 0.47U 0.1U *0.1U_NC +5V_SPK_AMP *100K_NC 100K
J5
0805 0603 10 10 U17 1 0 15.6dB

2
10 10 6 18 AUD_SPK_R1

1
PVDD1 ROUT+ AUD_SPK_R2 2 AUD_AMP_GAIN0
13 15 PVDD2 ROUT- 14 1 AUD_AMP_GAIN1
1 1 21.6dB
16 VDD

2
4 85204-0200L
LOUT+

2
C446 1 2 1U 10 0603 LIN+ 9 8 C388 C387
C530 1 RIN+ LIN+ LOUT- +3.3V_RUN
2 1U 10 0603 7 100P 100P R306 R305

1
A RIN+ SPK_SHUTDOWN# 50 50 100K *100K_NC A
SHUTDOWN 19
AUD_LINE_OUT_L C394 1 2 1U 10 0603 LIN- 5 LIN-

2
AUD_LINE_OUT_R C390 1 2 1U 10 0603 RIN- 17 12

1
RIN- NC R301
EPAD 21
C371 1 2 1U 10 0603 AMP_BYPASS 10 1 100K
BYPASS GND1
GND2 11
AUD_AMP_GAIN0 2 13 D19 SDMK0340L-7-F

1
AUD_AMP_GAIN1 GAIN0 GND3
3 GAIN1 GND4 20 2 1 NB_MUTE# 23

3
TPA6017A2/FAN7031/LM4874 R300 +AVDDA
C374
100P
C385
100P
2 HP_JD D18
2
SDMK0340L-7-F
1 EAPD#
JACK SENSE SENSEA 1
5.1K/F
2

1
50 50 Q17

1
2N7002W

1
C379
R298 R299 *1000P_NC
20K/F 5.1K/F 2

2
50
Close to U1 +AVDDA C380

3 2

3 1
0.1U
AZ_CODEC_BITCLK 16
2 1 MIC_JD 2 2 HP_JD
2
1

Q15 Q16
45

1
5
R336 2N7002W 2N7002W
*22_NC C378 1U R297 10K 1 BEEP 23
AUD_PC_BEEP 1 2BEEP2 2 1 BEEP1 4
1 2

0603 10 2 SPKR 13

1
C369 R296 0603
B B

3
Put R336, C269 close to *1P_NC U16
*2.2K_NC
12
2

50 74LVC1G86GW
U15 pin 6, reserve for EMI 29

2
R398 *0_NC MIC_JD
AUDIO CODEC 18 CN11
+3.3V_RUN L20 +3V_DVDD +AVDDA L22 1 7
BLM21PG600SN1D BLM21PG600SN1D AUD_MIC_L3 R396 *0_NC 2 8
+3.3V_RUN 6
AUD_MIC_R3 R397 *0_NC 3
DVDD_1.8V 4
1

1
C328 C330 C354 C396 C365 C373 C376 5
1

10U 1U 0.1U C408 0.1U 0.1U 1U *10U_NC *JAS233L-B10H9-7F_NC


0805 0603 10 10U C331 10 10 0603 0805
MIC JACK
2

2
10 10 0805 0.1U 10 10
2

10 10
+3V_DVDD AVEE

1
C377 R186 100K
1

10U C372 1 2 +3.3V_RUN


C332 0805 0.1U
29
2
0.1U 10 10
44

26
40
36
2

9
4
3

10 U15 HP_JD
VDD_IO
DVDD_1-8
DVDD_3-3
DVDD_44

AVDD_26
AVDD_40
AVEE

CN7
1 7
34 AUD_HP_L L27 BLM18BD601SN1D AUD_HP_L1 2 8
C PORTA_L AUD_HP_R 0603
C
11,23 ICH_AZ_CODEC_RST# 11 RESET# PORTA_R 35 6
L28 BLM18BD601SN1D AUD_HP_R1 3
AZ_CODEC_BITCLK 6 19 0603 4
11 ICH_AZ_CODEC_BITCLK BIT_CLK MICBIASB

2
11 ICH_AZ_CODEC_SYNC 10 SYNC PORTB_L 14 5
R266 1 2 33 AZ_CODEC_SDIN0 8 15 C417 C444 JAS233L-B10H9-7F
11 ICH_AZ_CODEC_SDIN0 SDATA_IN PORTB_R
5 100P 100P
11 ICH_AZ_CODEC_SDOUT HP JACK

1
SDATA_OUT AUD_MIC1_VREFO AUD_MIC1_VREFO_L 50 50
MICBIASC 18
16 AUD_MIC_L
R281 0 DIBP_SYS PORTC_L AUD_MIC_R
33 DIBP_HS 43 DIB_P PORTC_R 17
R286 0 DIBN_SYS 42
33 DIBN_HS DIB_N R230 100K
PORTD_L 27 1 2 +3.3V_RUN
AUD_PC_BEEP 12 28 R284
PC_BEEP PORTD_R 4.7K
29 MIC_JD
2 48 S/PDIF MIC_L 20 L24.L25,L30,L31,
21
MIC_R FB_600ohm+-25%_100MHz
MONO 29 _200mA_0.6ohm DC CN5
R278 1 2 10K GPIO2 45 30 AUD_LINE_OUT_L C339 2.2U R273 100 1 7
R274 1 GPIO1 GPIO2 STEREO_L AUD_LINE_OUT_R AUD_MIC_L1 AUD_MIC_L2 AUD_MIC_L3
2 *10K_NC 46 GPIO1 STEREO_R 31 1 2 L24 BLM18BD601SN1D 2 8
EAPD# 47 0805 10 0603 6
EAPD#/GPIO0 AUD_MIC_R1 AUD_MIC_R2 L26 BLM18BD601SN1D AUD_MIC_R3
1 2 3
CX20561-12Z Not support digital MIC C358 2.2U R280 100 0603 4
34

2
13 SENSEA 0805 10 5
CX20561-13Z support digital MIC SENSEA C410 C414 JAS233L-B10H9-7F
R399 *0_NC DMIC_CLK_R 1 24 VREF 100P 100P
18 DMIC_CLK MIC JACK

1
R400 *0_NC DMIC_DATA_R DMIC_CLOCK VREF 50 50
18 DMIC_DATA 2 DMIC_1/2
FLY_P 39 49
1

D 37 C368 1 2 1U C366 D
FLY_N 10 0603 10U C367
PC Beep GAIN CONTROL 36 48 0805 0.1U
34 22 EMI Request
DVSS_41

AVSS_25
AVSS_38

VREF_LO
DVSS_7

23 10 10
GAIN GPIO1 GPIO2 48
VREF_HI
RESERVED_32 32
33
R402
R401
2
2
1
1
0
0
0603
0603
QUANTA
RESERVED_33
0dB 10K 10K R304 2 1 0 0603
COMPUTER
1

CX20561-12Z C364 C362 R261 2 1 0 0603


7
41

25
38

-6dB omit omit 1U 1U R295 2 1 0 0603 Title


0603 0603 R334 2 1 0 0603
DIGITAL ANALOG
2

-12dB 10K omit 10 10 R185 2 1 0 0603


Size Document Number Rev
-18dB omit 10K VM9/VM8 1A

Date: Tuesday, June 17, 2008 Sheet 32 of 53


1 2 3 4 5 6 7 8

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1 2 3 4 5 6 7 8

Revision History
REV Description Date
0 Initial Release April 26, 2005
A A
4

MJ2
3800N-E002-NNN
CNXT-FI-S2P-HF
MFB2
RAC1_RING RING_1 2
300A/0.3A 1
MU1 CNXT-0603
MBR1
MMBD3004S
CNXT-SOT23AC_A_C
4 RAC1 MR3 6.81MB/F ML1
RAC CNXT-0805 AGND_LSD MRV1
1 2
12 TB3100M MJ1
TEST CNXT-DO214AA *127214FS002G200ZO
4 3
*600C/F CNXT-127214FS2G2ZO
CNXT-ICM-1206 2
5 TAC1 MR1 6.81MB/F MBR2 1
TAC CNXT-0805 MMBD3004S
CNXT-SOT23AC_A_C
MFB1 MJ3
B B
TAC1_TIP TIP_1 *127214FS002G200ZO
DIBN_HS 300A/0.3A CNXT-127214FS2G2ZO
32 DIBN_HS
DIBP_HS DIBN 16 11 EIC MC11 0.1U/10V/X CNXT-0603 2
32 DIBP_HS DIBN EIC CNXT-0402 MC8 MC9 1
470P/3KV/1808 470P/3KV/1808
CNXT-502R29N CNXT-502R29N
AGND_LSD
MC10 0.01UA/100V/X
PWR+ 15 MC7
PWR *470P/3KV/1808
MRa and MCa must be placed near pin 6 (RXI) CNXT-0603 GND
AGND_LSD CNXT-502S43W
and there should be no vias on the(RXI)net.
MC5 AVDD Just need to populate at CN side.
MRa MCa
0.1U/10V/X
CNXT-0402 2 6 RXI RX1_1 <DC_WORK_VOLT> BRIDGE_CC
MC12 AVDD RXI
150P/50V/O GND MC3 MR2 MC1
CNXT-0402 0.1U/10V/X 237KB 0.047UF 250V MR9 MR5 MR6 MR10
MJ4 MT1 CNXT-0402 CNXT-0805 CNXT-1206 280 280 280 280
DIBN_HS CNXT-1206 CNXT-1206 CNXT-1206 CNXT-1206
2
1 DIBP_HS
2 3
MC6 32
47P/50V/O BRIDGE_CC2
*127214FS002G200ZO CNXT-0402 AGND_LSD
CNXT-HDR_1X2F_1-27_3-24X2 1 4
DIBP 14 10 MR13 100R MQ1 QBASE
MJ6 835-00252F DIBP EIO CNXT-0402 MMBTA42
1 MC13 CNXT-5328R41-003 CNXT-SOT23CBE
2 150P/50V/O MQ3 MQ4
C 3 CNXT-0402 9 EIF MMBTA42 MMBTA42 C
EIF CNXT-SOT23CBE CNXT-SOT23CBE
4

*127214FS004G200ZO DVDD 1 8 TXO MQ2 MR8


CNXT-HDR_1x4F_1-27_5-78x2 DVDD TXO MMBTA42 *47A MR11 MR12
GND
CNXT-SOT23CBE CNXT-0603 3.01/F 3.01/F
MJ5 MC4 7 TXF <RESIST_TOL> CNXT-0402 CNXT-0402
0.1U/10V/X TXF
1
2 CNXT-0402 13
GPIO MR4
*127214FS002G200ZO 110A
VC

EP

CNXT-HDR_1X2F_1-27_3-24X2 CNXT-0603 MR7


GND AGND_LSD CX20548-S <RESIST_TOL> 9.1C
3

17

CNXT-MLF2_16P_0-65_4-0X4-0 CNXT-1206
VC_LSD

AGND_LSD

MC2
0.1U/10V/X
CNXT-0402

AGND_LSD

D D

QUANTA
Title
COMPUTER
Size Document Number Rev
VM9/VM8 1A

Date: Friday, May 30, 2008 Sheet 33 of 53


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A B C D E
+1.2V_LOM
2 13 31
TRANSFORM
Y1
LAN_XTAL1 1 2 LAN_XTAL2 R30 2 1 10K

1
C30 C32
0.1U 22U 25MHz TST1284-V LF
10 0805 C36 C35 MDI0- 12 13 LAN_MX0-

2
4 27P 27P TD4- MX4-
50 50 +3.3V_LAN MDI0+ 11 14 LAN_MX0+
NPO NPO U3 C511 0.01U 25 TD4+ MX4+
EECS 1 8 TDCT 10 15 TXCT0 R4 75/F TXCT0_R
EESK CS VCC TCT4 MCT4
2 7
SK NC1
4 R382 2.49K EEDI
EEDO
3
4
DI NC2
6
5
C24
0.1U
MDI1- 9
TD3- MX3-
16 LAN_MX1-
4

LOM_ACTLED_YEL#
DO GND 10 MDI1+ LAN_MX1+
8 17
93LC46B-I/SNG C512 0.01U 25 TD3+ MX3+
TDCT 7 18 TXCT1 R5 75/F
TCT3 MCT3

LAN_XTAL2
LAN_XTAL1
CTRL12A
6 19

RSET
R29 3.6K TD2- MX2-
+3.3V_LAN
5 20
TD2+ MX2+
+3.3V_LAN
4 21
TCT2 MCT2 C11
1000P
48
47
46
45
44
43
42
41
40
39
38
37
3 22
U4 TD1- MX1- 3K
2 23 NPO
VCTRL12A/SROUT12
GND
RSET
VCTR12DVDDSR
NC/VDDSR
NC/ENSWREG
CKTAL2
CKTAL1
NC/AVDD33
NC/LV_PLL
LED0
VDD33
TD1+ MX1+ 1808
1 24
+3.3V_LAN +1.2V_LOM TCT1 MCT1
U25
1 36 +3.3V_RUN MDI0- C15 6.8P 50
MDI0+ AVDD33 DVDD12 EESK
2 35
MDI0- MDIP0 LED1/EESK EEDI MDI0+ C14 6.8P 50
3 34
MDIN0 LED2/EEDI

1
4 33 EEDO
MDI1+ NC/FB12 LED3/EEDO EECS MDI1- C17 6.8P 50
5 32
MDI1- MDIP1 EECS R24
6 31
MDIN1 GND 1K MDI1+ C16 6.8P 50
7
GND RTL8102EL/8111DL DVDD12 30
8 29 +3.3V_LAN

2
NC/MDIP2 VDD33 ISOLATEB R23 15K
9 28
NC/MDIN2 ISOLATEB
+1.2V_LOM 10 27 PLTRST# 6,12,23,26
DVDD12/AVDD12 PERSTB
3 11
12
NC/MDIP3
NC/MDIN3
LANWAKEB
CLKREQB
26
25
PCIE_WAKE# 13,26
3
NC/SMDATA
REFCLK_N
REFCLK_P

NC/SMCLK
DVDD12

EVDD12

HSON
EGND
HSOP
HSIN
HSIP
GND

LED0 Tx/Rx Action


14 RJ-45 Connector
13
14
15
16
17
18
19
20
21
22
23
24

CLK_PCIE_LOM
PCIE_TX6+/GLAN_TX+

17 CLK_PCIE_LOM
PCIE_TX6-/GLAN_TX-

CLK_PCIE_LOM#
+1.2V_LOM 17 CLK_PCIE_LOM# LED1/EESK LINK100
CLK_PCIE_LOM#

CON5 2006123-3
LAN_PCIETXDN
CLK_PCIE_LOM

LAN_PCIETXDP

C22 0.1U 10 LAN_PCIETXDP LOM_ACTLED_YEL# R405 330 12


12 PCIE_RX6+/GLAN_RX+ LED_YN Y
C23 0.1U 10 LAN_PCIETXDN
12 PCIE_RX6-/GLAN_RX- LED2/EEDI LINK10 13
EVDD12

+3.3V_LAN LED_YP
PCIE_TX6+/GLAN_TX+
12 PCIE_TX6+/GLAN_TX+ +3.3V_LAN
PCIE_TX6-/GLAN_TX- 8
12 PCIE_TX6-/GLAN_TX- 8
7
LAN_MX1- 7
6
6

1
5
Q50 5
4
DDTA114YUA-7-F LAN_MX1+ 4
47K 3 3
LAN_MX0- 2
EESK LAN_MX0+ 2
2 1 1
Note 1: The Trace length 10K
10
between L210 and 8111DL's Pin LED_GND

1 must be within 0.5 cm. C5 and


2 2

3
O G
C8 to L210 must be within R406 330 9 LED_GN/AP
11
0.5cm. Refer to Layout guide for LED_GP/AN

CHSGND1
CHSGND2
more detail. C430 and 243 are for U2 EVDD12 pin 19. +3.3V_LAN

1
CTRL12A CTRL12A_R1 R383 *0_NC EVDD12

14
15
0603 Q51
DDTA114YUA-7-F
47K
1

C38 C37 C18 C21


Change L210 to 0 ohm 22U 0.1U 1U 0.1U EEDI 2
0805 10 0603 10 10K
2

in RTL8102EL 4 10
application. Remove R211 & R212

3
in RTL8102EL
application. R407 330

C223, C224, C233, C235 are for R31


U2 VDD33 pins-- 1, 29, 37 and 40. *0_NC
0603

+3.3V_LAN
1 +3.3V_SUS
SJ11
C244, C246, C248, C252, C253 are for U2 VDD12 pins-- 10, 13, 30, 36, 39. 1
1 2
1 2

2
+1.2V_LOM QUANTA
C31 C27 C33 C25
*0.1U_NC
10
0.1U
10
0.1U
10
0.1U
10
C34
0.1U
C29
0.1U
C26
0.1U
C20
0.1U
C28
0.1U Title
COMPUTER
10 10 10 10 10 LAN

Size Document Number Rev


VM9/VM8 1A

hexainf@hotmail.com Date: Saturday, July 19, 2008 Sheet 34 of 53

GRATIS - FOR FREE D E


1 2 3 4 5 6 7 8

+3.3V_ALW +3.3V_SUS
15
64

2
R144 R107
A
*0_NC 0 A

1
U8 74AHC1G08GW

5
13,23,39 IMVP_PWRGD 2
4 ICH_PWRGD 6,13
23 RESET_OUT# 1

3
R25
1K
11

2
Keep Away from high speed buses

47 +3.3V_ALW

B B

14
U12A
38 1.25V_RUN_PWRGD 1
3
37 1.5V_RUN_PWRGD 2
U12C
SN74AHC08PW 9
8
10
U12B
40 3V_ALW_PWRGD 4 SN74AHC08PW
6
40 5V_ALW_PWRGD 5

SN74AHC08PW

U12D
12
11 HWPG
HWPG 23
37 1.05V_RUN_PWRGD 13

SN74AHC08PW

C C

+3.3V_ALW
64
U9
74AHC1G08GW

5
38 1.8V_SUS_PWRGD 2
4 RUN_ON 37,38,41
23 RUN_ON_1 1 3

R106 1 2 *0_NC

R108 2 1 *10K_NC RUN_ON

D D
R145 2 1 *10K_NC RUN_ON_1

QUANTA
Title
COMPUTER
System Reset Circuit

Size Document Number Rev


VM9/VM8 1A

Date: Friday, July 25, 2008 Sheet 35 of 53


1 2 3 4 5 6 7 8

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GRATIS - FOR FREE
A B C D E

+PWR_SRC
Id=9.6A@Vgs=10V
1 PQ11
FDS4435BZ

1 8
1 PQ5
2
3
7
6
FDS4435BZ PR77 5
0.01/3720
8 1

1 4
+DC_IN_SS 7 2 1 2 2/12 +DC_IN_SS
+DC_IN_SS 1 2
6 3 3 4
3 4
5

1
PC96 PC95 PR87
1 *2200P_NC *0.1U_NC 1

4
0603 470K

2
50 50
1 2 1 2
PR60 10K PR59 100K

CSSN
CSSP
3
2

PQ1

1
2N7002W

+DC_IN_SS

LDO

2
PD5

1
SDM10K45-7-F

1
PR48 PC56 PC97 PC91 PC98

1
365K/F 1U 2200P 0.1U *10U_NC PC99

1
0805 0603 1206 10U

28

27

2
1
25 50 50 25 1206

2
PR47 25

CSSP
GND

CSSN
LDO 49.9K/F 22 PC58 1U
DCIN LDO
2 1 2 1
1

0603 10

1
2 1 8731_ACIN 2 25 BST PC53 RDS(ON)=30m ohm
ACIN BST

5
6
7
8
2 PR53 PC57 0.01U PR46 0.1U 2

1
10K/F 25 33/F 0603 PQ8
0603 50 SI4800BDY-T1-E3
21 4 6
2

LDO PC55 1U PR42


23 ACAV_IN 13

2
ACOK PC52 0.01/3720
VCC
26 2 1 55
1

+3.3V_ALW 11 0603 10 3300P PL2 10UH +-20%,4.4A (TPC104DR-100M)

1
2
3
VDD DHI CHG_CS
24 1 2 1 2 +VCHGR 42
PR54 DHI 1 2
1 2 3 4
3 4

5
6
7
8

2
15.8K/F PC66 0.1U 23 LX PR44 1
LX

1
0603 50 0603 PR43 PC45 PC44
2

10 20 DLO 50 4 2.2 3300P 2200P


23,42 SMBCLK0 SCL DLO

1
9 0805 PC47 PC46
23,42 SMBDAT0

2
SDA 50 1000P 50 0.1U PC50 PC48 PC49
14 19 RDS(ON)=30m

2 1
GNDA_CHG BATSEL PGND 0603 *10U_NC 10U 10U
SMBUS Address 12

1
2
3

2
23 IINP
IINP 8
IINP CSIP
18 ohm PQ9 PC51 50 50 1206 1206 1206

12H
Adress :
SI4800BDY-T1-E3 1000P 25 25 25
17

1
CSIN 50
6
CCV
PR50 CSIP Max Charging current
PR49
2

10K 5 15 2 1+VCHGR
CCI FBSA
100 CSIN setting 2.64A
16
FBSB

2
4
CCS PC54
GND
DAC
1

3 220P

1
REF
1

PR52 PC65 PC62 PC61 PC60 MAX8731A 50


TABLE 1
1 7

12

8.45K/F 0.1U 0.01U 0.01U 0.01U 8731REF PU4


1

10 25 25 25
2

PC59 PC63
2

3 1U 0.1U 3
TRIP CURRENT
2

0603 SJ10
10 10
ADAPTER(W)
1 1 2 2 (A)
GNDA_CHG 65 3.17
90 4.43
130 6.43
150 7.43
200 9.75
11.28
230 (see note3)

4 4

QUANTA
Title
COMPUTER
Charger (ISL88731)

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, June 17, 2008 Sheet 36 of 53


A B C D E

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GRATIS - FOR FREE
5 4 3 2 1

+PWR_SRC
3
+DC_PWR_SRC

1
PC106 PC107 PC109 PC108
10U 10U 0.1U 2200P

2
1206 1206 50 50
25 25

5
6
7
8
0603
PC33
*0.1U_NC 51117DH 4 PQ13
D D
1 2 IRF8707TRPBF

1
2
3
+1.05V_VCCP
PU2 PC35
Rds-on=17.5mOhm 14
1 EN_PSV VBST 14 2 1
35,38,41 RUN_ON
2 13 PL3
TON DRVH 0.1U 1.3UH/SIL105RA-1R3)/14A
+1.05V_VCCP_P 3 12 50 51117LX 1 2 +1.05V_VCCP_P
VOUT LL 0603
+5V_ALW2 1
PR30
2 4 V5FILT TRIP 11 55

5
6
7
8

1
300/0603 51117_FB 5 10 +5V_ALW2
VFB V5DRV PQ12
33

2
6 9 51117DL 4 IRF8736TRPBF PR36 + PC110
35 1.05V_RUN_PWRGD PGOOD DRVL 2.2/F/0603 PC111 220U
33

EPAD
7 8 0.1U

1
GND PGND
50

1
2
3
2

2
PR95
1

2
PR31 TPS51117RGYR PR35 8.2K/F/0603 0603

15

1
100K PC31 PC34 12.1K PC112
1

*0.1U_NC 1U/10V/0603 PC36 47P


2

1
PC32 50 SJ9 2200p/50V 50
1

2
1U/10V/0603 1 2
2

0603 1 2
+3.3V_SUS
UMA Max current(TDC)->12.1A
C
OCP->17.54A C
Rds-on=6.8mOhm Freq=300KHZ

51117_FB
PR29
2 1

237K/F 33 PR96
0603 20.5K/F/0603

+3.3V_SUS
1

PR151
100K

(22)
2

B Max current(TDC)->1.56A B
PU8 RT9018B
35 1.5V_RUN_PWRGD 1 POK 8
GND
2 VEN ADJ 7
35,38,41 RUN_ON 3 VIN 6 +1.5V_RUN_P
VO +1.5V_RUN
4 VPP NC 5
9

+1.8V_SUS PR149
*100K_NC +5V_ALW2
9
2

1
PR148
49.9K/F PC166
55
PC162 PC163 PC165 PC164 10U
1U 0.1U 0.1U 0.1U 1.5V_ ADJ
R1 2 0805
0805 25 25 25 4
1

10 0603 0603 0603 0.8V


PR147
56K
Vout =0.8(1+R1/R2)
R2 =1.5V

A A
QUANTA
Title
COMPUTER
1.05_VCCP & 1.5V_RUN

Size Document Number Rev


VM9/VM8 1A

Date: Thursday, June 12, 2008 Sheet 37 of 53

5 4 3 2 1

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GRATIS - FOR FREE
5 4 3 2 1

D D

15
PR74 *0_NC +PWR_SRC
+DC2_PWR_SRC FL6
HI1206T161R-10(160,6A)
1 2
S3_1.8V S5_1.8V

2
PC84 PC72 PC73 PC74
PC75 PC70 2200P 0.1U 10U 10U

1
0.1U 0.1U PR51 50 50 1206 1206

5
6
7
8
25 25 Rds-on=17.5mOhm *2.2/F_NC 0603 25 25
PQ7 0603
0603 0603
4 IRF8707TRPBF
+1.8V_SUS
PC64

1
2
3
PU5 TPS51116_8 PC68
1 19 +1.8V_DH *2200P_NC
VLDOIN DRVH
C
50 C
1U/10V/0603 2 20 PC89 2 1 0.1U PL1
+0.9V_DDR_VTT VTT VBST 50 0603 1.5uH(SIL1055RC-1R5-R)
PC88 PC90 4 18 +1.8V_LX 1 2 +1.8V_SUS_P +1.8V_SUS
10U 10U VTTSNS LL
0805 0805 +1.8V_DL
10 10
5
GND DRVL
17
6
61

1
3
VTTGND PGND
16 (25)

5
6
7
8
PR58 14 PC80 + PC87
DIS_MODE 6 11 S3_1.8V PQ4 2.2/F 0.1U *220U/2.5V/ESR15_NC
RUN_ON 35,37,41

2
MODE S3 IRF8714TRPBF + PC82
4 0603 25
V_DDR_MCH_REF 7 12 S5_1.8V PR75 20K/F 220U/2.5V/ESR15
VTTREF S5 SUS_ON 23,40,41 0603
1

5VIN 5VIN (24) 5


8 14 55

1
2
3
PC85 COMP V5IN PC77
0.033U 9 13 2 PR76 1 +3.3V_ALW 2200P
2

VDDSNS PGOOD 100K


GND
GND
GND
GND
GND
GND
GND

0603 50
25 10 15
VDDQSET CS
1.8V_SUS_PWRGD 35
UMA Max current(TDC)->8.987A
21
22
23
24
25
26
27

FOR DDR II PC86


*1000P_NC Rds-on=13mOhm OCP->12.83A
1

PR78 Freq=400KHZ
2

PC83 50 16.9K
*0.1U_NC
2

DIS_MODE 50 +5V_ALW2 5VIN


0603 PC76
4.7U
+1.8V_SUS_P 1 2 0805
PR56 *0_NC 10

B B

PC81 PR72
*18P_NC *143K/F_NC
50 +3.3V_SUS
1

PR73
*100K/F_NC PR40
(Note 1) Current Limiting Setting : 100K 42
Rtrip(Kohm)=100*(Iocp-0.5*Iripple)*Rds(on) (22)
2

Max current(TDC)->0.9A
PU3 RT9018B
35 1.25V_RUN_PWRGD 1 POK GND 8
2 VEN 7
35,37,41 RUN_ON ADJ +1.25V_RUN_P
3 VIN VO 6 +1.25V_RUN
4 VPP NC 5
9

+1.8V_SUS PR146
*100K_NC +5V_ALW2
9
2

1
PR38
49.9K/F PC37
55
PC41 PC40 PC39 PC38 10U
R1
2
1.25V_ ADJ 0805
1U 0.1U 0.1U 0.1U
4
Vout =0.8(1+R1/R2)
0805 25 25 25
1

10 0603 0603 0603 0.8V


PR37
=1.25V
86.6K/F
A A

(22)
R2

(22) QUANTA
Title
COMPUTER
1.8VSUS & 0.9VTT (TPS51116)

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, June 10, 2008 Sheet 38 of 53


5 4 3 2 1

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GRATIS - FOR FREE
5 4 3 2 1

+PWR_SRC +CPU_PWR_SRC

+3.3V_SUS
D 58 D

PT1
1

1
PAD
PR11

2
10 PR20

5
0603 *2.2_NC PC139 PC141 PC136 PC13 PC11 PC137 PC138 PC140
PQ26 0805 0.1U 2200P 10U *10U_NC *10U_NC 10U 0.1U 2200P

1
NTMFS4707NT1G 50 50 1206 1206 1206 1206 50 50

2
H_DPRSTP# 3,6,11 UG1 4
PR14 1 0603 25 25 25 25 0603
2 499/F DPRSLPVR 6,13
PC16 (23)

1
2
3
2
IMVP_VR_ON 23 *1500P_NC
PC4 50

CLK_EN#
0.1U

1
VID6 4
PL5 0.36uH_30A_ETQP4LR36WFC
VID5 4
10 PH1 2 1 +VCC_CORE
VID4 4
VID3 4

1
PQ23

3
+3.3V_SUS VID2 4
NTMFS4119NT1G PR25
VID1 4

5
6
7
8
9

5
6
7
8
9
VID0 4 2.2

49

48

47

46

45

44

43

42

41

40

39

38

37
0805
1

PU1 LG1 4 4

1
3V3

CLK_EN#

DPRSTP#

VID6

VID5

VID4

VID3

VID2

VID1

VID0
GND

DPRSLPVR

VR_ON
PR9 PC26 + PC24 + PC30
1.91K/F (23) PC22 0.1U 330U 330U

1
2
3

1
2
3

1
1500P 50 2 2
2

2
13,23,35 IMVP_PWRGD 1 36 PR19 0603 50
PGOOD BOOT1 0603 7343 7343

1
1
2 35 UG1 PC17 PQ19
3 H_PSI# PSI# UGATE1
0.22U NTMFS4119NT1G

2
PR139 4.99K/F 25
PWR_MON 2 1 3 34 PH1
PMON PHASE1 0603 VSUM PR128 3.65K/F 0603
PR141 499/F PC158 0.1U PR5 147K/F
+3.3V_SUS 1 2 2 1 2 1 4 33 PR21 10K 0603
RBIAS PGND1 +5V_SUS ISEN1
C 1 2 C
10
5 32 LG1 PR129 1 0603
23 IMVP6_PROCHOT# VR_TT# LGATE1 ISL6266_VO
PC20
PR3 *4.02K/F_NC
PR142
*NTC_470K_NC
2 1 6 NTC
ISL6262A PVCC 31 1 2
ISEN2
PR16 10K 0603 +CPU_PWR_SRC

PC157 0.015U
1 2 55 58
LG2 2.2U
MAT 2 1 2 1 7 SOFT LGATE2 30
10
PC2 *0.01U_NC
ERTJ0EV474J 16 16 0805

1
Close to Phase 1 Inductor ISL6266_VO PR140 12.7K/F 8 29
OCSET PGND2

1
PR18

5
PC3 1000P *2.2_NC PC146 PC151 PC7 PC8 PC150 PC149 PC152 PC144
2 1 9 28 PH2 PQ25 0805 0.1U 2200P *10U_NC 10U 10U 10U 0.1U 2200P

2
VW PHASE2 NTMFS4707NT1G 50 50 1206 1206 1206 1206 50 50

2
50 UG2 4

2
UG2 0603 25 25 25 25 0603
PR8 6.81K/F 10 COMP UGATE2 27 (23)
2 1 PC18 PC19

1
2
3
PR22 0.22U *1500P_NC

1
PC154 220P 1
11 FB BOOT2 26 25 50
2 1 0603 0603 PL6 0.36uH_30A_ETQP4LR36WFC
50 12 25 PH2 2 1
FB2 NC +VCC_CORE
PC156 470P
PR138
DROOP

2 1 2 1

3
1

1
VDIFF

ISEN2

ISEN1
VSUM
VSEN

97.6K/F PQ20
GND

VDD
RTN

DFB

50
VIN
VO

PR6 NTMFS4119NT1G PR24

5
6
7
8
9

5
6
7
8
9
1K 2.2
0805
13

14

15

16

17

18

19

20

21

22

23

24

1
PR1 PC1 1000P LG2 4 4
2

2
2 1 2 1 PC25 + PC29 + PC23
ISEN2

ISEN1

0.1U 330U 330U

1
1

255 50 PC15 0.22U (23) 50 2 2

1
2
3

1
2
3

2
PC6 PR137 1 2 ISL6266_VO PC21
PR2 0603 7343 7343
2 1 1K 25 0603 1500P
1K 50 (23)
0.01u (35) +CPU_PWR_SRC PC14 0.22U
2

B B
VSUM

50 1 2
25 0603
PR136
ISL6266_VO

2 1 PR135 PQ18
4.02K/F NTMFS4119NT1G
0603 10

PC153 180P 0603 PR133 10 VSUM PR127 3.65K/F 0603


1

2 1 1 2 +5V_SUS
0603 PR17 10K
50 ISEN2 1 2 0603
1

2
2

PC148 PC10 PC12 PR125 1


PC5 PC9 0.33U 0.1U 1U ISL6266_VO 0603
2

0.01u 0.01U 16 50 10 SJ7


1

50 16 1 2 PR23 10K
0603 0603 0603 1 2 ISEN1 1 2 0603

4 VCCSENSE

VSUM
4 VSSSENSE
2

PR132
Parallel PC147 PC145 PR134 2.61K/F
0.22U 0.068U 11K/F
1

10 16
(39)
1

0603
PR126
10K_NTC
1

ISL6266_VO
A A

Close to Phase 1 Inductor QUANTA


Title
COMPUTER
CPU_Core_2Phase (ISL6266)

Size Document Number Rev


VM9/VM8 1A

hexainf@hotmail.com 5 4 3 2
Date: Thursday, June 12, 2008
1
Sheet 39 of 53

GRATIS - FOR FREE


5 4 3 2 1

DC/DC +3V_ALW/+5V_SUS/+5V_ALW /+15V_ALW


PR112
1 2 ISL6237_ONLOD

1
Place these CAPs
close to FETs 390K PR114
150K/F Place these CAPs
0603

2
close to FETs
D D

+PWR_SRC
+5V_ALW2

1
10 0603

1
PC131 PC130 PC119 PC118 1 2

1
*10U_NC 10U *10U_NC 10U PC117 PC121 PR105 PC133 PC132

2
1206 1206 1206 1206 0.1U 2200P PC122 0.1U 2200P

2
25 25 25 25 50 50 4.7U 50 50

2
25 PR123
0603 0603
0805 *0_NC Max current(TDC)->2.54A

2
Max current(TDC)->4.139A OCP->3.63A
PC127
OCP->5.91A Freq=500KHZ
5 PC125 0.1U/10V

1
2

2
ISL6237_ONLOD
Freq=400KHZ PR117
PC123 2 1 *0_NC PC126
0.1U 1U PR118

1
50 0603 *0_NC
1U +3.3V_ALW
0603
10 Rds-on=30mOhm

5
6
7
8
+5V_SUS 10
0603 PQ21
SI4800BDY-T1-E3
4 6
Rds-on=30mOhm

42
8
7
6
5
4
3
2
1
1

1
2
3
8
7
6
5
PL7
1 41

LDO

ONLDO

REF
PAD
LDOREFIN

VIN
RTC

VCC
TON
PAD 3.8UH +-30%,6A (TPC104DR-3R8Y)
PQ17 40 PAD
SI4800BDY-T1-E3 4 +5V_DH 39 +3.3V_LX 1 2 +3.3V_ALWP
PAD
C
6 +5V_ALWP
38
9
PAD
32 PR26 180K/F C
PL4 BYP REFIN2
3 10 31 1 2
2
1
3.8UH +-30%,6A (TPC104DR-3R8Y) OUT1 ILIM2
11 FB1 OUT2 30
+5V_ALWP 1 2 +5V_LX 1 2 12 PU7 29 PC159
ILIM1 SKIP#

5
6
7
8

2
PR28 300K/F POK1 13 MAX17020 28 POK2 +
+5V_EN1 PGOOD1 PGOOD2 +3.3V_EN2 PC155 330U
14 ON1 ON2 27
PR107 15 26 +3.3V_DH 4 0.1U 6.3*5.8

1
PC116 DH1 DH2 0603 6.3
*0_NC 16 LX1 LX2 25
2

8
7
6
5

+ 37 50
PAD

2
330U PC115 36 PR119

SECFB

1
2
3
PAD

2
AGND
PGND
6.3*5.8 0.1U +5V_DL PC120 PQ22

BST1

BST2
4 *0_NC

VDD
PAD
PAD
PAD
1

DL1

DL2
6.3 0603 0.1U PC128 SI4800BDY-T1-E3

1
50 50 0.1U

1
50
3
2
1

35
34
33

17
18
19
20
21
22
23
24
0603
PQ16 0603
SI4800BDY-T1-E3 PR115
PR109 1 0603 +3.3V_DL Rds-on=30mOhm

SECFB
1 0603
SJ8
+5V_ALW2 1 1 2 2

2
Rds-on=30mOhm +3.3V_ALWP +3.3V_ALWP
PC124
1U

1
0603
10
+5V_ALW2 R378 R381
100K 100K
PC100
(24)

2
B
2 1 B
BAT54S-7-F POK2
3V_ALW_PWRGD 35
0.1U 1 PC129
50 POK1
5V_ALW_PWRGD 35
0603 PD10 32 1
PC27
+5V_ALW2 2 1 2

2
0.1U
50 PC134
0.1U 0603 0.1U

1
1

50 1
+15V_ALW 50
PR103 0603
PD11 0603
39K 3

SECFB
+15V_ALWP 2
2

+5V_ALW2
+3.3V_EN2 H_THERMTRIP# 3,6,23,31
BAT54S-7-F
2

PD9 1SS355 PC135


+5V_EN1 2 1 THERM_STP# 3,6,23,31 0.1U
23,38,41 SUS_ON
1

50
2

0603
(24) PC28 PR106
*0.1U_NC *0_NC Pop for MAX17020
50 1 2
1

0603 (65)

A A

QUANTA
Title
COMPUTER
3VALW,5V,3V, Power On

Size Document Number Rev


VM9/VM8 1A

Date: Saturday, June 21, 2008 Sheet 40 of 53


2 1

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1 2 3 4 5

+5V_RUN +3.3V_SUS
+5V_ALW2 +3.3V_ALW +15V_ALW +3.3V_ALW PQ28 +3.3V_SUS
+5V_ALW2 +3.3V_ALW +15V_ALW +5V_SUS PQ14 +5V_RUN TDC : 3.126A FDC655BN TDC : 0.18A
FDC655BN
6

1
6 5 4

1
5 4 PR144 PR145 PR143 2
PR99 PR98 PR97 2 100K *100K_NC 100K 1

2
100K *100K_NC 100K 1

2
PC161

3
PC113 SUS_3.3V_ENABLE 0.1U

1
RUN_ENABLE_5V 0.1U 0603

3
A A
0603 50

3
50 SUS_ON_3.3V# 5
RUN_ON# 5

4
6

1
PC114 2 PQ29A PC160

4
23,38,40 SUS_ON
2 PQ15A 4700P PQ29B 2N7002DW 0.022U
35,37,38 RUN_ON
PQ15B 2N7002DW 0603 2N7002DW 0603

2
1 2N7002DW 50 50 5
(65) (24)

(65)

B B

+3.3V_RUN
+15V_ALW +3.3V_ALW PQ27 +3.3V_RUN
IRF8707TRPBF TDC : 2.327A
8 3
7 2
1

6 1
PR130 5

2
100K
PC142
4

C C
0.1U
2

1
RUN_ENABLE_3.3V 0603
50
3

RUN_ON# 2
PC143
PQ24 4700P
1

2N7002W 25

+1.8V_SUS +5V_SUS +3.3V_SUS


Reserve discharge path

1
R312 R374 R395
*30/F_NC *1K_NC *1K_NC

Reserve discharge path

3 2

3 2

3 2
+5V_RUN +3.3V_RUN +1.5V_RUN +0.9V_DDR_VTT +1.25V_RUN SUS_ON_3.3V# 2 2 2

Q18 Q39 Q47

1
1

*2N7002W_NC *2N7002W_NC *2N7002W_NC


R78 R385 R320 R270 R174
*1K_NC *10_NC *1K_NC *1K_NC *1K_NC
3 2

3 1

3 2

3 2

3 2

D D
RUN_ON# 2 2 2 2 2
Q8
Q42 Q19 Q14 Q9
QUANTA
1

*2N7002W_NC *2N7002W_NC *2N7002W_NC *2N7002W_NC *2N7002W_NC

Title
COMPUTER
RUN POWER SW

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, June 10, 2008 Sheet 41 of 53


4 5

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A B C D E

+3.3V_ALW

2
PC42 1 2 2200P 50 +3.3V_ALW

PD4 PD3 PD2 PD1

3
1 1
PC43 *DA204U_NC *DA204U_NC *DA204U_NC *DA204U_NC
1 2 +VCHGR 36

2
10 0.1U 50 0603 PR93
JBAT1 10K
BATT1+ 1 SMBUS Address 16
2 PR88 100
Adress : 16H

1
BATT2+
SMB_CLK 3 1 2 SMBCLK0 23,36
SMB_DAT 4 1 2 SMBDAT0 23,36
5 PR90 100 PR92 100
BATT_PRES#
SYSPRES# 6 1 2 PBAT_PRES# 23
BATT_VOLT 7 1 2 PBAT_ALARM#
8 PR94 100
BATT1-
BATT2- 9

200045MR009H577ZR

65
+5V_ALW2

+3.3V_ALW

1
PD7
BAV99W PR67
2.2K

3
PQ3

2
2 2N7002W 2
PR66 100
DOCK_PSID DOCK_PSID_R 3 1 1 2 PS_ID 23

2
PR65 +5V_ALW2 +5V_ALW2
1

100K/F
PC78

2
100P
2

2
50
PD6 PR70

3
*BAS316_NC 10K PD8
2 *DA204U_NC
2

3
1 2

1
PS_ID_DISABLE#
1

PQ2
PR64 MMST3904-7-F PR68 *100_NC
15K/F
2

3
Change Value per GG updated 1 3
EMI requirement on 0812
PQ6
+DC_IN FDS4435BZ +DC_IN_SS
CN2 FL1
BLM41PG600SN1L 1 8
1 +DCIN_JACK 2 7
Adapter1+
3 6
Adapter2+ 2 5
1

1
PC71
1

3 0.1U PC92 PR81 PC93 PC94 PC67


4

Adapter1- 0603 PR57 (8) 0.01U 10K/F 0.1U 0.1U 10U


2

2
4 50 240K 0603 0603 0603 1206
Adapter2-
2

PC69 25 50 50 25
2

5 0.47U
2

PSID 0805
1

25
1

BATTCON3_0
87438-0531-5P-L PC79 PRV1
*100P_NC *VZ0603M260APT_NC
2

50
(49)
2

PR62
47K
1

4 4

QUANTA
Title
COMPUTER
DCIN,BATT CONNECTOR

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, June 17, 2008 Sheet 42 of 53


D E

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1 2 3 4 5 6 7 8

H2 H5 H7 H8 H4 H1 H10
h-c276d126p2 H-C236D165P2 h-c236d154p2 h-o236x256d154x173p2 H-C236D165P2 h-c276d126p2 h-c276d126p2
A A
h-c276d126p2 H-C236D165P2 h-c236d154p2 h-o236x256d154x173p2 H-C236D165P2 h-c276d126p2 h-c276d126p2
1

1
7 65
26 27

H15 H17 H18 H19 H16 H14 H3 H9


O-O354X197D354X197N h-c276d126p2 NUT NUT h-c276d126p2 h-c276d126p2 h-c276d126p2 h-c276d126p2
O-O354X197D354X197N h-c276d126p2 h-c276d126p2 h-c276d126p2 h-c276d126p2 h-c276d126p2 h-c276d126p2 h-c276d126p2
1

1
B B
8
50
H13 H20
H12 h-o106x126d106x126n H-c276d110p2
h-c106d106n h-o106x126d106x126n H-c276d110p2
h-c106d106n
1

1
1

C C

D D

QUANTA
Title
COMPUTER
SCREW PAD

Size Document Number Rev


VM9/VM8 1A

Date: Monday, June 23, 2008 Sheet 43 of 53


6 7 8

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5 4 3 2 1

Reserved for EMI.

Stitching caps for PCI bus. 40 Stitching caps for PCI EMC.
D D
+1.5V_RUN +5V_RUN +5V_RUN +3.3V_RUN +CPU_PWR_SRC +PWR_SRC +3.3V_RUN +3.3V_RUN +5V_RUN +3.3V_RUN +3.3V_RUN
1

2
C341 C200 C102
*0.1U_NC *0.1U_NC *0.1U_NC C57 C12 C19 C522 C517 C363 C437 C438
2

2
10 10 10 4700P 4700P 4700P 4700P 4700P 4700P 4700P 4700P

1
25 25 25 25 25 25 25 25

+5V_RUN +5V_SUS +3.3V_RUN


+1.05V_VCCP +5V_SUS +1.5V_RUN

C C

B B

A A

QUANTA
Title
COMPUTER
EMI CAP

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, May 27, 2008 Sheet 44 of 53


5 4 3 2 1

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1 2 3 4 5 6 7 8

+3.3V_SUS

A 2.2K 2.2K A
+3.3V_RUN
AJ26 ICH_SMBCLK 7002 WLAN_SMBCLK 30

ICH8-M AD19 ICH_SMBDATA WLAN_SMBDAT 32 MINICARD-WLAN


7002
+3.3V_ALW
+3.3V_RUN
100
3

2.2K 2.2K 4 BATTERY

100
110 SMBCLK0 10
111 SMBDAT0 9 CHARGER

B B

+3.3V_ALW
6
5 INV
2.2K 2.2K

+3.3V_RUN
115 SMBCLK1 7002 7
116 SMBDAT1 6 CLOCK
7002
+3.3V_ALW +3.3V_RUN
SIO
ITE8512 2.2K 2.2K
C C

+3.3V_RUN
115 SMBCLK1 10
7002
116 9 THERMAL
SMBDAT1
7002

+3.3V_RUN

117 SMCLK2
D
118 NO CONNECTOR D
SMDAT2

QUANTA
Title
COMPUTER
SMBUS BLOCK

Size Document Number Rev


VM9/VM8 1A

Date: Tuesday, May 27, 2008 Sheet 45 of 53


1 2 3 4 5 6 7 8

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5 4 3 2 1

VER : 1A

Adapter

D PWR_SRC D
Charger
MAX8731AETI+

Battery
Intersil TI TI Intersil
ISL6237IRZ-T TPS51116PWPRG4 LDO TPS51117RGYR ISL6266AHRZ-T

IMVP_VR_ON
+5V_ALW2 5V_ALW_ON SUS_ON RUN_ON
+1.8V_SUS
+15V_ALW +3.3V_ALW +5V_ALW +1.8V_SUS +0.9V_DDR_VTT +VCC_CORE

MAXIM ST
MAX8794ETB+ L6935TR
RUN_ON RUN_ON

+1.25V_RUN +1.5V_RUN
C C

Fairchild Fairchild Fairchild Fairchild Fairchild


FDS8880 FDC655BN FDS6298 FDC655BN FDS6298
RUN_ON SUS_ON SUS_ON RUN_ON RUN_ON RUN_ON

+3.3V_RUN +3.3V_SUS +5V_SUS +5V_RUN +1.8V_RUN +1.05V_VCCP

B B

A A

QUANTA
Title
COMPUTER
Schematic Block Diagram1

Size Document Number Rev


VM9/VM8 1A

hexainf@hotmail.com 2
Date: Tuesday, May 27, 2008
1
Sheet 46 of 53

GRATIS - FOR FREE

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